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<title>rust/compiler/rustc_codegen_llvm/src/back, branch try</title>
<subtitle>https://github.com/rust-lang/rust
</subtitle>
<id>http://git.dreamy.place/mirrors/rust/atom?h=try</id>
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<updated>2025-07-21T16:54:24+00:00</updated>
<entry>
<title>Rollup merge of #142097 - ZuseZ4:offload-host1, r=oli-obk</title>
<updated>2025-07-21T16:54:24+00:00</updated>
<author>
<name>许杰友 Jieyou Xu (Joe)</name>
<email>39484203+jieyouxu@users.noreply.github.com</email>
</author>
<published>2025-07-21T16:54:24+00:00</published>
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<id>urn:sha1:5e3eb2512591df0cef52404f0ea4202f58935a54</id>
<content type='text'>
gpu offload host code generation

r? ghost

This will generate most of the host side code to use llvm's offload feature.
The first PR will only handle automatic mem-transfers to and from the device.
So if a user calls a kernel, we will copy inputs back and forth, but we won't do the actual kernel launch.
Before merging, we will use LLVM's Info infrastructure to verify that the memcopies match what openmp offloa generates in C++. `LIBOMPTARGET_INFO=-1 ./my_rust_binary` should print that a memcpy to and later from the device is happening.

A follow-up PR will generate the actual device-side kernel which will then do computations on the GPU.
A third PR will implement manual host2device and device2host functionality, but the goal is to minimize cases where a user has to overwrite our default handling due to performance issues.

I'm trying to get a full MVP out first, so this just recognizes GPU functions based on magic names. The final frontend will obviously move this over to use proper macros, like I'm already doing it for the autodiff work.
This work will also be compatible with std::autodiff, so one can differentiate GPU kernels.

Tracking:
- https://github.com/rust-lang/rust/issues/131513
</content>
</entry>
<entry>
<title>gpu host code generation</title>
<updated>2025-07-18T23:30:42+00:00</updated>
<author>
<name>Manuel Drehwald</name>
<email>git@manuel.drehwald.info</email>
</author>
<published>2025-07-02T23:36:30+00:00</published>
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<id>urn:sha1:4a1a5a42952d05533fd4309ad0f3fe290abbf57c</id>
<content type='text'>
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<entry>
<title>add -Zoffload=Enable flag behind -Zunstable-options, to enable gpu (host) code generation</title>
<updated>2025-07-18T23:24:00+00:00</updated>
<author>
<name>Manuel Drehwald</name>
<email>git@manuel.drehwald.info</email>
</author>
<published>2025-06-18T22:29:43+00:00</published>
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<id>urn:sha1:634016478ec95c6ff933d32789e663ace78e8f82</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Pass wasm exception model to TargetOptions</title>
<updated>2025-07-18T07:35:50+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2025-07-11T08:11:03+00:00</published>
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<id>urn:sha1:12b19be741ea07934d7478bd8e450dca8f85afe5</id>
<content type='text'>
This is no longer implied by -wasm-enable-eh.
</content>
</entry>
<entry>
<title>Rollup merge of #143388 - bjorn3:lto_refactors, r=compiler-errors</title>
<updated>2025-07-17T01:58:28+00:00</updated>
<author>
<name>León Orell Valerian Liehr</name>
<email>me@fmease.dev</email>
</author>
<published>2025-07-17T01:58:28+00:00</published>
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<id>urn:sha1:be5f8f299dce5c04e2a644546e780d8a07b0b14f</id>
<content type='text'>
Various refactors to the LTO handling code

In particular reducing the sharing of code paths between fat and thin-LTO and making the fat LTO implementation more self-contained. This also moves some autodiff handling out of cg_ssa into cg_llvm given that Enzyme only works with LLVM anyway and an implementation for another backend may do things entirely differently. This will also make it a bit easier to split LTO handling out of the coordinator thread main loop into a separate loop, which should reduce the complexity of the coordinator thread.
</content>
</entry>
<entry>
<title>Avoid a bunch of unnecessary `unsafe` blocks in cg_llvm</title>
<updated>2025-07-14T08:27:08+00:00</updated>
<author>
<name>Oli Scherer</name>
<email>github333195615777966@oli-obk.de</email>
</author>
<published>2025-07-09T09:12:42+00:00</published>
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<id>urn:sha1:d3d51b4fdbd6854da015f501e6566ca17cb023e5</id>
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<entry>
<title>Rollup merge of #143633 - dillona:noinline-assert, r=fee1-dead</title>
<updated>2025-07-11T17:45:23+00:00</updated>
<author>
<name>Matthias Krüger</name>
<email>476013+matthiaskrgr@users.noreply.github.com</email>
</author>
<published>2025-07-11T17:45:23+00:00</published>
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<id>urn:sha1:7f3204f34d20e61a7581d8c9b52d00bf832a74bf</id>
<content type='text'>
fix: correct assertion to check for 'noinline' attribute presence before removal
</content>
</entry>
<entry>
<title>Make some "safe" llvm ops actually sound</title>
<updated>2025-07-10T07:27:41+00:00</updated>
<author>
<name>Oli Scherer</name>
<email>github333195615777966@oli-obk.de</email>
</author>
<published>2025-07-10T07:27:41+00:00</published>
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<id>urn:sha1:84eeca2e2fc40bb8d6641846f18af9d8fc6a9681</id>
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<entry>
<title>fix: correct assertion to check for 'noinline' attribute presence before removal</title>
<updated>2025-07-08T11:24:50+00:00</updated>
<author>
<name>Dillon Amburgey</name>
<email>dillona@dillona.com</email>
</author>
<published>2025-07-08T11:18:18+00:00</published>
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<id>urn:sha1:b2299e20b2c2a25254fb554ccc59a8b60fdc25e0</id>
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</content>
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<entry>
<title>Move dcx creation into WriteBackendMethods::codegen</title>
<updated>2025-07-03T14:43:09+00:00</updated>
<author>
<name>bjorn3</name>
<email>17426603+bjorn3@users.noreply.github.com</email>
</author>
<published>2025-07-03T14:43:09+00:00</published>
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