https://github.com/rust-lang/rust http://git.dreamy.place/mirrors/rust/atom?h=stable 2025-07-31T15:19:39+00:00 2025-07-31T15:19:39+00:00 Jana Dönszelmann jonathan@donsz.nl 2025-07-31T15:19:39+00:00 urn:sha1:5712d50648a60cb49f16f57fa5e126b5d053c612 Deduplicate `IntTy`/`UintTy`/`FloatTy`. There are identical definitions in `rustc_type_ir` and `rustc_ast`. This commit removes them and places a single definition in `rustc_ast_ir`. This requires adding `rust_span` as a dependency of `rustc_ast_ir`, but means a bunch of silly conversion functions can be removed. r? `@fmease` 2025-07-31T09:58:04+00:00 Nicholas Nethercote n.nethercote@gmail.com 2025-07-31T03:15:49+00:00 urn:sha1:704f2ca17224dc1d208423c675313521b0f49645 - Add some missing `tidy-alphabetical-*` markers. - Remove some unnecessary blank lines. 2025-07-31T05:42:00+00:00 Stuart Cook Zalathar@users.noreply.github.com 2025-07-31T05:42:00+00:00 urn:sha1:8628b78f24c01026d01b82afd3ec91a2019fe647 Implement support for `become` and explicit tail call codegen for the LLVM backend This PR implements codegen of explicit tail calls via `become` in `rustc_codegen_ssa` and support within the LLVM backend. Completes a task on (https://github.com/rust-lang/rust/issues/112788). This PR implements all the necessary bits to make explicit tail calls usable, other backends have received stubs for now and will ICE if you use `become` on them. I suspect there is some bikeshedding to be done on how we should go about implementing this for other backends, but it should be relatively straightforward for GCC after this is merged. During development I also put together a POC bytecode VM based on tail call dispatch to test these changes out and analyze the codegen to make sure it generates expected assembly. That is available [here](https://github.com/xacrimon/tcvm). 2025-07-29T07:22:24+00:00 Ralf Jung post@ralfj.de 2025-07-29T07:22:24+00:00 urn:sha1:e532080507056b242ecbcbb8e79bc95f041998d6 2025-07-28T06:36:54+00:00 Matthias Krüger 476013+matthiaskrgr@users.noreply.github.com 2025-07-28T06:36:54+00:00 urn:sha1:ec86930c1d909b8114ce055c69746ca2c84b2ef4 Various refactors to the codegen coordinator code (part 3) Continuing from https://github.com/rust-lang/rust/pull/144062 this removes an option without any known users, uses the object crate in favor of LLVM for getting the LTO bitcode and improves the coordinator channel handling. 2025-07-25T23:02:29+00:00 Joel Wejdenstål joel.wejdenstal@gmail.com 2025-07-25T19:21:42+00:00 urn:sha1:a448837045326d7c33059dc3aa2d1d87529dcf3d 2025-07-25T11:21:28+00:00 bjorn3 17426603+bjorn3@users.noreply.github.com 2025-07-25T09:42:18+00:00 urn:sha1:fe2eeabe27ce3d5b871ab903e65b4707ad015764 2025-07-23T14:09:16+00:00 WANG Rui wangrui@loongson.cn 2025-07-23T09:29:59+00:00 urn:sha1:23fda6084b5e9a618b74a9c417f5353783b72ae9 Link: https://github.com/llvm/llvm-project/pull/144383 2025-07-21T16:54:24+00:00 许杰友 Jieyou Xu (Joe) 39484203+jieyouxu@users.noreply.github.com 2025-07-21T16:54:24+00:00 urn:sha1:5e3eb2512591df0cef52404f0ea4202f58935a54 gpu offload host code generation r? ghost This will generate most of the host side code to use llvm's offload feature. The first PR will only handle automatic mem-transfers to and from the device. So if a user calls a kernel, we will copy inputs back and forth, but we won't do the actual kernel launch. Before merging, we will use LLVM's Info infrastructure to verify that the memcopies match what openmp offloa generates in C++. `LIBOMPTARGET_INFO=-1 ./my_rust_binary` should print that a memcpy to and later from the device is happening. A follow-up PR will generate the actual device-side kernel which will then do computations on the GPU. A third PR will implement manual host2device and device2host functionality, but the goal is to minimize cases where a user has to overwrite our default handling due to performance issues. I'm trying to get a full MVP out first, so this just recognizes GPU functions based on magic names. The final frontend will obviously move this over to use proper macros, like I'm already doing it for the autodiff work. This work will also be compatible with std::autodiff, so one can differentiate GPU kernels. Tracking: - https://github.com/rust-lang/rust/issues/131513 2025-07-20T06:56:08+00:00 Matthias Krüger 476013+matthiaskrgr@users.noreply.github.com 2025-07-20T06:56:08+00:00 urn:sha1:d24684ef4f78f25e559eec469a49834c0e3cccf5 Fixes for LLVM 21 This fixes compatibility issues with LLVM 21 without performing the actual upgrade. Split out from https://github.com/rust-lang/rust/pull/143684. This fixes three issues: * Updates the AMDGPU data layout for address space 8. * Makes emit-arity-indicator.rs a no_core test, so it doesn't fail on non-x86 hosts. * Explicitly sets the exception model for wasm, as this is no longer implied by `-wasm-enable-eh`.