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authorNikita Popov <npopov@redhat.com>2022-07-21 16:20:00 +0200
committerNikita Popov <npopov@redhat.com>2022-07-22 10:54:39 +0200
commit75146102197c7f35e6c38cb402b2bc1065858c54 (patch)
tree99e38b8dab86f531be5a835c894f6d328771e9e5
parent96c2df810b0b681fee63cae11ca63844792b6190 (diff)
downloadrust-75146102197c7f35e6c38cb402b2bc1065858c54.tar.gz
rust-75146102197c7f35e6c38cb402b2bc1065858c54.zip
Mark atomics as unsupported on thumbv6m
The thumbv6m target does not support atomics. Historically, LLVM
had a bug where atomic load/stores for this target were emitted
as plain load/stores rather than as libatomic calls. This was
fixed in https://reviews.llvm.org/D120026, which will be part of
LLVM 15. As we require that "atomic support" does not use libatomic,
we need to indicate that this target does not have native atomics.
-rw-r--r--compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs3
1 files changed, 2 insertions, 1 deletions
diff --git a/compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs b/compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs
index 2546ab9b7e6..dffa19ae55c 100644
--- a/compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs
@@ -14,8 +14,9 @@ pub fn target() -> Target {
             // The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
             // with +strict-align.
             features: "+strict-align".into(),
-            // There are no atomic CAS instructions available in the instruction set of the ARMv6-M
+            // There are no atomic instructions available in the instruction set of the ARMv6-M
             // architecture
+            max_atomic_width: Some(0),
             atomic_cas: false,
             ..super::thumb_base::opts()
         },