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authorbors <bors@rust-lang.org>2023-09-18 00:02:40 +0000
committerbors <bors@rust-lang.org>2023-09-18 00:02:40 +0000
commit8a7cab8d0ee9190471c819b2acfb9a2ec75308af (patch)
treeb8e43965920818bfab9200049b2c6fdf1b21603f
parent203c57dbe20aee67eaa8f7be45d1e4ef0b274109 (diff)
parent1811fe6af0d18c0cec222828287eb4368d816092 (diff)
downloadrust-8a7cab8d0ee9190471c819b2acfb9a2ec75308af.tar.gz
rust-8a7cab8d0ee9190471c819b2acfb9a2ec75308af.zip
Auto merge of #115547 - WaffleLapkin:spin_looping, r=Mark-Simulacrum
Simplify `core::hint::spin_loop`

The grouping was inconsistent and not really helpful.

r? t-libs
-rw-r--r--library/core/src/hint.rs41
1 files changed, 17 insertions, 24 deletions
diff --git a/library/core/src/hint.rs b/library/core/src/hint.rs
index 75c104ce2fa..4bf3da07354 100644
--- a/library/core/src/hint.rs
+++ b/library/core/src/hint.rs
@@ -175,34 +175,27 @@ pub fn spin_loop() {
         unsafe { crate::arch::x86_64::_mm_pause() };
     }
 
-    // RISC-V platform spin loop hint implementation
+    #[cfg(target_arch = "riscv32")]
     {
-        // RISC-V RV32 and RV64 share the same PAUSE instruction, but they are located in different
-        // modules in `core::arch`.
-        // In this case, here we call `pause` function in each core arch module.
-        #[cfg(target_arch = "riscv32")]
-        {
-            crate::arch::riscv32::pause();
-        }
-        #[cfg(target_arch = "riscv64")]
-        {
-            crate::arch::riscv64::pause();
-        }
+        crate::arch::riscv32::pause();
     }
 
-    #[cfg(any(target_arch = "aarch64", all(target_arch = "arm", target_feature = "v6")))]
+    #[cfg(target_arch = "riscv64")]
     {
-        #[cfg(target_arch = "aarch64")]
-        {
-            // SAFETY: the `cfg` attr ensures that we only execute this on aarch64 targets.
-            unsafe { crate::arch::aarch64::__isb(crate::arch::aarch64::SY) };
-        }
-        #[cfg(target_arch = "arm")]
-        {
-            // SAFETY: the `cfg` attr ensures that we only execute this on arm targets
-            // with support for the v6 feature.
-            unsafe { crate::arch::arm::__yield() };
-        }
+        crate::arch::riscv64::pause();
+    }
+
+    #[cfg(target_arch = "aarch64")]
+    {
+        // SAFETY: the `cfg` attr ensures that we only execute this on aarch64 targets.
+        unsafe { crate::arch::aarch64::__isb(crate::arch::aarch64::SY) };
+    }
+
+    #[cfg(all(target_arch = "arm", target_feature = "v6"))]
+    {
+        // SAFETY: the `cfg` attr ensures that we only execute this on arm targets
+        // with support for the v6 feature.
+        unsafe { crate::arch::arm::__yield() };
     }
 }