Auto merge of #116485 - coastalwhite:stabilize-riscv-target-features, r=Amanieu

Stabilize Ratified RISC-V Target Features

Stabilization PR for the ratified RISC-V target features. This stabilizes some of the target features tracked by #44839. This is also a part of #114544 and eventually needed for the RISC-V part of rust-lang/rfcs#3268.

There is a similar PR for the the stdarch crate which can be found at rust-lang/stdarch#1476.

This was briefly discussed on Zulip
(https://rust-lang.zulipchat.com/#narrow/stream/250483-t-compiler.2Frisc-v/topic/Stabilization.20of.20RISC-V.20Target.20Features/near/394793704).

Specifically, this PR stabilizes the:
* Atomic Instructions (A) on v2.0
* Compressed Instructions (C) on v2.0
* ~Double-Precision Floating-Point (D) on v2.2~
* ~Embedded Base (E) (Given as `RV32E` / `RV64E`) on v2.0~
* ~Single-Precision Floating-Point (F) on v2.2~
* Integer Multiplication and Division (M) on v2.0
* ~Vector Operations (V) on v1.0~
* Bit Manipulations (B) on v1.0 listed as `zba`, `zbc`, `zbs`
* Scalar Cryptography (Zk) v1.0.1 listed as `zk`, `zkn`, `zknd`, `zkne`, `zknh`, `zkr`, `zks`, `zksed`, `zksh`, `zkt`, `zbkb`, `zbkc` `zkbx`
* ~Double-Precision Floating-Point in Integer Register (Zdinx) on v1.0~
* ~Half-Precision Floating-Point (Zfh) on v1.0~
* ~Minimal Half-Precision Floating-Point (Zfhmin) on v1.0~
* ~Single-Precision Floating-Point in Integer Register (Zfinx) on v1.0~
* ~Half-Precision Floating-Point in Integer Register (Zhinx) on v1.0~
* ~Minimal Half-Precision Floating-Point in Integer Register (Zhinxmin) on v1.0~

r? `@Amanieu`

1 files changed, 20 insertions, 20 deletions

diff --git a/compiler/rustc_codegen_ssa/src/target_features.rs b/compiler/rustc_codegen_ssa/src/target_features.rs
index 13a3f432b03..9c053338c85 100644
--- a/compiler/rustc_codegen_ssa/src/target_features.rs
+++ b/compiler/rustc_codegen_ssa/src/target_features.rs
@@ -244,38 +244,38 @@ const MIPS_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[
 
 const RISCV_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[
     // tidy-alphabetical-start
-    ("a", Some(sym::riscv_target_feature)),
-    ("c", Some(sym::riscv_target_feature)),
+    ("a", None),
+    ("c", None),
     ("d", Some(sym::riscv_target_feature)),
     ("e", Some(sym::riscv_target_feature)),
     ("f", Some(sym::riscv_target_feature)),
-    ("m", Some(sym::riscv_target_feature)),
+    ("m", None),
     ("relax", Some(sym::riscv_target_feature)),
     ("unaligned-scalar-mem", Some(sym::riscv_target_feature)),
     ("v", Some(sym::riscv_target_feature)),
-    ("zba", Some(sym::riscv_target_feature)),
-    ("zbb", Some(sym::riscv_target_feature)),
-    ("zbc", Some(sym::riscv_target_feature)),
-    ("zbkb", Some(sym::riscv_target_feature)),
-    ("zbkc", Some(sym::riscv_target_feature)),
-    ("zbkx", Some(sym::riscv_target_feature)),
-    ("zbs", Some(sym::riscv_target_feature)),
+    ("zba", None),
+    ("zbb", None),
+    ("zbc", None),
+    ("zbkb", None),
+    ("zbkc", None),
+    ("zbkx", None),
+    ("zbs", None),
     ("zdinx", Some(sym::riscv_target_feature)),
     ("zfh", Some(sym::riscv_target_feature)),
     ("zfhmin", Some(sym::riscv_target_feature)),
     ("zfinx", Some(sym::riscv_target_feature)),
     ("zhinx", Some(sym::riscv_target_feature)),
     ("zhinxmin", Some(sym::riscv_target_feature)),
-    ("zk", Some(sym::riscv_target_feature)),
-    ("zkn", Some(sym::riscv_target_feature)),
-    ("zknd", Some(sym::riscv_target_feature)),
-    ("zkne", Some(sym::riscv_target_feature)),
-    ("zknh", Some(sym::riscv_target_feature)),
-    ("zkr", Some(sym::riscv_target_feature)),
-    ("zks", Some(sym::riscv_target_feature)),
-    ("zksed", Some(sym::riscv_target_feature)),
-    ("zksh", Some(sym::riscv_target_feature)),
-    ("zkt", Some(sym::riscv_target_feature)),
+    ("zk", None),
+    ("zkn", None),
+    ("zknd", None),
+    ("zkne", None),
+    ("zknh", None),
+    ("zkr", None),
+    ("zks", None),
+    ("zksed", None),
+    ("zksh", None),
+    ("zkt", None),
     // tidy-alphabetical-end
 ];