Auto merge of #44885 - lu-zero:master, r=alexcrichton

More Altivec Intrinsics

Float-specific intrinsics

2 files changed, 120 insertions, 0 deletions

diff --git a/src/etc/platform-intrinsics/powerpc.json b/src/etc/platform-intrinsics/powerpc.json
index 62684381842..acb6813887c 100644
--- a/src/etc/platform-intrinsics/powerpc.json
+++ b/src/etc/platform-intrinsics/powerpc.json
@@ -219,6 +219,76 @@
             "llvm": "vsumsws",
             "ret": "s32",
             "args": ["0", "0"]
+        },
+        {
+            "intrinsic": "madd",
+            "width": [128],
+            "llvm": "vmaddfp",
+            "ret": "f32",
+            "args": ["0", "0", "0"]
+        },
+        {
+            "intrinsic": "nmsub",
+            "width": [128],
+            "llvm": "vnmsubfp",
+            "ret": "f32",
+            "args": ["0", "0", "0"]
+        },
+        {
+            "intrinsic": "expte",
+            "width": [128],
+            "llvm": "vexptefp",
+            "ret": "f32",
+            "args": ["0"]
+        },
+        {
+            "intrinsic": "floor",
+            "width": [128],
+            "llvm": "vrfim",
+            "ret": "f32",
+            "args": ["0"]
+        },
+        {
+            "intrinsic": "ceil",
+            "width": [128],
+            "llvm": "vrfip",
+            "ret": "f32",
+            "args": ["0"]
+        },
+        {
+            "intrinsic": "round",
+            "width": [128],
+            "llvm": "vrfin",
+            "ret": "f32",
+            "args": ["0"]
+        },
+        {
+            "intrinsic": "trunc",
+            "width": [128],
+            "llvm": "vrfiz",
+            "ret": "f32",
+            "args": ["0"]
+        },
+        {
+            "intrinsic": "loge",
+            "width": [128],
+            "llvm": "vlogefp",
+            "ret": "f32",
+            "args": ["0"]
+        },
+        {
+            "intrinsic": "re",
+            "width": [128],
+            "llvm": "vrefp",
+            "ret": "f32",
+            "args": ["0"]
+        },
+        {
+            "intrinsic": "rsqrte",
+            "width": [128],
+            "llvm": "vrsqrtefp",
+            "ret": "f32",
+            "args": ["0"]
         }
     ]
 }
diff --git a/src/librustc_platform_intrinsics/powerpc.rs b/src/librustc_platform_intrinsics/powerpc.rs
index a9c56309aa8..93ee9fe06da 100644
--- a/src/librustc_platform_intrinsics/powerpc.rs
+++ b/src/librustc_platform_intrinsics/powerpc.rs
@@ -397,6 +397,56 @@ pub fn find(name: &str) -> Option<Intrinsic> {
             output: &::I32x4,
             definition: Named("llvm.ppc.altivec.vsumsws")
         },
+        "_vec_madd" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vmaddfp")
+        },
+        "_vec_nmsub" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vnmsubfp")
+        },
+        "_vec_expte" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vexptefp")
+        },
+        "_vec_floor" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vrfim")
+        },
+        "_vec_ceil" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vrfip")
+        },
+        "_vec_round" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vrfin")
+        },
+        "_vec_trunc" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vrfiz")
+        },
+        "_vec_loge" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vlogefp")
+        },
+        "_vec_re" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vrefp")
+        },
+        "_vec_rsqrte" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
+            output: &::F32x4,
+            definition: Named("llvm.ppc.altivec.vrsqrtefp")
+        },
         _ => return None,
     })
 }