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| author | bors <bors@rust-lang.org> | 2023-04-25 09:18:58 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2023-04-25 09:18:58 +0000 |
| commit | 403ebdcdef6f1f7ef091942ea0ec5b0d6a9ddd46 (patch) | |
| tree | 5edc7d6f18840378464a51b61b760364fec436dc | |
| parent | 94735c7a5ce85c4afa75006a704844fcf637a1ba (diff) | |
| parent | 7ec90e307793c5e8bd5a50e9556fdf92c6d8147d (diff) | |
| download | rust-403ebdcdef6f1f7ef091942ea0ec5b0d6a9ddd46.tar.gz rust-403ebdcdef6f1f7ef091942ea0ec5b0d6a9ddd46.zip | |
Auto merge of #101069 - zhaixiaojuan:loongarch64-inline-asm, r=Amanieu
Add loongarch64 asm! support
| -rw-r--r-- | src/asm.rs | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/asm.rs b/src/asm.rs index 65de02b3567..738cdb6f119 100644 --- a/src/asm.rs +++ b/src/asm.rs @@ -593,6 +593,8 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister { InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r", InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w", InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r", + InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => "r", + InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => "f", InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r", InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a", InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d", @@ -667,6 +669,8 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl InlineAsmRegClass::Avr(_) => unimplemented!(), InlineAsmRegClass::Bpf(_) => unimplemented!(), InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(), + InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => cx.type_i32(), + InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => cx.type_f32(), InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => cx.type_i32(), InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => cx.type_i32(), InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => cx.type_i32(), @@ -804,6 +808,7 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option } } InlineAsmRegClass::Hexagon(_) => None, + InlineAsmRegClass::LoongArch(_) => None, InlineAsmRegClass::Mips(_) => None, InlineAsmRegClass::Nvptx(_) => None, InlineAsmRegClass::PowerPC(_) => None, |