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| author | Camille GILLOT <gillot.camille@gmail.com> | 2023-05-21 07:57:26 +0000 |
|---|---|---|
| committer | Camille GILLOT <gillot.camille@gmail.com> | 2023-06-01 21:41:58 +0000 |
| commit | b90e1657449ca0a0c0907709f67276c7c583f3de (patch) | |
| tree | bbdfaf6bfd0afe31e858935448a379282d124c5e | |
| parent | 36cae3a3a2291ececa4600727e2e170d113fe1b6 (diff) | |
| download | rust-b90e1657449ca0a0c0907709f67276c7c583f3de.tar.gz rust-b90e1657449ca0a0c0907709f67276c7c583f3de.zip | |
Restrict test to x64.
4 files changed, 4 insertions, 3 deletions
diff --git a/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir b/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir index 4dea3b3da52..369a299b7bc 100644 --- a/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir +++ b/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir @@ -4,7 +4,7 @@ fn checked_shl(_1: u32, _2: u32) -> Option<u32> { debug x => _1; // in scope 0 at $DIR/checked_ops.rs:+0:20: +0:21 debug rhs => _2; // in scope 0 at $DIR/checked_ops.rs:+0:28: +0:31 let mut _0: std::option::Option<u32>; // return place in scope 0 at $DIR/checked_ops.rs:+0:41: +0:52 - scope 1 (inlined core::num::<impl u32>::checked_shl) { // at $DIR/checked_ops.rs:15:7: 15:23 + scope 1 (inlined core::num::<impl u32>::checked_shl) { // at $DIR/checked_ops.rs:16:7: 16:23 debug self => _1; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL debug rhs => _2; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL let mut _13: (u32, bool); // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL diff --git a/tests/mir-opt/pre-codegen/checked_ops.ilog2.PreCodegen.after.mir b/tests/mir-opt/pre-codegen/checked_ops.ilog2.PreCodegen.after.mir index b0a16e923b8..12be98640a7 100644 --- a/tests/mir-opt/pre-codegen/checked_ops.ilog2.PreCodegen.after.mir +++ b/tests/mir-opt/pre-codegen/checked_ops.ilog2.PreCodegen.after.mir @@ -3,7 +3,7 @@ fn ilog2(_1: u32) -> u32 { debug x => _1; // in scope 0 at $DIR/checked_ops.rs:+0:14: +0:15 let mut _0: u32; // return place in scope 0 at $DIR/checked_ops.rs:+0:25: +0:28 - scope 1 (inlined #[track_caller] core::num::<impl u32>::ilog2) { // at $DIR/checked_ops.rs:20:7: 20:14 + scope 1 (inlined #[track_caller] core::num::<impl u32>::ilog2) { // at $DIR/checked_ops.rs:21:7: 21:14 debug self => _1; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL let mut _2: std::option::Option<u32>; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL let mut _3: isize; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL diff --git a/tests/mir-opt/pre-codegen/checked_ops.rs b/tests/mir-opt/pre-codegen/checked_ops.rs index 0e6c9596efa..47681c5fa20 100644 --- a/tests/mir-opt/pre-codegen/checked_ops.rs +++ b/tests/mir-opt/pre-codegen/checked_ops.rs @@ -1,6 +1,7 @@ // compile-flags: -O -Zmir-opt-level=2 -Cdebuginfo=2 // needs-unwind // ignore-debug +// only-x86_64 #![crate_type = "lib"] #![feature(step_trait)] diff --git a/tests/mir-opt/pre-codegen/checked_ops.step_forward.PreCodegen.after.mir b/tests/mir-opt/pre-codegen/checked_ops.step_forward.PreCodegen.after.mir index dead767d20e..78f68e8ffe6 100644 --- a/tests/mir-opt/pre-codegen/checked_ops.step_forward.PreCodegen.after.mir +++ b/tests/mir-opt/pre-codegen/checked_ops.step_forward.PreCodegen.after.mir @@ -4,7 +4,7 @@ fn step_forward(_1: u32, _2: usize) -> u32 { debug x => _1; // in scope 0 at $DIR/checked_ops.rs:+0:21: +0:22 debug n => _2; // in scope 0 at $DIR/checked_ops.rs:+0:29: +0:30 let mut _0: u32; // return place in scope 0 at $DIR/checked_ops.rs:+0:42: +0:45 - scope 1 (inlined <u32 as Step>::forward) { // at $DIR/checked_ops.rs:10:5: 10:35 + scope 1 (inlined <u32 as Step>::forward) { // at $DIR/checked_ops.rs:11:5: 11:35 debug start => _1; // in scope 1 at $SRC_DIR/core/src/iter/range.rs:LL:COL debug n => _2; // in scope 1 at $SRC_DIR/core/src/iter/range.rs:LL:COL let _3: std::option::Option<u32>; // in scope 1 at $SRC_DIR/core/src/iter/range.rs:LL:COL |