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authorJames Dietz <jamesthespeedy@gmail.com>2023-04-26 21:11:14 -0400
committerJames Dietz <jamesthespeedy@gmail.com>2023-05-04 20:29:38 -0400
commitea17aa9141cde9f26ec09b423ca2efe8aa08cc33 (patch)
treefe23ced53325da8542c689b238c254822508df22
parenteb7a7434215dd9d4b7cc18746ad1d0e531c25325 (diff)
downloadrust-ea17aa9141cde9f26ec09b423ca2efe8aa08cc33.tar.gz
rust-ea17aa9141cde9f26ec09b423ca2efe8aa08cc33.zip
`--print target-cpus` shows default target cpu, updated docs
-rw-r--r--compiler/rustc_codegen_llvm/src/llvm_util.rs8
-rw-r--r--compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp11
-rw-r--r--src/doc/rustc/src/codegen-options/index.md3
3 files changed, 18 insertions, 4 deletions
diff --git a/compiler/rustc_codegen_llvm/src/llvm_util.rs b/compiler/rustc_codegen_llvm/src/llvm_util.rs
index 46692fd5e8b..71fe8d36132 100644
--- a/compiler/rustc_codegen_llvm/src/llvm_util.rs
+++ b/compiler/rustc_codegen_llvm/src/llvm_util.rs
@@ -329,7 +329,13 @@ pub(crate) fn print(req: PrintRequest, sess: &Session) {
     require_inited();
     let tm = create_informational_target_machine(sess);
     match req {
-        PrintRequest::TargetCPUs => unsafe { llvm::LLVMRustPrintTargetCPUs(tm) },
+        PrintRequest::TargetCPUs => {
+            println!(
+                "Default CPU for this target:\n    {}",
+                handle_native(sess.target.cpu.as_ref())
+            );
+            unsafe { llvm::LLVMRustPrintTargetCPUs(tm, handle_native(sess.target.cpu.as_ref())) };
+        }
         PrintRequest::TargetFeatures => print_target_features(sess, tm),
         _ => bug!("rustc_codegen_llvm can't handle print request: {:?}", req),
     }
diff --git a/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp b/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp
index 1acdc95ca8d..b6578034275 100644
--- a/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp
+++ b/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp
@@ -307,7 +307,7 @@ static size_t getLongestEntryLength(ArrayRef<KV> Table) {
   return MaxLen;
 }
 
-extern "C" void LLVMRustPrintTargetCPUs(LLVMTargetMachineRef TM) {
+extern "C" void LLVMRustPrintTargetCPUs(LLVMTargetMachineRef TM, &Char[]) {
   const TargetMachine *Target = unwrap(TM);
   const MCSubtargetInfo *MCInfo = Target->getMCSubtargetInfo();
   const Triple::ArchType HostArch = Triple(sys::getDefaultTargetTriple()).getArch();
@@ -324,7 +324,14 @@ extern "C" void LLVMRustPrintTargetCPUs(LLVMTargetMachineRef TM) {
       MaxCPULen, "native", (int)HostCPU.size(), HostCPU.data());
   }
   for (auto &CPU : CPUTable)
-    printf("    %-*s\n", MaxCPULen, CPU.Key);
+
+    printf("    %-*s", MaxCPULen, CPU.Key);
+    if (CPU.Key == Target->getTargetTriple().getArch()) {
+      printf("  default target\n");
+    }
+    else {
+      printf("\n");
+    }
   printf("\n");
 }
 
diff --git a/src/doc/rustc/src/codegen-options/index.md b/src/doc/rustc/src/codegen-options/index.md
index d7c6a884fc8..e2b859e705d 100644
--- a/src/doc/rustc/src/codegen-options/index.md
+++ b/src/doc/rustc/src/codegen-options/index.md
@@ -574,7 +574,8 @@ change in the future.
 This instructs `rustc` to generate code specifically for a particular processor.
 
 You can run `rustc --print target-cpus` to see the valid options to pass
-here. Each target has a default base CPU. Special values include:
+and the default target CPU for the current buid target.
+Each target has a default base CPU. Special values include:
 
 * `native` can be passed to use the processor of the host machine.
 * `generic` refers to an LLVM target with minimal features but modern tuning.