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authorMatthias Krüger <476013+matthiaskrgr@users.noreply.github.com>2025-04-17 00:16:21 +0200
committerGitHub <noreply@github.com>2025-04-17 00:16:21 +0200
commitff55f2af75d2a4f3143fc3ad3e24bc557c61821d (patch)
tree2d4eba11f4231c4a1e1db10040e99479038abad5
parentbb3e156f62c8a7f2f88ff70d513f35e9c1ddc40f (diff)
parent52392ec9e1ebc5bf794583e2b2b146367d36b663 (diff)
downloadrust-ff55f2af75d2a4f3143fc3ad3e24bc557c61821d.tar.gz
rust-ff55f2af75d2a4f3143fc3ad3e24bc557c61821d.zip
Rollup merge of #139440 - a4lg:riscv-feature-addition-batch-2, r=Amanieu
rustc_target: RISC-V: feature addition batch 2

Of ratified RISC-V extensions, this commit adds ones satisfying following criteria:

1.  Either discoverable through a `riscv_hwprobe` system call on Linux 6.14
    or should be very helpful even on basic needs (the `B` extension),
2.  Does not disrupt current Rust's feature handling mechanism and
3.  Not too OS-dependent (the `Supm` extension)

Due to 2., the author excluded `Zcf` (RV32 only) and `Zcd` from the list despite that they are discoverable from Linux 6.14.

Due to 3., the author excluded the `Supm` extension on the PR version 2.

This is based on the specification:
*   [The latest ratified ISA Manuals (version 20240411)](https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154769/RISC-V+Technical+Specifications)

Linux Definition: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/riscv/include/uapi/asm/hwprobe.h

LLVM Definitions:

*   [`B`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L507-L510)
*   [`Zca`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L395-L398)
*   [`Zcb`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L407-L410)
*   [`Zcmop`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L460-L463)
*   [`Zfa`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L335-L338)
*   [`Zicboz`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L89-L92)
*   [`Zicond`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L125-L128)
*   [`Zihintntl`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L148-L151)
*   [`Zimop`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L161-L162)
*   [`Ztso`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L214-L217)

The author also adds required implication: `C` implies `Zca`.

Android RISC-V target is also updated to include the `B` extension (this is just a shorthand combination of `Zba`, `Zbb` and `Zbs` extensions but possibly simplifies `target_feature` handling).

# History

## Version 1 → 2

*   Remove the `Supm` extension from the Rust target features (thanks, `@Amanieu).`

--------

Related:
*   #44839
    (`riscv_target_feature`)
*   #138823
    (my previous batch)
*   #132618
    (stabilization of the `Zfa` extension is blocked by this)

`@rustbot` r? `@Amanieu`
`@rustbot` label +T-compiler +O-riscv +A-target-feature
-rw-r--r--compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs2
-rw-r--r--compiler/rustc_target/src/target_features.rs12
-rw-r--r--tests/ui/check-cfg/target_feature.stderr10
3 files changed, 22 insertions, 2 deletions
diff --git a/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs b/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs
index 9f02ed4bcbe..b9176c939f8 100644
--- a/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs
+++ b/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs
@@ -19,7 +19,7 @@ pub(crate) fn target() -> Target {
         options: TargetOptions {
             code_model: Some(CodeModel::Medium),
             cpu: "generic-rv64".into(),
-            features: "+m,+a,+f,+d,+c,+zicsr,+zifencei,+zba,+zbb,+zbs,+v".into(),
+            features: "+m,+a,+f,+d,+c,+b,+v,+zicsr,+zifencei".into(),
             llvm_abiname: "lp64d".into(),
             supported_sanitizers: SanitizerSet::ADDRESS,
             max_atomic_width: Some(64),
diff --git a/compiler/rustc_target/src/target_features.rs b/compiler/rustc_target/src/target_features.rs
index b4ec1879fed..aeace6a40c7 100644
--- a/compiler/rustc_target/src/target_features.rs
+++ b/compiler/rustc_target/src/target_features.rs
@@ -491,7 +491,8 @@ const MIPS_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
 static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
     // tidy-alphabetical-start
     ("a", Stable, &["zaamo", "zalrsc"]),
-    ("c", Stable, &[]),
+    ("b", Unstable(sym::riscv_target_feature), &["zba", "zbb", "zbs"]),
+    ("c", Stable, &["zca"]),
     ("d", Unstable(sym::riscv_target_feature), &["f"]),
     ("e", Unstable(sym::riscv_target_feature), &[]),
     ("f", Unstable(sym::riscv_target_feature), &["zicsr"]),
@@ -520,17 +521,25 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
     ("zbkc", Stable, &[]),
     ("zbkx", Stable, &[]),
     ("zbs", Stable, &[]),
+    ("zca", Unstable(sym::riscv_target_feature), &[]),
+    ("zcb", Unstable(sym::riscv_target_feature), &["zca"]),
+    ("zcmop", Unstable(sym::riscv_target_feature), &["zca"]),
     ("zdinx", Unstable(sym::riscv_target_feature), &["zfinx"]),
+    ("zfa", Unstable(sym::riscv_target_feature), &["f"]),
     ("zfh", Unstable(sym::riscv_target_feature), &["zfhmin"]),
     ("zfhmin", Unstable(sym::riscv_target_feature), &["f"]),
     ("zfinx", Unstable(sym::riscv_target_feature), &["zicsr"]),
     ("zhinx", Unstable(sym::riscv_target_feature), &["zhinxmin"]),
     ("zhinxmin", Unstable(sym::riscv_target_feature), &["zfinx"]),
+    ("zicboz", Unstable(sym::riscv_target_feature), &[]),
     ("zicntr", Unstable(sym::riscv_target_feature), &["zicsr"]),
+    ("zicond", Unstable(sym::riscv_target_feature), &[]),
     ("zicsr", Unstable(sym::riscv_target_feature), &[]),
     ("zifencei", Unstable(sym::riscv_target_feature), &[]),
+    ("zihintntl", Unstable(sym::riscv_target_feature), &[]),
     ("zihintpause", Unstable(sym::riscv_target_feature), &[]),
     ("zihpm", Unstable(sym::riscv_target_feature), &["zicsr"]),
+    ("zimop", Unstable(sym::riscv_target_feature), &[]),
     ("zk", Stable, &["zkn", "zkr", "zkt"]),
     ("zkn", Stable, &["zbkb", "zbkc", "zbkx", "zkne", "zknd", "zknh"]),
     ("zknd", Stable, &[]),
@@ -541,6 +550,7 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
     ("zksed", Stable, &[]),
     ("zksh", Stable, &[]),
     ("zkt", Stable, &[]),
+    ("ztso", Unstable(sym::riscv_target_feature), &[]),
     ("zvbb", Unstable(sym::riscv_target_feature), &["zvkb"]),
     ("zvbc", Unstable(sym::riscv_target_feature), &["zve64x"]),
     ("zve32f", Unstable(sym::riscv_target_feature), &["zve32x", "f"]),
diff --git a/tests/ui/check-cfg/target_feature.stderr b/tests/ui/check-cfg/target_feature.stderr
index aa5fd09c0c7..4f7b8345e86 100644
--- a/tests/ui/check-cfg/target_feature.stderr
+++ b/tests/ui/check-cfg/target_feature.stderr
@@ -49,6 +49,7 @@ LL |     cfg!(target_feature = "_UNEXPECTED_VALUE");
 `avxvnni`
 `avxvnniint16`
 `avxvnniint8`
+`b`
 `backchain`
 `bf16`
 `bmi1`
@@ -318,17 +319,25 @@ LL |     cfg!(target_feature = "_UNEXPECTED_VALUE");
 `zbkc`
 `zbkx`
 `zbs`
+`zca`
+`zcb`
+`zcmop`
 `zdinx`
+`zfa`
 `zfh`
 `zfhmin`
 `zfinx`
 `zhinx`
 `zhinxmin`
+`zicboz`
 `zicntr`
+`zicond`
 `zicsr`
 `zifencei`
+`zihintntl`
 `zihintpause`
 `zihpm`
+`zimop`
 `zk`
 `zkn`
 `zknd`
@@ -339,6 +348,7 @@ LL |     cfg!(target_feature = "_UNEXPECTED_VALUE");
 `zksed`
 `zksh`
 `zkt`
+`ztso`
 `zvbb`
 `zvbc`
 `zve32f`