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| author | bors <bors@rust-lang.org> | 2025-09-22 11:15:49 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2025-09-22 11:15:49 +0000 |
| commit | 29005cb128e6d447e6bd9c110c9a684665f95985 (patch) | |
| tree | a25020539ef1a6939c6298a4f77126720d2168d9 /compiler/rustc_codegen_llvm/src/asm.rs | |
| parent | 9f32ccf35fb877270bc44a86a126440f04d676d0 (diff) | |
| parent | 8f80707bc5fa74992bdc2dc201a6461860769f28 (diff) | |
| download | rust-29005cb128e6d447e6bd9c110c9a684665f95985.tar.gz rust-29005cb128e6d447e6bd9c110c9a684665f95985.zip | |
Auto merge of #146879 - Zalathar:rollup-vm97j8b, r=Zalathar
Rollup of 9 pull requests Successful merges: - rust-lang/rust#145411 (regression test for Cow<[u8]> layout) - rust-lang/rust#146397 (std_detect on Darwin AArch64: update features) - rust-lang/rust#146791 (emit attribute for readonly non-pure inline assembly) - rust-lang/rust#146831 (Support ctr and lr as clobber-only registers in PowerPC inline assembly) - rust-lang/rust#146838 (Introduce "wrapper" helpers to rustdoc) - rust-lang/rust#146845 (Add self-profile events for target-machine creation) - rust-lang/rust#146846 (btree InternalNode::new safety comments) - rust-lang/rust#146858 (Make mips64el-unknown-linux-muslabi64 link dynamically) - rust-lang/rust#146878 (assert_unsafe_precondition: fix some incorrect check_language_ub) r? `@ghost` `@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_llvm/src/asm.rs')
| -rw-r--r-- | compiler/rustc_codegen_llvm/src/asm.rs | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs index b79176e9098..cc09fa5b69b 100644 --- a/compiler/rustc_codegen_llvm/src/asm.rs +++ b/compiler/rustc_codegen_llvm/src/asm.rs @@ -340,8 +340,8 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> { attrs.push(llvm::AttributeKind::WillReturn.create_attr(self.cx.llcx)); } else if options.contains(InlineAsmOptions::NOMEM) { attrs.push(llvm::MemoryEffects::InaccessibleMemOnly.create_attr(self.cx.llcx)); - } else { - // LLVM doesn't have an attribute to represent ReadOnly + SideEffect + } else if options.contains(InlineAsmOptions::READONLY) { + attrs.push(llvm::MemoryEffects::ReadOnlyNotPure.create_attr(self.cx.llcx)); } attributes::apply_to_callsite(result, llvm::AttributePlace::Function, &{ attrs }); @@ -662,7 +662,12 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) -> PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b", PowerPC(PowerPCInlineAsmRegClass::freg) => "f", PowerPC(PowerPCInlineAsmRegClass::vreg) => "v", - PowerPC(PowerPCInlineAsmRegClass::cr) | PowerPC(PowerPCInlineAsmRegClass::xer) => { + PowerPC( + PowerPCInlineAsmRegClass::cr + | PowerPCInlineAsmRegClass::ctr + | PowerPCInlineAsmRegClass::lr + | PowerPCInlineAsmRegClass::xer, + ) => { unreachable!("clobber-only") } RiscV(RiscVInlineAsmRegClass::reg) => "r", @@ -830,7 +835,12 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &' PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => cx.type_i32(), PowerPC(PowerPCInlineAsmRegClass::freg) => cx.type_f64(), PowerPC(PowerPCInlineAsmRegClass::vreg) => cx.type_vector(cx.type_i32(), 4), - PowerPC(PowerPCInlineAsmRegClass::cr) | PowerPC(PowerPCInlineAsmRegClass::xer) => { + PowerPC( + PowerPCInlineAsmRegClass::cr + | PowerPCInlineAsmRegClass::ctr + | PowerPCInlineAsmRegClass::lr + | PowerPCInlineAsmRegClass::xer, + ) => { unreachable!("clobber-only") } RiscV(RiscVInlineAsmRegClass::reg) => cx.type_i32(), |