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| author | bors <bors@rust-lang.org> | 2024-11-28 11:20:29 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2024-11-28 11:20:29 +0000 |
| commit | 9b4d7c6a40b328d212095c28670c629facf1557d (patch) | |
| tree | f0f0884d025a32f341ca446becc17582e1a7c486 /compiler/rustc_codegen_llvm/src/asm.rs | |
| parent | c1cfab230ebb2e9cb9f4ea69773fef956c706a71 (diff) | |
| parent | 22c5bb0bdc6ab4729d829f7f9832c454267c1781 (diff) | |
| download | rust-9b4d7c6a40b328d212095c28670c629facf1557d.tar.gz rust-9b4d7c6a40b328d212095c28670c629facf1557d.zip | |
Auto merge of #133568 - GuillaumeGomez:rollup-js22ovb, r=GuillaumeGomez
Rollup of 7 pull requests Successful merges: - #133358 (Don't type error if we fail to coerce `Pin<T>` because it doesnt contain a ref) - #133422 (Fix clobber_abi in RV32E and RV64E inline assembly) - #133452 (Support predicate registers (clobber-only) in Hexagon inline assembly) - #133463 (Fix handling of x18 in AArch64 inline assembly on ohos/trusty or with -Zfixed-x18) - #133487 (fix confusing diagnostic for reserved `##`) - #133557 (Small doc fixes in `rustc_codegen_ssa`) - #133560 (Trim extra space in 'repeated `mut`' diagnostic) r? `@ghost` `@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_llvm/src/asm.rs')
| -rw-r--r-- | compiler/rustc_codegen_llvm/src/asm.rs | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs index 6ee80c08d4a..9aa01bd1b95 100644 --- a/compiler/rustc_codegen_llvm/src/asm.rs +++ b/compiler/rustc_codegen_llvm/src/asm.rs @@ -645,6 +645,7 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) -> | Arm(ArmInlineAsmRegClass::qreg_low4) => "x", Arm(ArmInlineAsmRegClass::dreg) | Arm(ArmInlineAsmRegClass::qreg) => "w", Hexagon(HexagonInlineAsmRegClass::reg) => "r", + Hexagon(HexagonInlineAsmRegClass::preg) => unreachable!("clobber-only"), LoongArch(LoongArchInlineAsmRegClass::reg) => "r", LoongArch(LoongArchInlineAsmRegClass::freg) => "f", Mips(MipsInlineAsmRegClass::reg) => "r", @@ -813,6 +814,7 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &' | Arm(ArmInlineAsmRegClass::qreg_low8) | Arm(ArmInlineAsmRegClass::qreg_low4) => cx.type_vector(cx.type_i64(), 2), Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(), + Hexagon(HexagonInlineAsmRegClass::preg) => unreachable!("clobber-only"), LoongArch(LoongArchInlineAsmRegClass::reg) => cx.type_i32(), LoongArch(LoongArchInlineAsmRegClass::freg) => cx.type_f32(), Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(), |