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authorMatthew Maurer <mmaurer@google.com>2025-09-02 18:43:48 +0000
committerMatthew Maurer <mmaurer@google.com>2025-09-02 18:47:59 +0000
commit5d9f8fcd3ea44bdd633ecddac2aff471ffcb797f (patch)
treeb81c9920be537e7957f9eb7ae394e11aee262175 /compiler/rustc_codegen_llvm/src/context.rs
parenta2c8b0b92c14b02f0b3f96a0d5296f1090dc286b (diff)
downloadrust-5d9f8fcd3ea44bdd633ecddac2aff471ffcb797f.tar.gz
rust-5d9f8fcd3ea44bdd633ecddac2aff471ffcb797f.zip
llvm: nvptx: Layout update to match LLVM
LLVM upstream switched layouts to support 256-bit vector load/store.
Diffstat (limited to 'compiler/rustc_codegen_llvm/src/context.rs')
-rw-r--r--compiler/rustc_codegen_llvm/src/context.rs4
1 files changed, 4 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/context.rs b/compiler/rustc_codegen_llvm/src/context.rs
index 4fd6110ac4a..257c7b95666 100644
--- a/compiler/rustc_codegen_llvm/src/context.rs
+++ b/compiler/rustc_codegen_llvm/src/context.rs
@@ -217,6 +217,10 @@ pub(crate) unsafe fn create_module<'ll>(
             // LLVM 22.0 updated the default layout on avr: https://github.com/llvm/llvm-project/pull/153010
             target_data_layout = target_data_layout.replace("n8:16", "n8")
         }
+        if sess.target.arch == "nvptx64" {
+            // LLVM 22 updated the NVPTX layout to indicate 256-bit vector load/store: https://github.com/llvm/llvm-project/pull/155198
+            target_data_layout = target_data_layout.replace("-i256:256", "");
+        }
     }
 
     // Ensure the data-layout values hardcoded remain the defaults.