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| author | Dylan DPC <99973273+Dylan-DPC@users.noreply.github.com> | 2022-05-11 13:49:27 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-05-11 13:49:27 +0200 |
| commit | 2af6677de8062390b530373dc6b82468afaadd35 (patch) | |
| tree | 6eb046561e3b72bc821401e885bac568f99deea0 /compiler/rustc_codegen_llvm/src | |
| parent | f296b9a32a33bbbee495927cf13bee07e7658b89 (diff) | |
| parent | 39d99a1a14490a641777933d3f691773819b2c9f (diff) | |
| download | rust-2af6677de8062390b530373dc6b82468afaadd35.tar.gz rust-2af6677de8062390b530373dc6b82468afaadd35.zip | |
Rollup merge of #91518 - luojia65:rustdoc-riscv-arch, r=GuillaumeGomez
Add readable rustdoc display for RISC-V target This pull request adds a human readable rustdoc display for RISC-V architecture. Target configuration marked as `#[cfg(target_arch = "riscv32")]` or `#[cfg(target_arch = "riscv64")]` are pretty formatted like `RISC-V RV32` and `RISC-V RV64` in Rust docs. Before:  After: 
Diffstat (limited to 'compiler/rustc_codegen_llvm/src')
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