diff options
| author | Amanieu d'Antras <amanieu@gmail.com> | 2022-07-11 14:26:58 +0100 |
|---|---|---|
| committer | Amanieu d'Antras <amanieu@gmail.com> | 2022-07-11 14:26:58 +0100 |
| commit | e51f1b7e275584872525bbfbd7c481595b99f237 (patch) | |
| tree | ef52561e7cbc5a173e79f07186424b8241f6c0b6 /compiler/rustc_codegen_ssa | |
| parent | 50b00252aeb77b10db04d65dc9e12ce758def4b5 (diff) | |
| download | rust-e51f1b7e275584872525bbfbd7c481595b99f237.tar.gz rust-e51f1b7e275584872525bbfbd7c481595b99f237.zip | |
Keep unstable target features for asm feature checking
Inline assembly uses the target features to determine which registers are available on the current target. However it needs to be able to access unstable target features for this. Fixes #99071
Diffstat (limited to 'compiler/rustc_codegen_ssa')
| -rw-r--r-- | compiler/rustc_codegen_ssa/src/traits/backend.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/rustc_codegen_ssa/src/traits/backend.rs b/compiler/rustc_codegen_ssa/src/traits/backend.rs index 1e53c73d1bb..779bd3ea278 100644 --- a/compiler/rustc_codegen_ssa/src/traits/backend.rs +++ b/compiler/rustc_codegen_ssa/src/traits/backend.rs @@ -59,7 +59,7 @@ impl<'tcx, T> Backend<'tcx> for T where pub trait CodegenBackend { fn init(&self, _sess: &Session) {} fn print(&self, _req: PrintRequest, _sess: &Session) {} - fn target_features(&self, _sess: &Session) -> Vec<Symbol> { + fn target_features(&self, _sess: &Session, _allow_unstable: bool) -> Vec<Symbol> { vec![] } fn print_passes(&self) {} |
