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| author | Adam Gemmell <adam.gemmell@arm.com> | 2021-11-01 16:22:29 +0000 |
|---|---|---|
| committer | Adam Gemmell <adam.gemmell@arm.com> | 2021-11-03 18:04:09 +0000 |
| commit | cdd98bbdfe2fa7ce1f41725d977da9937128c681 (patch) | |
| tree | 1bdd762997b9654b7e4785ae99ec98c97f8f2c99 /compiler/rustc_codegen_ssa | |
| parent | 473eaa42e9365c47d129f72693b5d163a20cf369 (diff) | |
| download | rust-cdd98bbdfe2fa7ce1f41725d977da9937128c681.tar.gz rust-cdd98bbdfe2fa7ce1f41725d977da9937128c681.zip | |
Update aarch64 `target_feature` list for LLVM 12.
Diffstat (limited to 'compiler/rustc_codegen_ssa')
| -rw-r--r-- | compiler/rustc_codegen_ssa/src/target_features.rs | 25 |
1 files changed, 17 insertions, 8 deletions
diff --git a/compiler/rustc_codegen_ssa/src/target_features.rs b/compiler/rustc_codegen_ssa/src/target_features.rs index dbffb266be8..caeeb23feb4 100644 --- a/compiler/rustc_codegen_ssa/src/target_features.rs +++ b/compiler/rustc_codegen_ssa/src/target_features.rs @@ -36,7 +36,6 @@ const ARM_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[ ("thumb-mode", Some(sym::arm_target_feature)), ]; -// Commented features are not available in LLVM 10.0, or have since been renamed const AARCH64_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[ // FEAT_AdvSimd ("neon", Some(sym::aarch64_target_feature)), @@ -67,13 +66,13 @@ const AARCH64_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[ // FEAT_DIT ("dit", Some(sym::aarch64_target_feature)), // FEAT_FLAGM - // ("flagm", Some(sym::aarch64_target_feature)), + ("flagm", Some(sym::aarch64_target_feature)), // FEAT_SSBS ("ssbs", Some(sym::aarch64_target_feature)), // FEAT_SB ("sb", Some(sym::aarch64_target_feature)), // FEAT_PAUTH - // ("pauth", Some(sym::aarch64_target_feature)), + ("pauth", Some(sym::aarch64_target_feature)), // FEAT_DPB ("dpb", Some(sym::aarch64_target_feature)), // FEAT_DPB2 @@ -93,11 +92,11 @@ const AARCH64_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[ // FEAT_I8MM ("i8mm", Some(sym::aarch64_target_feature)), // FEAT_F32MM - // ("f32mm", Some(sym::aarch64_target_feature)), + ("f32mm", Some(sym::aarch64_target_feature)), // FEAT_F64MM - // ("f64mm", Some(sym::aarch64_target_feature)), + ("f64mm", Some(sym::aarch64_target_feature)), // FEAT_BF16 - // ("bf16", Some(sym::aarch64_target_feature)), + ("bf16", Some(sym::aarch64_target_feature)), // FEAT_RAND ("rand", Some(sym::aarch64_target_feature)), // FEAT_BTI @@ -116,13 +115,23 @@ const AARCH64_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[ ("sha3", Some(sym::aarch64_target_feature)), // FEAT_SM3 & FEAT_SM4 ("sm4", Some(sym::aarch64_target_feature)), + // FEAT_PAN + ("pan", Some(sym::aarch64_target_feature)), + // FEAT_LOR + ("lor", Some(sym::aarch64_target_feature)), + // FEAT_VHE + ("vh", Some(sym::aarch64_target_feature)), + // FEAT_PMUv3 + ("pmuv3", Some(sym::aarch64_target_feature)), + // FEAT_SPE + ("spe", Some(sym::aarch64_target_feature)), ("v8.1a", Some(sym::aarch64_target_feature)), ("v8.2a", Some(sym::aarch64_target_feature)), ("v8.3a", Some(sym::aarch64_target_feature)), ("v8.4a", Some(sym::aarch64_target_feature)), ("v8.5a", Some(sym::aarch64_target_feature)), - // ("v8.6a", Some(sym::aarch64_target_feature)), - // ("v8.7a", Some(sym::aarch64_target_feature)), + ("v8.6a", Some(sym::aarch64_target_feature)), + ("v8.7a", Some(sym::aarch64_target_feature)), ]; const X86_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[ |