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| author | Andrew Walbran <qwandor@google.com> | 2023-06-02 13:50:18 +0100 |
|---|---|---|
| committer | Andrew Walbran <qwandor@google.com> | 2023-06-02 13:50:18 +0100 |
| commit | 7269972f7336a27980ea19353a29bad0d2a1faa9 (patch) | |
| tree | 497e8513859ca363557821291db480fed4fe0ed6 /compiler/rustc_codegen_ssa | |
| parent | 8ebf04225d358efe77b822081cebef657f88d35b (diff) | |
| download | rust-7269972f7336a27980ea19353a29bad0d2a1faa9.tar.gz rust-7269972f7336a27980ea19353a29bad0d2a1faa9.zip | |
Add trustzone and virtualization target features for aarch32.
These are LLVM target features which allow the `smc` and `hvc` instructions respectively to be used in inline assembly.
Diffstat (limited to 'compiler/rustc_codegen_ssa')
| -rw-r--r-- | compiler/rustc_codegen_ssa/src/target_features.rs | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_ssa/src/target_features.rs b/compiler/rustc_codegen_ssa/src/target_features.rs index c5976a65411..6a3a31a0d60 100644 --- a/compiler/rustc_codegen_ssa/src/target_features.rs +++ b/compiler/rustc_codegen_ssa/src/target_features.rs @@ -44,6 +44,7 @@ const ARM_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[ // #[target_feature]. ("thumb-mode", Some(sym::arm_target_feature)), ("thumb2", Some(sym::arm_target_feature)), + ("trustzone", Some(sym::arm_target_feature)), ("v5te", Some(sym::arm_target_feature)), ("v6", Some(sym::arm_target_feature)), ("v6k", Some(sym::arm_target_feature)), @@ -53,6 +54,7 @@ const ARM_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[ ("vfp2", Some(sym::arm_target_feature)), ("vfp3", Some(sym::arm_target_feature)), ("vfp4", Some(sym::arm_target_feature)), + ("virtualization", Some(sym::arm_target_feature)), // tidy-alphabetical-end ]; |