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authorYuki Okushi <huyuumi.dev+love@gmail.com>2022-11-07 09:46:28 +0900
committerGitHub <noreply@github.com>2022-11-07 09:46:28 +0900
commit02a0bdee0da2b1462463468909a656d10c412e30 (patch)
tree4b9ea05b467f970d2f63046acfe3e1c14e4d6ba8 /compiler/rustc_graphviz/src
parentfe6161a6a5c3837151aa48cd43b390fa248f4d59 (diff)
parentf414715ebfda201f91f80ef9f28d9923d614d1c4 (diff)
downloadrust-02a0bdee0da2b1462463468909a656d10c412e30.tar.gz
rust-02a0bdee0da2b1462463468909a656d10c412e30.zip
Rollup merge of #104066 - TimNN:riscv-layout, r=nikic
LLVM 16: Update RISCV data layout

The RISCV data layout was changed in https://github.com/llvm/llvm-project/commit/974e2e690b4024c2677dde26cc76ec31e0047c1d.

This updates all `riscv64*` targets, though I don't really know what the difference between the `gc` and `imac` ones is.

Passes `x test codegen` at LLVM head and with the currently bundled LLVM version. Without this patch, some tests fail with:

> error: internal compiler error: compiler/rustc_codegen_llvm/src/context.rs:192:13: data-layout for target `riscv64gc-unknown-none-elf`, `e-m:e-p:64:64-i64:64-i128:128-n64-S128`, differs from LLVM target's `riscv64` default layout, `e-m:e-p:64:64-i64:64-i128:128-n32:64-S128
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