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| author | Michael Goulet <michael@errs.io> | 2024-09-11 17:23:56 -0400 |
|---|---|---|
| committer | Michael Goulet <michael@errs.io> | 2024-09-11 17:24:01 -0400 |
| commit | af8d911d63d6b38ea2da36a330b035dd2e6f89a7 (patch) | |
| tree | ad39949e1071a021f16e808ecf00f6148dd0d488 /compiler/rustc_target/src/abi | |
| parent | 954419aab01264707f116899e77be682b02764ea (diff) | |
| download | rust-af8d911d63d6b38ea2da36a330b035dd2e6f89a7.tar.gz rust-af8d911d63d6b38ea2da36a330b035dd2e6f89a7.zip | |
Also fix if in else
Diffstat (limited to 'compiler/rustc_target/src/abi')
| -rw-r--r-- | compiler/rustc_target/src/abi/call/xtensa.rs | 40 |
1 files changed, 19 insertions, 21 deletions
diff --git a/compiler/rustc_target/src/abi/call/xtensa.rs b/compiler/rustc_target/src/abi/call/xtensa.rs index cb61bf2c56b..d7b5fe9d4cc 100644 --- a/compiler/rustc_target/src/abi/call/xtensa.rs +++ b/compiler/rustc_target/src/abi/call/xtensa.rs @@ -69,29 +69,27 @@ where if must_use_stack { arg.make_indirect_byval(None); - } else { - if is_xtensa_aggregate(arg) { - // Aggregates which are <= max_size will be passed in - // registers if possible, so coerce to integers. + } else if is_xtensa_aggregate(arg) { + // Aggregates which are <= max_size will be passed in + // registers if possible, so coerce to integers. - // Use a single `xlen` int if possible, 2 * `xlen` if 2 * `xlen` alignment - // is required, and a 2-element `xlen` array if only `xlen` alignment is - // required. - if size <= 32 { - arg.cast_to(Reg::i32()); - } else { - let reg = if needed_align == 2 * 32 { Reg::i64() } else { Reg::i32() }; - let total = Size::from_bits(((size + 32 - 1) / 32) * 32); - arg.cast_to(Uniform::new(reg, total)); - } + // Use a single `xlen` int if possible, 2 * `xlen` if 2 * `xlen` alignment + // is required, and a 2-element `xlen` array if only `xlen` alignment is + // required. + if size <= 32 { + arg.cast_to(Reg::i32()); } else { - // All integral types are promoted to `xlen` - // width. - // - // We let the LLVM backend handle integral types >= xlen. - if size < 32 { - arg.extend_integer_width_to(32); - } + let reg = if needed_align == 2 * 32 { Reg::i64() } else { Reg::i32() }; + let total = Size::from_bits(((size + 32 - 1) / 32) * 32); + arg.cast_to(Uniform::new(reg, total)); + } + } else { + // All integral types are promoted to `xlen` + // width. + // + // We let the LLVM backend handle integral types >= xlen. + if size < 32 { + arg.extend_integer_width_to(32); } } } |
