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| author | Flakebi <flakebi@t-online.de> | 2025-01-02 22:42:10 +0100 |
|---|---|---|
| committer | Flakebi <flakebi@t-online.de> | 2025-01-16 00:26:55 +0100 |
| commit | e7e52029786aca443a20b95d46dd409cad96103f (patch) | |
| tree | ea2d8cdce59fd869066ce2b54ed37188be3a35b5 /compiler/rustc_target/src | |
| parent | bf6f8a4d328f7f3b0f6ea8205ad28591cc11aafd (diff) | |
| download | rust-e7e52029786aca443a20b95d46dd409cad96103f.tar.gz rust-e7e52029786aca443a20b95d46dd409cad96103f.zip | |
Add gpu-kernel calling convention
The amdgpu-kernel calling convention was reverted in commit f6b21e90d1ec01081bc2619efb68af6788a63d65 due to inactivity in the amdgpu target. Introduce a `gpu-kernel` calling convention that translates to `ptx_kernel` or `amdgpu_kernel`, depending on the target that rust compiles for.
Diffstat (limited to 'compiler/rustc_target/src')
| -rw-r--r-- | compiler/rustc_target/src/callconv/mod.rs | 3 | ||||
| -rw-r--r-- | compiler/rustc_target/src/json.rs | 1 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/mod.rs | 1 |
3 files changed, 5 insertions, 0 deletions
diff --git a/compiler/rustc_target/src/callconv/mod.rs b/compiler/rustc_target/src/callconv/mod.rs index 746e8173807..fc17b72a23b 100644 --- a/compiler/rustc_target/src/callconv/mod.rs +++ b/compiler/rustc_target/src/callconv/mod.rs @@ -547,6 +547,8 @@ pub enum Conv { PtxKernel, + GpuKernel, + X86Fastcall, X86Intr, X86Stdcall, @@ -866,6 +868,7 @@ impl FromStr for Conv { "X86VectorCall" => Ok(Conv::X86VectorCall), "X86_64SysV" => Ok(Conv::X86_64SysV), "X86_64Win64" => Ok(Conv::X86_64Win64), + "GpuKernel" => Ok(Conv::GpuKernel), "AvrInterrupt" => Ok(Conv::AvrInterrupt), "AvrNonBlockingInterrupt" => Ok(Conv::AvrNonBlockingInterrupt), "RiscvInterrupt(machine)" => { diff --git a/compiler/rustc_target/src/json.rs b/compiler/rustc_target/src/json.rs index b09d8d724ef..961cce5d6b9 100644 --- a/compiler/rustc_target/src/json.rs +++ b/compiler/rustc_target/src/json.rs @@ -113,6 +113,7 @@ impl ToJson for crate::abi::call::Conv { Self::X86VectorCall => "X86VectorCall", Self::X86_64SysV => "X86_64SysV", Self::X86_64Win64 => "X86_64Win64", + Self::GpuKernel => "GpuKernel", Self::AvrInterrupt => "AvrInterrupt", Self::AvrNonBlockingInterrupt => "AvrNonBlockingInterrupt", Self::RiscvInterrupt { kind } => { diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs index 02962d55a60..48c493cc2e1 100644 --- a/compiler/rustc_target/src/spec/mod.rs +++ b/compiler/rustc_target/src/spec/mod.rs @@ -2854,6 +2854,7 @@ impl Target { } Win64 { .. } | SysV64 { .. } => self.arch == "x86_64", PtxKernel => self.arch == "nvptx64", + GpuKernel => ["amdgpu", "nvptx64"].contains(&&self.arch[..]), Msp430Interrupt => self.arch == "msp430", RiscvInterruptM | RiscvInterruptS => ["riscv32", "riscv64"].contains(&&self.arch[..]), AvrInterrupt | AvrNonBlockingInterrupt => self.arch == "avr", |