Add {thumb,arm}v5te-none-eabi targets

3 files changed, 93 insertions, 0 deletions

diff --git a/compiler/rustc_target/src/spec/armv5te_none_eabi.rs b/compiler/rustc_target/src/spec/armv5te_none_eabi.rs
new file mode 100644
index 00000000000..c78928be0d2
--- /dev/null
+++ b/compiler/rustc_target/src/spec/armv5te_none_eabi.rs
@@ -0,0 +1,50 @@
+//! Targets the ARMv5TE, with code as `a32` code by default.
+
+use crate::spec::{
+    cvs, LinkerFlavor, LldFlavor, PanicStrategy, RelocModel, Target, TargetOptions
+};
+
+pub fn target() -> Target {
+    Target {
+        llvm_target: "armv5te-none-eabi".into(),
+        pointer_width: 32,
+        arch: "arm".into(),
+        /* Data layout args are '-' separated:
+         * little endian
+         * stack is 64-bit aligned (EABI)
+         * pointers are 32-bit
+         * i64 must be 64-bit aligned (EABI)
+         * mangle names with ELF style
+         * native integers are 32-bit
+         * All other elements are default
+         */
+        data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
+
+        options: TargetOptions {
+            abi: "eabi".into(),
+            linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld),
+            linker: Some("rust-lld".into()),
+            // extra args passed to the external assembler (assuming `arm-none-eabi-as`):
+            // * activate t32/a32 interworking
+            // * use arch ARMv5TE
+            // * use little-endian
+            asm_args: cvs!["-mthumb-interwork", "-march=armv5te", "-mlittle-endian",],
+            // minimum extra features, these cannot be disabled via -C
+            // Also force-enable 32-bit atomics, which allows the use of atomic load/store only.
+            // The resulting atomics are ABI incompatible with atomics backed by libatomic.
+            features: "+soft-float,+strict-align,+atomics-32".into(),
+            main_needs_argc_argv: false,
+            // don't have atomic compare-and-swap
+            atomic_cas: false,
+            has_thumb_interworking: true,
+            relocation_model: RelocModel::Static,
+            panic_strategy: PanicStrategy::Abort,
+            // from thumb_base, rust-lang/rust#44993.
+            emit_debug_gdb_scripts: false,
+            // from thumb_base, apparently gcc/clang give enums a minimum of 8 bits on no-os targets
+            c_enum_min_bits: 8,
+
+            ..Default::default()
+        },
+    }
+}
diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs
index 2459b0280cd..6ddb50989b4 100644
--- a/compiler/rustc_target/src/spec/mod.rs
+++ b/compiler/rustc_target/src/spec/mod.rs
@@ -1082,6 +1082,8 @@ supported_targets! {
     ("mipsel-unknown-none", mipsel_unknown_none),
     ("thumbv4t-none-eabi", thumbv4t_none_eabi),
     ("armv4t-none-eabi", armv4t_none_eabi),
+    ("thumbv5te-none-eabi", thumbv5te_none_eabi),
+    ("armv5te-none-eabi", armv5te_none_eabi),
 
     ("aarch64_be-unknown-linux-gnu", aarch64_be_unknown_linux_gnu),
     ("aarch64-unknown-linux-gnu_ilp32", aarch64_unknown_linux_gnu_ilp32),
diff --git a/compiler/rustc_target/src/spec/thumbv5te_none_eabi.rs b/compiler/rustc_target/src/spec/thumbv5te_none_eabi.rs
new file mode 100644
index 00000000000..021b0e0eb62
--- /dev/null
+++ b/compiler/rustc_target/src/spec/thumbv5te_none_eabi.rs
@@ -0,0 +1,41 @@
+//! Targets the ARMv5TE, with code as `t32` code by default.
+
+use crate::spec::{cvs, FramePointer, Target, TargetOptions};
+
+pub fn target() -> Target {
+    Target {
+        llvm_target: "thumbv5te-none-eabi".into(),
+        pointer_width: 32,
+        arch: "arm".into(),
+        /* Data layout args are '-' separated:
+         * little endian
+         * stack is 64-bit aligned (EABI)
+         * pointers are 32-bit
+         * i64 must be 64-bit aligned (EABI)
+         * mangle names with ELF style
+         * native integers are 32-bit
+         * All other elements are default
+         */
+        data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
+
+        options: TargetOptions {
+            abi: "eabi".into(),
+            // extra args passed to the external assembler (assuming `arm-none-eabi-as`):
+            // * activate t32/a32 interworking
+            // * use arch ARMv5TE
+            // * use little-endian
+            asm_args: cvs!["-mthumb-interwork", "-march=armv5te", "-mlittle-endian",],
+            // minimum extra features, these cannot be disabled via -C
+            // Also force-enable 32-bit atomics, which allows the use of atomic load/store only.
+            // The resulting atomics are ABI incompatible with atomics backed by libatomic.
+            features: "+soft-float,+strict-align,+atomics-32".into(),
+            frame_pointer: FramePointer::MayOmit,
+            main_needs_argc_argv: false,
+            // don't have atomic compare-and-swap
+            atomic_cas: false,
+            has_thumb_interworking: true,
+
+            ..super::thumb_base::opts()
+        },
+    }
+}