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authorAmanieu d'Antras <amanieu@gmail.com>2023-11-29 20:12:12 +0000
committerAmanieu d'Antras <amanieu@gmail.com>2023-11-30 07:48:09 +0000
commit4fe088329cb1c78484c57873e0b4770df9aa351c (patch)
tree498ed7bedfc2465325a60f8897bb216406050557 /library/stdarch/crates/stdarch-test/src
parent9b4a79c5d4ff3a7e0e857dac6f8e351c7a2c0e1c (diff)
downloadrust-4fe088329cb1c78484c57873e0b4770df9aa351c.tar.gz
rust-4fe088329cb1c78484c57873e0b4770df9aa351c.zip
Work around CI failures for the ARM target
These seem to have been introduced by recent LLVM changes.

* The instruction limit for vld*/vst* has been raised. This is not a
significant issue, it is only used for testing.
* vld*/vst* instructions are generated with overly strict alignments:
https://github.com/rust-lang/stdarch/issues/1217
* vtbl/vtbx instrinsics are failing intrinsic-test for unknown reasons.
Diffstat (limited to 'library/stdarch/crates/stdarch-test/src')
-rw-r--r--library/stdarch/crates/stdarch-test/src/lib.rs27
1 files changed, 6 insertions, 21 deletions
diff --git a/library/stdarch/crates/stdarch-test/src/lib.rs b/library/stdarch/crates/stdarch-test/src/lib.rs
index 7ea189ff500..05298d8c644 100644
--- a/library/stdarch/crates/stdarch-test/src/lib.rs
+++ b/library/stdarch/crates/stdarch-test/src/lib.rs
@@ -124,29 +124,14 @@ pub fn assert(shim_addr: usize, fnname: &str, expected: &str) {
                 // Intrinsics using `cvtpi2ps` are typically "composites" and
                 // in some cases exceed the limit.
                 "cvtpi2ps" => 25,
-                // core_arch/src/arm_shared/simd32
                 // vfmaq_n_f32_vfma : #instructions = 26 >= 22 (limit)
-                "usad8" | "vfma" | "vfms" => 27,
-                "qadd8" | "qsub8" | "sadd8" | "sel" | "shadd8" | "shsub8" | "usub8" | "ssub8" => 29,
-                // core_arch/src/arm_shared/simd32
-                // vst1q_s64_x4_vst1 : #instructions = 27 >= 22 (limit)
-                "vld3" => 28,
-                // core_arch/src/arm_shared/simd32
-                // vld4q_lane_u32_vld4 : #instructions = 36 >= 22 (limit)
-                "vld4" => 37,
-                // core_arch/src/arm_shared/simd32
-                // vst1q_s64_x4_vst1 : #instructions = 40 >= 22 (limit)
-                "vst1" => 41,
-                // core_arch/src/arm_shared/simd32
-                // vst3q_u32_vst3 : #instructions = 25 >= 22 (limit)
-                "vst3" => 26,
-                // core_arch/src/arm_shared/simd32
-                // vst4q_u32_vst4 : #instructions = 33 >= 22 (limit)
-                "vst4" => 34,
-
+                "vfma" | "vfms" => 27,
                 // core_arch/src/arm_shared/simd32
-                // vst1q_p64_x4_nop : #instructions = 33 >= 22 (limit)
-                "nop" if fnname.contains("vst1q_p64") => 34,
+                "usad8" | "qadd8" | "qsub8" | "sadd8" | "sel" | "shadd8" | "shsub8" | "usub8"
+                | "ssub8" => 29,
+                // core_arch/src/arm_shared/neon
+                _ if fnname.contains("_vld") => 50,
+                _ if fnname.contains("_vst") => 50,
 
                 // Original limit was 20 instructions, but ARM DSP Intrinsics
                 // are exactly 20 instructions long. So, bump the limit to 22