Refactor stdsimd

This commit:

* renames `coresimd` to `core_arch` and `stdsimd` to `std_detect`

* `std_detect` does no longer depend on `core_arch` - it is a freestanding
  `no_std` library that only depends on `core` - it is renamed to `std_detect`

* moves the top-level coresimd and stdsimd directories into the appropriate
  crates/... directories - this simplifies creating crate.io releases of these crates

* moves the top-level `coresimd` and `stdsimd` sub-directories into their
  corresponding crates in `crates/{core_arch, std_detect}`.

3 files changed, 38 insertions, 11 deletions

diff --git a/library/stdarch/examples/Cargo.toml b/library/stdarch/examples/Cargo.toml
new file mode 100644
index 00000000000..6ac184606ef
--- /dev/null
+++ b/library/stdarch/examples/Cargo.toml
@@ -0,0 +1,27 @@
+[package]
+name = "stdsimd_examples"
+version = "0.0.0"
+authors = [
+    "Alex Crichton <alex@alexcrichton.com>",
+    "Andrew Gallant <jamslam@gmail.com>",
+    "Gonzalo Brito Gadeschi <gonzalobg88@gmail.com>",
+]
+description = "Examples of the stdsimd crate."
+
+[dependencies]
+core_arch = { path = "../crates/core_arch" }
+std_detect = { path = "../crates/std_detect" }
+quickcheck = "0.8"
+rand = "0.6"
+
+[target.'cfg(target_arch = "wasm32")'.dependencies]
+rand = { version = "0.6", features = ["wasm-bindgen"] }
+
+[[bin]]
+name = "hex"
+path = "hex.rs"
+
+[[example]]
+name = "wasm"
+crate-type = ["cdylib"]
+path = "wasm.rs"
diff --git a/library/stdarch/examples/hex.rs b/library/stdarch/examples/hex.rs
index 28b85819858..37f2ce70160 100644
--- a/library/stdarch/examples/hex.rs
+++ b/library/stdarch/examples/hex.rs
@@ -8,7 +8,7 @@
 //!
 //! You can test out this program via:
 //!
-//!     echo test | cargo +nightly run --release --example hex -p stdsimd
+//!     echo test | cargo +nightly run --release hex
 //!
 //! and you should see `746573740a` get printed out.
 
@@ -28,11 +28,10 @@
 )]
 
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
-#[macro_use]
-extern crate stdsimd;
+#[macro_use(is_x86_feature_detected)]
+extern crate std_detect;
 
-#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
-extern crate stdsimd;
+extern crate core_arch;
 
 #[cfg(test)]
 #[macro_use]
@@ -42,9 +41,9 @@ use std::io::{self, Read};
 use std::str;
 
 #[cfg(target_arch = "x86")]
-use stdsimd::arch::x86::*;
+use core_arch::arch::x86::*;
 #[cfg(target_arch = "x86_64")]
-use stdsimd::arch::x86_64::*;
+use core_arch::arch::x86_64::*;
 
 fn main() {
     let mut input = Vec::new();
@@ -290,8 +289,9 @@ mod benches {
         len: usize,
         f: for<'a> unsafe fn(&[u8], &'a mut [u8]) -> Result<&'a str, usize>,
     ) {
-        let input = rand::thread_rng()
-            .gen_iter::<u8>()
+        let mut rng = rand::thread_rng();
+        let input = std::iter::repeat(())
+            .map(|()| rng.gen::<u8>())
             .take(len)
             .collect::<Vec<_>>();
         let mut dst = vec![0; input.len() * 2];
diff --git a/library/stdarch/examples/wasm.rs b/library/stdarch/examples/wasm.rs
index 6d0fdeb02b5..93124e69277 100644
--- a/library/stdarch/examples/wasm.rs
+++ b/library/stdarch/examples/wasm.rs
@@ -3,11 +3,11 @@
 #![feature(stdsimd)]
 #![cfg(target_arch = "wasm32")]
 
-extern crate stdsimd;
+extern crate core_arch;
 
 use std::ptr;
 
-use stdsimd::arch::wasm32::*;
+use core_arch::arch::wasm32::*;
 
 static mut HEAD: *mut *mut u8 = 0 as _;