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authorRalf Jung <post@ralfj.de>2025-03-03 14:47:06 +0100
committerAmanieu d'Antras <amanieu@gmail.com>2025-03-03 14:50:07 +0000
commitf5a577c2d7aae7e9dbed4f4818d90d12a84ad2b3 (patch)
tree52f2bbf62bcccab68d77b886959f315eb3c19d10 /library/stdarch
parent5b0c5d2dad3ff68d95aefa2fadb37711c8a6ea15 (diff)
downloadrust-f5a577c2d7aae7e9dbed4f4818d90d12a84ad2b3.tar.gz
rust-f5a577c2d7aae7e9dbed4f4818d90d12a84ad2b3.zip
make _mm256_zero{upper,all} safe
Diffstat (limited to 'library/stdarch')
-rw-r--r--library/stdarch/crates/core_arch/src/x86/avx.rs8
1 files changed, 4 insertions, 4 deletions
diff --git a/library/stdarch/crates/core_arch/src/x86/avx.rs b/library/stdarch/crates/core_arch/src/x86/avx.rs
index 5a8ed54fae1..f0a1ec04fc6 100644
--- a/library/stdarch/crates/core_arch/src/x86/avx.rs
+++ b/library/stdarch/crates/core_arch/src/x86/avx.rs
@@ -1053,8 +1053,8 @@ pub fn _mm256_cvtsi256_si32(a: __m256i) -> i32 {
 #[target_feature(enable = "avx")]
 #[cfg_attr(test, assert_instr(vzeroall))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _mm256_zeroall() {
-    vzeroall()
+pub fn _mm256_zeroall() {
+    unsafe { vzeroall() }
 }
 
 /// Zeroes the upper 128 bits of all YMM registers;
@@ -1065,8 +1065,8 @@ pub unsafe fn _mm256_zeroall() {
 #[target_feature(enable = "avx")]
 #[cfg_attr(test, assert_instr(vzeroupper))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _mm256_zeroupper() {
-    vzeroupper()
+pub fn _mm256_zeroupper() {
+    unsafe { vzeroupper() }
 }
 
 /// Shuffles single-precision (32-bit) floating-point elements in `a`