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| author | zhaixiaojuan <zhaixiaojuan@loongson.cn> | 2022-07-07 15:46:10 +0800 |
|---|---|---|
| committer | wangrui <wangrui@loongson.cn> | 2023-04-04 17:05:08 +0800 |
| commit | ccf54177990bd569ec1903735e2c55b6b68471a8 (patch) | |
| tree | 4ec068d491a4f637081b8011ff83ce633cc4e03b /src/bootstrap | |
| parent | 10f7ba562a2f84ff2cfc6d5beec795c24c7e15cd (diff) | |
| download | rust-ccf54177990bd569ec1903735e2c55b6b68471a8.tar.gz rust-ccf54177990bd569ec1903735e2c55b6b68471a8.zip | |
Enable loongarch64 LLVM target
Diffstat (limited to 'src/bootstrap')
| -rw-r--r-- | src/bootstrap/llvm.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/bootstrap/llvm.rs b/src/bootstrap/llvm.rs index de06f8ca8c0..55b2da7872d 100644 --- a/src/bootstrap/llvm.rs +++ b/src/bootstrap/llvm.rs @@ -291,7 +291,7 @@ impl Step for Llvm { let llvm_targets = match &builder.config.llvm_targets { Some(s) => s, None => { - "AArch64;ARM;BPF;Hexagon;MSP430;Mips;NVPTX;PowerPC;RISCV;\ + "AArch64;ARM;BPF;Hexagon;LoongArch;MSP430;Mips;NVPTX;PowerPC;RISCV;\ Sparc;SystemZ;WebAssembly;X86" } }; |