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| author | Caiweiran <cai.weiran.zte.com.cn> | 2025-07-28 16:46:25 +0000 |
|---|---|---|
| committer | Caiweiran <cai.weiran.zte.com.cn> | 2025-08-18 19:37:13 +0000 |
| commit | 9d08596a2e315cdaa13a4c98e30c8b14853a9e9a (patch) | |
| tree | 5e350ed43b977a1b9a3a0b9b840d290242732a22 /tests/codegen-llvm/enum | |
| parent | 425a9c0a0e365c0b8c6cfd00c2ded83a73bed9a0 (diff) | |
| download | rust-9d08596a2e315cdaa13a4c98e30c8b14853a9e9a.tar.gz rust-9d08596a2e315cdaa13a4c98e30c8b14853a9e9a.zip | |
tests: fix RISC-V failures and adjust transmute-scalar.rs target
Resolve several ./x test failures on RISC-V caused by ABI and codegen differences. Update multiple codegen-llvm tests for compatibility, and explicitly set the target for transmute-scalar.rs to x86_64 to ensure consistent behavior across hosts.
Diffstat (limited to 'tests/codegen-llvm/enum')
| -rw-r--r-- | tests/codegen-llvm/enum/enum-aggregate.rs | 8 | ||||
| -rw-r--r-- | tests/codegen-llvm/enum/enum-match.rs | 2 | ||||
| -rw-r--r-- | tests/codegen-llvm/enum/enum-transparent-extract.rs | 2 |
3 files changed, 6 insertions, 6 deletions
diff --git a/tests/codegen-llvm/enum/enum-aggregate.rs b/tests/codegen-llvm/enum/enum-aggregate.rs index 0161e5f3fa1..f58d7ef12b6 100644 --- a/tests/codegen-llvm/enum/enum-aggregate.rs +++ b/tests/codegen-llvm/enum/enum-aggregate.rs @@ -27,7 +27,7 @@ fn make_none_bool() -> Option<bool> { #[no_mangle] fn make_some_ordering(x: Ordering) -> Option<Ordering> { - // CHECK-LABEL: i8 @make_some_ordering(i8 %x) + // CHECK-LABEL: i8 @make_some_ordering(i8{{( signext)?}} %x) // CHECK-NEXT: start: // CHECK-NEXT: ret i8 %x Some(x) @@ -35,7 +35,7 @@ fn make_some_ordering(x: Ordering) -> Option<Ordering> { #[no_mangle] fn make_some_u16(x: u16) -> Option<u16> { - // CHECK-LABEL: { i16, i16 } @make_some_u16(i16 %x) + // CHECK-LABEL: { i16, i16 } @make_some_u16(i16{{( zeroext)?}} %x) // CHECK-NEXT: start: // CHECK-NEXT: %0 = insertvalue { i16, i16 } { i16 1, i16 poison }, i16 %x, 1 // CHECK-NEXT: ret { i16, i16 } %0 @@ -52,7 +52,7 @@ fn make_none_u16() -> Option<u16> { #[no_mangle] fn make_some_nzu32(x: NonZero<u32>) -> Option<NonZero<u32>> { - // CHECK-LABEL: i32 @make_some_nzu32(i32 %x) + // CHECK-LABEL: i32 @make_some_nzu32(i32{{( signext)?}} %x) // CHECK-NEXT: start: // CHECK-NEXT: ret i32 %x Some(x) @@ -114,7 +114,7 @@ fn make_uninhabited_err_indirectly(n: Never) -> Result<u32, Never> { fn make_fully_uninhabited_result(v: u32, n: Never) -> Result<(u32, Never), (Never, u32)> { // Actually reaching this would be UB, so we don't actually build a result. - // CHECK-LABEL: { i32, i32 } @make_fully_uninhabited_result(i32 %v) + // CHECK-LABEL: { i32, i32 } @make_fully_uninhabited_result(i32{{( signext)?}} %v) // CHECK-NEXT: start: // CHECK-NEXT: call void @llvm.trap() // CHECK-NEXT: call void @llvm.trap() diff --git a/tests/codegen-llvm/enum/enum-match.rs b/tests/codegen-llvm/enum/enum-match.rs index 091c4e9adf4..20e2006e3eb 100644 --- a/tests/codegen-llvm/enum/enum-match.rs +++ b/tests/codegen-llvm/enum/enum-match.rs @@ -739,7 +739,7 @@ pub enum Tricky { const _: () = assert!(std::intrinsics::discriminant_value(&Tricky::V100) == 100); -// CHECK-LABEL: define noundef{{( range\(i8 [0-9]+, [0-9]+\))?}} i8 @discriminant6(i8 noundef %e) +// CHECK-LABEL: define noundef{{( range\(i8 [0-9]+, [0-9]+\))?}} i8 @discriminant6(i8 noundef{{( zeroext)?}} %e) // CHECK-NEXT: start: // CHECK-NEXT: %[[REL_VAR:.+]] = add i8 %e, -66 // CHECK-NEXT: %[[IS_NICHE:.+]] = icmp ult i8 %[[REL_VAR]], -56 diff --git a/tests/codegen-llvm/enum/enum-transparent-extract.rs b/tests/codegen-llvm/enum/enum-transparent-extract.rs index c5efb8d472b..1435e6ec802 100644 --- a/tests/codegen-llvm/enum/enum-transparent-extract.rs +++ b/tests/codegen-llvm/enum/enum-transparent-extract.rs @@ -9,7 +9,7 @@ pub enum Never {} #[no_mangle] pub fn make_unmake_result_never(x: i32) -> i32 { - // CHECK-LABEL: define i32 @make_unmake_result_never(i32 %x) + // CHECK-LABEL: define i32 @make_unmake_result_never(i32{{( signext)?}} %x) // CHECK: start: // CHECK-NEXT: ret i32 %x |