Merge pull request #20268 from lnicola/sync-from-rust

minor: Sync from downstream

33 files changed, 796 insertions, 556 deletions

diff --git a/tests/codegen/const-vector.rs b/tests/codegen/const-vector.rs
index 42921442e03..a2249f4fff7 100644
--- a/tests/codegen/const-vector.rs
+++ b/tests/codegen/const-vector.rs
@@ -16,18 +16,9 @@
 #![feature(mips_target_feature)]
 #![allow(non_camel_case_types)]
 
-// Setting up structs that can be used as const vectors
-#[repr(simd)]
-#[derive(Clone)]
-pub struct i8x2([i8; 2]);
-
-#[repr(simd)]
-#[derive(Clone)]
-pub struct f32x2([f32; 2]);
-
-#[repr(simd, packed)]
-#[derive(Copy, Clone)]
-pub struct Simd<T, const N: usize>([T; N]);
+#[path = "../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::{PackedSimd as Simd, f32x2, i8x2};
 
 // The following functions are required for the tests to ensure
 // that they are called with a const vector
@@ -45,7 +36,7 @@ extern "unadjusted" {
 
 // Ensure the packed variant of the simd struct does not become a const vector
 // if the size is not a power of 2
-// CHECK: %"Simd<i32, 3>" = type { [3 x i32] }
+// CHECK: %"minisimd::PackedSimd<i32, 3>" = type { [3 x i32] }
 
 #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
@@ -54,27 +45,34 @@ extern "unadjusted" {
 pub fn do_call() {
     unsafe {
         // CHECK: call void @test_i8x2(<2 x i8> <i8 32, i8 64>
-        test_i8x2(const { i8x2([32, 64]) });
+        test_i8x2(const { i8x2::from_array([32, 64]) });
 
         // CHECK: call void @test_i8x2_two_args(<2 x i8> <i8 32, i8 64>, <2 x i8> <i8 8, i8 16>
-        test_i8x2_two_args(const { i8x2([32, 64]) }, const { i8x2([8, 16]) });
+        test_i8x2_two_args(
+            const { i8x2::from_array([32, 64]) },
+            const { i8x2::from_array([8, 16]) },
+        );
 
         // CHECK: call void @test_i8x2_mixed_args(<2 x i8> <i8 32, i8 64>, i32 43, <2 x i8> <i8 8, i8 16>
-        test_i8x2_mixed_args(const { i8x2([32, 64]) }, 43, const { i8x2([8, 16]) });
+        test_i8x2_mixed_args(
+            const { i8x2::from_array([32, 64]) },
+            43,
+            const { i8x2::from_array([8, 16]) },
+        );
 
         // CHECK: call void @test_i8x2_arr(<2 x i8> <i8 32, i8 64>
-        test_i8x2_arr(const { i8x2([32, 64]) });
+        test_i8x2_arr(const { i8x2::from_array([32, 64]) });
 
         // CHECK: call void @test_f32x2(<2 x float> <float 0x3FD47AE140000000, float 0x3FE47AE140000000>
-        test_f32x2(const { f32x2([0.32, 0.64]) });
+        test_f32x2(const { f32x2::from_array([0.32, 0.64]) });
 
         // CHECK: void @test_f32x2_arr(<2 x float> <float 0x3FD47AE140000000, float 0x3FE47AE140000000>
-        test_f32x2_arr(const { f32x2([0.32, 0.64]) });
+        test_f32x2_arr(const { f32x2::from_array([0.32, 0.64]) });
 
         // CHECK: call void @test_simd(<4 x i32> <i32 2, i32 4, i32 6, i32 8>
         test_simd(const { Simd::<i32, 4>([2, 4, 6, 8]) });
 
-        // CHECK: call void @test_simd_unaligned(%"Simd<i32, 3>" %1
+        // CHECK: call void @test_simd_unaligned(%"minisimd::PackedSimd<i32, 3>" %1
         test_simd_unaligned(const { Simd::<i32, 3>([2, 4, 6]) });
     }
 }
diff --git a/tests/codegen/enum/enum-discriminant-eq.rs b/tests/codegen/enum/enum-discriminant-eq.rs
new file mode 100644
index 00000000000..0494c5f551b
--- /dev/null
+++ b/tests/codegen/enum/enum-discriminant-eq.rs
@@ -0,0 +1,223 @@
+//@ compile-flags: -Copt-level=3 -Zmerge-functions=disabled
+//@ min-llvm-version: 20
+//@ only-64bit
+
+// The `derive(PartialEq)` on enums with field-less variants compares discriminants,
+// so make sure we emit that in some reasonable way.
+
+#![crate_type = "lib"]
+#![feature(ascii_char)]
+#![feature(core_intrinsics)]
+#![feature(repr128)]
+
+use std::ascii::Char as AC;
+use std::cmp::Ordering;
+use std::intrinsics::discriminant_value;
+use std::num::NonZero;
+
+// A type that's bigger than `isize`, unlike the usual cases that have small tags.
+#[repr(u128)]
+pub enum Giant {
+    Two = 2,
+    Three = 3,
+    Four = 4,
+}
+
+#[unsafe(no_mangle)]
+pub fn opt_bool_eq_discr(a: Option<bool>, b: Option<bool>) -> bool {
+    // CHECK-LABEL: @opt_bool_eq_discr(
+    // CHECK: %[[A:.+]] = icmp ne i8 %a, 2
+    // CHECK: %[[B:.+]] = icmp eq i8 %b, 2
+    // CHECK: %[[R:.+]] = xor i1 %[[A]], %[[B]]
+    // CHECK: ret i1 %[[R]]
+
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+#[unsafe(no_mangle)]
+pub fn opt_ord_eq_discr(a: Option<Ordering>, b: Option<Ordering>) -> bool {
+    // CHECK-LABEL: @opt_ord_eq_discr(
+    // CHECK: %[[A:.+]] = icmp ne i8 %a, 2
+    // CHECK: %[[B:.+]] = icmp eq i8 %b, 2
+    // CHECK: %[[R:.+]] = xor i1 %[[A]], %[[B]]
+    // CHECK: ret i1 %[[R]]
+
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+#[unsafe(no_mangle)]
+pub fn opt_nz32_eq_discr(a: Option<NonZero<u32>>, b: Option<NonZero<u32>>) -> bool {
+    // CHECK-LABEL: @opt_nz32_eq_discr(
+    // CHECK: %[[A:.+]] = icmp ne i32 %a, 0
+    // CHECK: %[[B:.+]] = icmp eq i32 %b, 0
+    // CHECK: %[[R:.+]] = xor i1 %[[A]], %[[B]]
+    // CHECK: ret i1 %[[R]]
+
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+#[unsafe(no_mangle)]
+pub fn opt_ac_eq_discr(a: Option<AC>, b: Option<AC>) -> bool {
+    // CHECK-LABEL: @opt_ac_eq_discr(
+    // CHECK: %[[A:.+]] = icmp ne i8 %a, -128
+    // CHECK: %[[B:.+]] = icmp eq i8 %b, -128
+    // CHECK: %[[R:.+]] = xor i1 %[[A]], %[[B]]
+    // CHECK: ret i1 %[[R]]
+
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+#[unsafe(no_mangle)]
+pub fn opt_giant_eq_discr(a: Option<Giant>, b: Option<Giant>) -> bool {
+    // CHECK-LABEL: @opt_giant_eq_discr(
+    // CHECK: %[[A:.+]] = icmp ne i128 %a, 1
+    // CHECK: %[[B:.+]] = icmp eq i128 %b, 1
+    // CHECK: %[[R:.+]] = xor i1 %[[A]], %[[B]]
+    // CHECK: ret i1 %[[R]]
+
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+pub enum Mid<T> {
+    Before,
+    Thing(T),
+    After,
+}
+
+#[unsafe(no_mangle)]
+pub fn mid_bool_eq_discr(a: Mid<bool>, b: Mid<bool>) -> bool {
+    // CHECK-LABEL: @mid_bool_eq_discr(
+
+    // CHECK: %[[A_REL_DISCR:.+]] = add nsw i8 %a, -2
+    // CHECK: %[[A_IS_NICHE:.+]] = icmp samesign ugt i8 %a, 1
+    // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %[[A_REL_DISCR]], 1
+    // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
+    // CHECK: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
+
+    // CHECK: %[[B_REL_DISCR:.+]] = add nsw i8 %b, -2
+    // CHECK: %[[B_IS_NICHE:.+]] = icmp samesign ugt i8 %b, 1
+    // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %[[B_REL_DISCR]], 1
+    // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
+    // CHECK: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
+
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+#[unsafe(no_mangle)]
+pub fn mid_ord_eq_discr(a: Mid<Ordering>, b: Mid<Ordering>) -> bool {
+    // CHECK-LABEL: @mid_ord_eq_discr(
+
+    // CHECK: %[[A_REL_DISCR:.+]] = add nsw i8 %a, -2
+    // CHECK: %[[A_IS_NICHE:.+]] = icmp sgt i8 %a, 1
+    // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %[[A_REL_DISCR]], 1
+    // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
+    // CHECK: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
+
+    // CHECK: %[[B_REL_DISCR:.+]] = add nsw i8 %b, -2
+    // CHECK: %[[B_IS_NICHE:.+]] = icmp sgt i8 %b, 1
+    // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %[[B_REL_DISCR]], 1
+    // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
+    // CHECK: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
+
+    // CHECK: %[[R:.+]] = icmp eq i8 %[[A_DISCR]], %[[B_DISCR]]
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+#[unsafe(no_mangle)]
+pub fn mid_nz32_eq_discr(a: Mid<NonZero<u32>>, b: Mid<NonZero<u32>>) -> bool {
+    // CHECK-LABEL: @mid_nz32_eq_discr(
+    // CHECK: %[[R:.+]] = icmp eq i32 %a.0, %b.0
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+#[unsafe(no_mangle)]
+pub fn mid_ac_eq_discr(a: Mid<AC>, b: Mid<AC>) -> bool {
+    // CHECK-LABEL: @mid_ac_eq_discr(
+
+    // CHECK: %[[A_REL_DISCR:.+]] = xor i8 %a, -128
+    // CHECK: %[[A_IS_NICHE:.+]] = icmp slt i8 %a, 0
+    // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %a, -127
+    // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
+    // CHECK: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
+
+    // CHECK: %[[B_REL_DISCR:.+]] = xor i8 %b, -128
+    // CHECK: %[[B_IS_NICHE:.+]] = icmp slt i8 %b, 0
+    // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %b, -127
+    // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
+    // CHECK: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
+
+    // CHECK: %[[R:.+]] = icmp eq i8 %[[A_DISCR]], %[[B_DISCR]]
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+// FIXME: This should be improved once our LLVM fork picks up the fix for
+// <https://github.com/llvm/llvm-project/issues/134024>
+#[unsafe(no_mangle)]
+pub fn mid_giant_eq_discr(a: Mid<Giant>, b: Mid<Giant>) -> bool {
+    // CHECK-LABEL: @mid_giant_eq_discr(
+
+    // CHECK: %[[A_TRUNC:.+]] = trunc nuw nsw i128 %a to i64
+    // CHECK: %[[A_REL_DISCR:.+]] = add nsw i64 %[[A_TRUNC]], -5
+    // CHECK: %[[A_IS_NICHE:.+]] = icmp samesign ugt i128 %a, 4
+    // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i64 %[[A_REL_DISCR]], 1
+    // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
+    // CHECK: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i64 %[[A_REL_DISCR]], i64 1
+
+    // CHECK: %[[B_TRUNC:.+]] = trunc nuw nsw i128 %b to i64
+    // CHECK: %[[B_REL_DISCR:.+]] = add nsw i64 %[[B_TRUNC]], -5
+    // CHECK: %[[B_IS_NICHE:.+]] = icmp samesign ugt i128 %b, 4
+    // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i64 %[[B_REL_DISCR]], 1
+    // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
+    // CHECK: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i64 %[[B_REL_DISCR]], i64 1
+
+    // CHECK: %[[R:.+]] = icmp eq i64 %[[A_DISCR]], %[[B_DISCR]]
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == discriminant_value(&b)
+}
+
+// In niche-encoded enums, testing for the untagged variant should optimize to a
+// straight-forward comparison looking for the natural range of the payload value.
+
+#[unsafe(no_mangle)]
+pub fn mid_bool_is_thing(a: Mid<bool>) -> bool {
+    // CHECK-LABEL: @mid_bool_is_thing(
+    // CHECK: %[[R:.+]] = icmp samesign ult i8 %a, 2
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == 1
+}
+
+#[unsafe(no_mangle)]
+pub fn mid_ord_is_thing(a: Mid<Ordering>) -> bool {
+    // CHECK-LABEL: @mid_ord_is_thing(
+    // CHECK: %[[R:.+]] = icmp slt i8 %a, 2
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == 1
+}
+
+#[unsafe(no_mangle)]
+pub fn mid_nz32_is_thing(a: Mid<NonZero<u32>>) -> bool {
+    // CHECK-LABEL: @mid_nz32_is_thing(
+    // CHECK: %[[R:.+]] = icmp eq i32 %a.0, 1
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == 1
+}
+
+#[unsafe(no_mangle)]
+pub fn mid_ac_is_thing(a: Mid<AC>) -> bool {
+    // CHECK-LABEL: @mid_ac_is_thing(
+    // CHECK: %[[R:.+]] = icmp sgt i8 %a, -1
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == 1
+}
+
+#[unsafe(no_mangle)]
+pub fn mid_giant_is_thing(a: Mid<Giant>) -> bool {
+    // CHECK-LABEL: @mid_giant_is_thing(
+    // CHECK: %[[R:.+]] = icmp samesign ult i128 %a, 5
+    // CHECK: ret i1 %[[R]]
+    discriminant_value(&a) == 1
+}
diff --git a/tests/codegen/enum/enum-match.rs b/tests/codegen/enum/enum-match.rs
index 98635008d06..57db44ec74e 100644
--- a/tests/codegen/enum/enum-match.rs
+++ b/tests/codegen/enum/enum-match.rs
@@ -41,7 +41,7 @@ pub enum Enum1 {
 // CHECK-NEXT: start:
 // CHECK-NEXT: %[[REL_VAR:.+]] = add{{( nsw)?}} i8 %0, -2
 // CHECK-NEXT: %[[REL_VAR_WIDE:.+]] = zext i8 %[[REL_VAR]] to i64
-// CHECK-NEXT: %[[IS_NICHE:.+]] = icmp ult i8 %[[REL_VAR]], 2
+// CHECK-NEXT: %[[IS_NICHE:.+]] = icmp{{( samesign)?}} ugt i8 %0, 1
 // CHECK-NEXT: %[[NICHE_DISCR:.+]] = add nuw nsw i64 %[[REL_VAR_WIDE]], 1
 // CHECK-NEXT: %[[DISCR:.+]] = select i1 %[[IS_NICHE]], i64 %[[NICHE_DISCR]], i64 0
 // CHECK-NEXT: switch i64 %[[DISCR]]
@@ -148,10 +148,10 @@ pub enum MiddleNiche {
 // CHECK-LABEL: define{{( dso_local)?}} noundef{{( range\(i8 -?[0-9]+, -?[0-9]+\))?}} i8 @match4(i8{{.+}}%0)
 // CHECK-NEXT: start:
 // CHECK-NEXT: %[[REL_VAR:.+]] = add{{( nsw)?}} i8 %0, -2
-// CHECK-NEXT: %[[IS_NICHE:.+]] = icmp ult i8 %[[REL_VAR]], 5
 // CHECK-NEXT: %[[NOT_IMPOSSIBLE:.+]] = icmp ne i8 %[[REL_VAR]], 2
 // CHECK-NEXT: call void @llvm.assume(i1 %[[NOT_IMPOSSIBLE]])
-// CHECK-NEXT: %[[DISCR:.+]] = select i1 %[[IS_NICHE]], i8 %[[REL_VAR]], i8 2
+// CHECK-NEXT: %[[NOT_NICHE:.+]] = icmp{{( samesign)?}} ult i8 %0, 2
+// CHECK-NEXT: %[[DISCR:.+]] = select i1 %[[NOT_NICHE]], i8 2, i8 %[[REL_VAR]]
 // CHECK-NEXT: switch i8 %[[DISCR]]
 #[no_mangle]
 pub fn match4(e: MiddleNiche) -> u8 {
@@ -167,11 +167,10 @@ pub fn match4(e: MiddleNiche) -> u8 {
 
 // CHECK-LABEL: define{{.+}}i1 @match4_is_c(i8{{.+}}%e)
 // CHECK-NEXT: start
-// CHECK-NEXT: %[[REL_VAR:.+]] = add{{( nsw)?}} i8 %e, -2
-// CHECK-NEXT: %[[NOT_NICHE:.+]] = icmp ugt i8 %[[REL_VAR]], 4
-// CHECK-NEXT: %[[NOT_IMPOSSIBLE:.+]] = icmp ne i8 %[[REL_VAR]], 2
+// CHECK-NEXT: %[[NOT_IMPOSSIBLE:.+]] = icmp ne i8 %e, 4
 // CHECK-NEXT: call void @llvm.assume(i1 %[[NOT_IMPOSSIBLE]])
-// CHECK-NEXT: ret i1 %[[NOT_NICHE]]
+// CHECK-NEXT: %[[IS_C:.+]] = icmp{{( samesign)?}} ult i8 %e, 2
+// CHECK-NEXT: ret i1 %[[IS_C]]
 #[no_mangle]
 pub fn match4_is_c(e: MiddleNiche) -> bool {
     // Before #139098, this couldn't optimize out the `select` because it looked
@@ -453,10 +452,10 @@ pub enum HugeVariantIndex {
 // CHECK-NEXT: start:
 // CHECK-NEXT: %[[REL_VAR:.+]] = add{{( nsw)?}} i8 %0, -2
 // CHECK-NEXT: %[[REL_VAR_WIDE:.+]] = zext i8 %[[REL_VAR]] to i64
-// CHECK-NEXT: %[[IS_NICHE:.+]] = icmp ult i8 %[[REL_VAR]], 3
-// CHECK-NEXT: %[[NOT_IMPOSSIBLE:.+]] = icmp ne i8 %[[REL_VAR]], 1
-// CHECK-NEXT: call void @llvm.assume(i1 %[[NOT_IMPOSSIBLE]])
+// CHECK-NEXT: %[[IS_NICHE:.+]] = icmp{{( samesign)?}} ugt i8 %0, 1
 // CHECK-NEXT: %[[NICHE_DISCR:.+]] = add nuw nsw i64 %[[REL_VAR_WIDE]], 257
+// CHECK-NEXT: %[[NOT_IMPOSSIBLE:.+]] = icmp ne i64 %[[NICHE_DISCR]], 258
+// CHECK-NEXT: call void @llvm.assume(i1 %[[NOT_IMPOSSIBLE]])
 // CHECK-NEXT: %[[DISCR:.+]] = select i1 %[[IS_NICHE]], i64 %[[NICHE_DISCR]], i64 258
 // CHECK-NEXT: switch i64 %[[DISCR]],
 // CHECK-NEXT:   i64 257,
@@ -471,3 +470,310 @@ pub fn match5(e: HugeVariantIndex) -> u8 {
         Possible259 => 100,
     }
 }
+
+// Make an enum where the niche tags wrap both as signed and as unsigned, to hit
+// the most-fallback case where there's just nothing smart to do.
+
+pub enum E10Through65 {
+    D10 = 10,
+    D11 = 11,
+    D12 = 12,
+    D13 = 13,
+    D14 = 14,
+    D15 = 15,
+    D16 = 16,
+    D17 = 17,
+    D18 = 18,
+    D19 = 19,
+    D20 = 20,
+    D21 = 21,
+    D22 = 22,
+    D23 = 23,
+    D24 = 24,
+    D25 = 25,
+    D26 = 26,
+    D27 = 27,
+    D28 = 28,
+    D29 = 29,
+    D30 = 30,
+    D31 = 31,
+    D32 = 32,
+    D33 = 33,
+    D34 = 34,
+    D35 = 35,
+    D36 = 36,
+    D37 = 37,
+    D38 = 38,
+    D39 = 39,
+    D40 = 40,
+    D41 = 41,
+    D42 = 42,
+    D43 = 43,
+    D44 = 44,
+    D45 = 45,
+    D46 = 46,
+    D47 = 47,
+    D48 = 48,
+    D49 = 49,
+    D50 = 50,
+    D51 = 51,
+    D52 = 52,
+    D53 = 53,
+    D54 = 54,
+    D55 = 55,
+    D56 = 56,
+    D57 = 57,
+    D58 = 58,
+    D59 = 59,
+    D60 = 60,
+    D61 = 61,
+    D62 = 62,
+    D63 = 63,
+    D64 = 64,
+    D65 = 65,
+}
+
+pub enum Tricky {
+    Untagged(E10Through65),
+    V001,
+    V002,
+    V003,
+    V004,
+    V005,
+    V006,
+    V007,
+    V008,
+    V009,
+    V010,
+    V011,
+    V012,
+    V013,
+    V014,
+    V015,
+    V016,
+    V017,
+    V018,
+    V019,
+    V020,
+    V021,
+    V022,
+    V023,
+    V024,
+    V025,
+    V026,
+    V027,
+    V028,
+    V029,
+    V030,
+    V031,
+    V032,
+    V033,
+    V034,
+    V035,
+    V036,
+    V037,
+    V038,
+    V039,
+    V040,
+    V041,
+    V042,
+    V043,
+    V044,
+    V045,
+    V046,
+    V047,
+    V048,
+    V049,
+    V050,
+    V051,
+    V052,
+    V053,
+    V054,
+    V055,
+    V056,
+    V057,
+    V058,
+    V059,
+    V060,
+    V061,
+    V062,
+    V063,
+    V064,
+    V065,
+    V066,
+    V067,
+    V068,
+    V069,
+    V070,
+    V071,
+    V072,
+    V073,
+    V074,
+    V075,
+    V076,
+    V077,
+    V078,
+    V079,
+    V080,
+    V081,
+    V082,
+    V083,
+    V084,
+    V085,
+    V086,
+    V087,
+    V088,
+    V089,
+    V090,
+    V091,
+    V092,
+    V093,
+    V094,
+    V095,
+    V096,
+    V097,
+    V098,
+    V099,
+    V100,
+    V101,
+    V102,
+    V103,
+    V104,
+    V105,
+    V106,
+    V107,
+    V108,
+    V109,
+    V110,
+    V111,
+    V112,
+    V113,
+    V114,
+    V115,
+    V116,
+    V117,
+    V118,
+    V119,
+    V120,
+    V121,
+    V122,
+    V123,
+    V124,
+    V125,
+    V126,
+    V127,
+    V128,
+    V129,
+    V130,
+    V131,
+    V132,
+    V133,
+    V134,
+    V135,
+    V136,
+    V137,
+    V138,
+    V139,
+    V140,
+    V141,
+    V142,
+    V143,
+    V144,
+    V145,
+    V146,
+    V147,
+    V148,
+    V149,
+    V150,
+    V151,
+    V152,
+    V153,
+    V154,
+    V155,
+    V156,
+    V157,
+    V158,
+    V159,
+    V160,
+    V161,
+    V162,
+    V163,
+    V164,
+    V165,
+    V166,
+    V167,
+    V168,
+    V169,
+    V170,
+    V171,
+    V172,
+    V173,
+    V174,
+    V175,
+    V176,
+    V177,
+    V178,
+    V179,
+    V180,
+    V181,
+    V182,
+    V183,
+    V184,
+    V185,
+    V186,
+    V187,
+    V188,
+    V189,
+    V190,
+    V191,
+    V192,
+    V193,
+    V194,
+    V195,
+    V196,
+    V197,
+    V198,
+    V199,
+    V200,
+}
+
+const _: () = assert!(std::intrinsics::discriminant_value(&Tricky::V100) == 100);
+
+// CHECK-LABEL: define noundef{{( range\(i8 [0-9]+, [0-9]+\))?}} i8 @discriminant6(i8 noundef %e)
+// CHECK-NEXT: start:
+// CHECK-NEXT: %[[REL_VAR:.+]] = add i8 %e, -66
+// CHECK-NEXT: %[[IS_NICHE:.+]] = icmp ult i8 %[[REL_VAR]], -56
+// CHECK-NEXT: %[[TAGGED_DISCR:.+]] = add i8 %e, -65
+// CHECK-NEXT: %[[DISCR:.+]] = select i1 %[[IS_NICHE]], i8 %[[TAGGED_DISCR]], i8 0
+// CHECK-NEXT: ret i8 %[[DISCR]]
+#[no_mangle]
+pub fn discriminant6(e: Tricky) -> u8 {
+    std::intrinsics::discriminant_value(&e) as _
+}
+
+// Case from <https://github.com/rust-lang/rust/issues/104519>,
+// where sign-extension is important.
+
+pub enum OpenResult {
+    Ok(()),
+    Err(()),
+    TransportErr(TransportErr),
+}
+
+#[repr(i32)]
+pub enum TransportErr {
+    UnknownMethod = -2,
+}
+
+#[no_mangle]
+pub fn match7(result: OpenResult) -> u8 {
+    // CHECK-LABEL: define noundef{{( range\(i8 [0-9]+, [0-9]+\))?}} i8 @match7(i32{{.+}}%result)
+    // CHECK-NEXT: start:
+    // CHECK-NEXT: %[[NOT_OK:.+]] = icmp ne i32 %result, -1
+    // CHECK-NEXT: %[[RET:.+]] = zext i1 %[[NOT_OK]] to i8
+    // CHECK-NEXT: ret i8 %[[RET]]
+    match result {
+        OpenResult::Ok(()) => 0,
+        _ => 1,
+    }
+}
diff --git a/tests/codegen/fn-parameters-on-different-lines-debuginfo.rs b/tests/codegen/fn-parameters-on-different-lines-debuginfo.rs
new file mode 100644
index 00000000000..2097567f322
--- /dev/null
+++ b/tests/codegen/fn-parameters-on-different-lines-debuginfo.rs
@@ -0,0 +1,22 @@
+//! Make sure that line debuginfo of function parameters are correct even if
+//! they are not on the same line. Regression test for
+// <https://github.com/rust-lang/rust/issues/45010>.
+
+//@ compile-flags: -g -Copt-level=0
+
+#[rustfmt::skip] // Having parameters on different lines is crucial for this test.
+pub fn foo(
+    x_parameter_not_in_std: i32,
+    y_parameter_not_in_std: i32,
+) -> i32 {
+    x_parameter_not_in_std + y_parameter_not_in_std
+}
+
+fn main() {
+    foo(42, 43); // Ensure `wasm32-wasip1` keeps `foo()` (even if `-Copt-level=0`)
+}
+
+// CHECK: !DILocalVariable(name: "x_parameter_not_in_std", arg: 1,
+// CHECK-SAME: line: 9
+// CHECK: !DILocalVariable(name: "y_parameter_not_in_std", arg: 2,
+// CHECK-SAME: line: 10
diff --git a/tests/codegen/repeat-operand-zero-len.rs b/tests/codegen/repeat-operand-zero-len.rs
new file mode 100644
index 00000000000..b4cec42a07c
--- /dev/null
+++ b/tests/codegen/repeat-operand-zero-len.rs
@@ -0,0 +1,28 @@
+//@ compile-flags: -Copt-level=1 -Cno-prepopulate-passes
+
+// This test is here to hit the `Rvalue::Repeat` case in `codegen_rvalue_operand`.
+// It only applies when the resulting array is a ZST, so the test is written in
+// such a way as to keep MIR optimizations from seeing that fact and removing
+// the local and statement altogether. (At the time of writing, no other codegen
+// test hit that code path, nor did a stage 2 build of the compiler.)
+
+#![crate_type = "lib"]
+
+#[repr(transparent)]
+pub struct Wrapper<T, const N: usize>([T; N]);
+
+// CHECK-LABEL: define {{.+}}do_repeat{{.+}}(i32 noundef %x)
+// CHECK-NEXT: start:
+// CHECK-NOT: alloca
+// CHECK-NEXT: ret void
+#[inline(never)]
+pub fn do_repeat<T: Copy, const N: usize>(x: T) -> Wrapper<T, N> {
+    Wrapper([x; N])
+}
+
+// CHECK-LABEL: @trigger_repeat_zero_len
+#[no_mangle]
+pub fn trigger_repeat_zero_len() -> Wrapper<u32, 0> {
+    // CHECK: call void {{.+}}do_repeat{{.+}}(i32 noundef 4)
+    do_repeat(4)
+}
diff --git a/tests/codegen/repeat-operand-zst-elem.rs b/tests/codegen/repeat-operand-zst-elem.rs
new file mode 100644
index 00000000000..c3637759afa
--- /dev/null
+++ b/tests/codegen/repeat-operand-zst-elem.rs
@@ -0,0 +1,28 @@
+//@ compile-flags: -Copt-level=1 -Cno-prepopulate-passes
+
+// This test is here to hit the `Rvalue::Repeat` case in `codegen_rvalue_operand`.
+// It only applies when the resulting array is a ZST, so the test is written in
+// such a way as to keep MIR optimizations from seeing that fact and removing
+// the local and statement altogether. (At the time of writing, no other codegen
+// test hit that code path, nor did a stage 2 build of the compiler.)
+
+#![crate_type = "lib"]
+
+#[repr(transparent)]
+pub struct Wrapper<T, const N: usize>([T; N]);
+
+// CHECK-LABEL: define {{.+}}do_repeat{{.+}}()
+// CHECK-NEXT: start:
+// CHECK-NOT: alloca
+// CHECK-NEXT: ret void
+#[inline(never)]
+pub fn do_repeat<T: Copy, const N: usize>(x: T) -> Wrapper<T, N> {
+    Wrapper([x; N])
+}
+
+// CHECK-LABEL: @trigger_repeat_zst_elem
+#[no_mangle]
+pub fn trigger_repeat_zst_elem() -> Wrapper<(), 8> {
+    // CHECK: call void {{.+}}do_repeat{{.+}}()
+    do_repeat(())
+}
diff --git a/tests/codegen/sanitizer/kcfi/naked-function.rs b/tests/codegen/sanitizer/kcfi/naked-function.rs
new file mode 100644
index 00000000000..2c8cdc919b8
--- /dev/null
+++ b/tests/codegen/sanitizer/kcfi/naked-function.rs
@@ -0,0 +1,47 @@
+//@ add-core-stubs
+//@ revisions: aarch64 x86_64
+//@ [aarch64] compile-flags: --target aarch64-unknown-none
+//@ [aarch64] needs-llvm-components: aarch64
+//@ [x86_64] compile-flags: --target x86_64-unknown-none
+//@ [x86_64] needs-llvm-components: x86
+//@ compile-flags: -Ctarget-feature=-crt-static -Zsanitizer=kcfi -Cno-prepopulate-passes -Copt-level=0
+
+#![feature(no_core, lang_items)]
+#![crate_type = "lib"]
+#![no_core]
+
+extern crate minicore;
+use minicore::*;
+
+struct Thing;
+trait MyTrait {
+    #[unsafe(naked)]
+    extern "C" fn my_naked_function() {
+        // the real function is defined
+        // CHECK: .globl
+        // CHECK-SAME: my_naked_function
+        naked_asm!("ret")
+    }
+}
+impl MyTrait for Thing {}
+
+// the shim calls the real function
+// CHECK-LABEL: define
+// CHECK-SAME: my_naked_function
+// CHECK-SAME: reify.shim.fnptr
+
+// CHECK-LABEL: main
+#[unsafe(no_mangle)]
+pub fn main() {
+    // Trick the compiler into generating an indirect call.
+    const F: extern "C" fn() = Thing::my_naked_function;
+
+    // main calls the shim function
+    // CHECK: call void
+    // CHECK-SAME: my_naked_function
+    // CHECK-SAME: reify.shim.fnptr
+    (F)();
+}
+
+// CHECK: declare !kcfi_type
+// CHECK-SAME: my_naked_function
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-abs.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-abs.rs
index 485ba92272d..baf445d0a1b 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-abs.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-abs.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_fabs;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_fabs;
 
 // CHECK-LABEL: @fabs_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn fabs_32x16(a: f32x16) -> f32x16 {
     simd_fabs(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @fabs_64x4
 #[no_mangle]
 pub unsafe fn fabs_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-ceil.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-ceil.rs
index e8bda7c29c4..096de569274 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-ceil.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-ceil.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_ceil;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_ceil;
 
 // CHECK-LABEL: @ceil_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn ceil_32x16(a: f32x16) -> f32x16 {
     simd_ceil(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @ceil_64x4
 #[no_mangle]
 pub unsafe fn ceil_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-cos.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-cos.rs
index 8dc967bc3ad..5b2197924bc 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-cos.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-cos.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_fcos;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_fcos;
 
 // CHECK-LABEL: @fcos_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn fcos_32x16(a: f32x16) -> f32x16 {
     simd_fcos(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @fcos_64x4
 #[no_mangle]
 pub unsafe fn fcos_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-exp.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-exp.rs
index 00caca2f294..d4eadb36c65 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-exp.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-exp.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_fexp;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_fexp;
 
 // CHECK-LABEL: @exp_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn exp_32x16(a: f32x16) -> f32x16 {
     simd_fexp(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @exp_64x4
 #[no_mangle]
 pub unsafe fn exp_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-exp2.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-exp2.rs
index eda4053189c..d32015b7990 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-exp2.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-exp2.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_fexp2;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_fexp2;
 
 // CHECK-LABEL: @exp2_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn exp2_32x16(a: f32x16) -> f32x16 {
     simd_fexp2(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @exp2_64x4
 #[no_mangle]
 pub unsafe fn exp2_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-floor.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-floor.rs
index ad69d4cdd88..1e1c8ce0c35 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-floor.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-floor.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_floor;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_floor;
 
 // CHECK-LABEL: @floor_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn floor_32x16(a: f32x16) -> f32x16 {
     simd_floor(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @floor_64x4
 #[no_mangle]
 pub unsafe fn floor_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-fma.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-fma.rs
index cbeefdc31c0..982077d81f9 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-fma.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-fma.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_fma;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_fma;
 
 // CHECK-LABEL: @fma_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn fma_32x16(a: f32x16, b: f32x16, c: f32x16) -> f32x16 {
     simd_fma(a, b, c)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @fma_64x4
 #[no_mangle]
 pub unsafe fn fma_64x4(a: f64x4, b: f64x4, c: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-fsqrt.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-fsqrt.rs
index 618daa4b44d..e20a591f573 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-fsqrt.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-fsqrt.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_fsqrt;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_fsqrt;
 
 // CHECK-LABEL: @fsqrt_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn fsqrt_32x16(a: f32x16) -> f32x16 {
     simd_fsqrt(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @fsqrt_64x4
 #[no_mangle]
 pub unsafe fn fsqrt_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-log.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-log.rs
index 98a481e4004..bf1ffc76330 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-log.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-log.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_flog;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_flog;
 
 // CHECK-LABEL: @log_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn log_32x16(a: f32x16) -> f32x16 {
     simd_flog(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @log_64x4
 #[no_mangle]
 pub unsafe fn log_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-log10.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-log10.rs
index 9108cd963f0..ccf484e0e41 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-log10.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-log10.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_flog10;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_flog10;
 
 // CHECK-LABEL: @log10_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn log10_32x16(a: f32x16) -> f32x16 {
     simd_flog10(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @log10_64x4
 #[no_mangle]
 pub unsafe fn log10_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-log2.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-log2.rs
index 2b20850dbd9..677d8b01e84 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-log2.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-log2.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_flog2;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_flog2;
 
 // CHECK-LABEL: @log2_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn log2_32x16(a: f32x16) -> f32x16 {
     simd_flog2(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @log2_64x4
 #[no_mangle]
 pub unsafe fn log2_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-minmax.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-minmax.rs
index ce07b212e84..8dd464a1bff 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-minmax.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-minmax.rs
@@ -4,11 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::{simd_fmax, simd_fmin};
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
+use std::intrinsics::simd::{simd_fmax, simd_fmin};
 
 // CHECK-LABEL: @fmin
 #[no_mangle]
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-float-sin.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-float-sin.rs
index 7de26b415bb..48becc72c0b 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-float-sin.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-float-sin.rs
@@ -4,23 +4,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_fsin;
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
+use std::intrinsics::simd::simd_fsin;
 
 // CHECK-LABEL: @fsin_32x2
 #[no_mangle]
@@ -50,18 +38,6 @@ pub unsafe fn fsin_32x16(a: f32x16) -> f32x16 {
     simd_fsin(a)
 }
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
 // CHECK-LABEL: @fsin_64x4
 #[no_mangle]
 pub unsafe fn fsin_64x4(a: f64x4) -> f64x4 {
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-arithmetic-saturating.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-arithmetic-saturating.rs
index ecf5eb24ee5..06d46889715 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-arithmetic-saturating.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-arithmetic-saturating.rs
@@ -5,66 +5,11 @@
 #![allow(non_camel_case_types)]
 #![deny(unused)]
 
-use std::intrinsics::simd::{simd_saturating_add, simd_saturating_sub};
-
-#[rustfmt::skip]
-mod types {
-    // signed integer types
-
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i8x2([i8; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i8x4([i8; 4]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i8x8([i8; 8]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i8x16([i8; 16]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i8x32([i8; 32]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i8x64([i8; 64]);
-
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i16x2([i16; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i16x4([i16; 4]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i16x8([i16; 8]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i16x16([i16; 16]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i16x32([i16; 32]);
-
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i32x2([i32; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i32x4([i32; 4]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i32x8([i32; 8]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i32x16([i32; 16]);
-
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i64x2([i64; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i64x4([i64; 4]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i64x8([i64; 8]);
-
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i128x2([i128; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct i128x4([i128; 4]);
-
-    // unsigned integer types
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u8x2([u8; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u8x4([u8; 4]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u8x8([u8; 8]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u8x16([u8; 16]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u8x32([u8; 32]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u8x64([u8; 64]);
-
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u16x2([u16; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u16x4([u16; 4]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u16x8([u16; 8]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u16x16([u16; 16]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u16x32([u16; 32]);
-
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u32x2([u32; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u32x4([u32; 4]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u32x8([u32; 8]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u32x16([u32; 16]);
-
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u64x2([u64; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u64x4([u64; 4]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u64x8([u64; 8]);
-
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u128x2([u128; 2]);
-    #[repr(simd)] #[derive(Copy, Clone)] pub struct u128x4([u128; 4]);
-}
-
-use types::*;
+use std::intrinsics::simd::{simd_saturating_add, simd_saturating_sub};
 
 // NOTE(eddyb) `%{{x|0}}` is used because on some targets (e.g. WASM)
 // SIMD vectors are passed directly, resulting in `%x` being a vector,
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-bitmask.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-bitmask.rs
index a2c40aa91b5..294262d8152 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-bitmask.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-bitmask.rs
@@ -5,19 +5,11 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_bitmask;
-
-#[repr(simd)]
-#[derive(Copy, Clone)]
-pub struct u32x2([u32; 2]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone)]
-pub struct i32x2([i32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone)]
-pub struct i8x16([i8; 16]);
+use std::intrinsics::simd::simd_bitmask;
 
 // NOTE(eddyb) `%{{x|1}}` is used because on some targets (e.g. WASM)
 // SIMD vectors are passed directly, resulting in `%x` being a vector,
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-gather.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-gather.rs
index c06b36d68b9..690bfb432f9 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-gather.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-gather.rs
@@ -6,15 +6,14 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_gather;
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct Vec2<T>(pub [T; 2]);
+use std::intrinsics::simd::simd_gather;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct Vec4<T>(pub [T; 4]);
+pub type Vec2<T> = Simd<T, 2>;
+pub type Vec4<T> = Simd<T, 4>;
 
 // CHECK-LABEL: @gather_f32x2
 #[no_mangle]
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-load.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-load.rs
index 21578e67cff..fda315dc66c 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-load.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-load.rs
@@ -4,15 +4,14 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_masked_load;
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct Vec2<T>(pub [T; 2]);
+use std::intrinsics::simd::simd_masked_load;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct Vec4<T>(pub [T; 4]);
+pub type Vec2<T> = Simd<T, 2>;
+pub type Vec4<T> = Simd<T, 4>;
 
 // CHECK-LABEL: @load_f32x2
 #[no_mangle]
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-store.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-store.rs
index 22a8f7e54bd..6ca7388d464 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-store.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-store.rs
@@ -4,15 +4,14 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_masked_store;
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct Vec2<T>(pub [T; 2]);
+use std::intrinsics::simd::simd_masked_store;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct Vec4<T>(pub [T; 4]);
+pub type Vec2<T> = Simd<T, 2>;
+pub type Vec4<T> = Simd<T, 4>;
 
 // CHECK-LABEL: @store_f32x2
 #[no_mangle]
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-scatter.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-scatter.rs
index 0cc9e6ae59a..743652966e1 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-scatter.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-scatter.rs
@@ -6,15 +6,14 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::simd_scatter;
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct Vec2<T>(pub [T; 2]);
+use std::intrinsics::simd::simd_scatter;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct Vec4<T>(pub [T; 4]);
+pub type Vec2<T> = Simd<T, 2>;
+pub type Vec4<T> = Simd<T, 4>;
 
 // CHECK-LABEL: @scatter_f32x2
 #[no_mangle]
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-select.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-select.rs
index f6531c1b23a..2c0bad21f44 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-generic-select.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-generic-select.rs
@@ -4,27 +4,13 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::{simd_select, simd_select_bitmask};
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8([f32; 8]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct b8x4(pub [i8; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct i32x4([i32; 4]);
+use std::intrinsics::simd::{simd_select, simd_select_bitmask};
 
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct u32x4([u32; 4]);
+pub type b8x4 = i8x4;
 
 // CHECK-LABEL: @select_m8
 #[no_mangle]
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-mask-reduce.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-mask-reduce.rs
index 269fe41225e..79f00a6ed60 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-mask-reduce.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-mask-reduce.rs
@@ -4,15 +4,14 @@
 #![feature(repr_simd, core_intrinsics)]
 #![allow(non_camel_case_types)]
 
-use std::intrinsics::simd::{simd_reduce_all, simd_reduce_any};
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone)]
-pub struct mask32x2([i32; 2]);
+use std::intrinsics::simd::{simd_reduce_all, simd_reduce_any};
 
-#[repr(simd)]
-#[derive(Copy, Clone)]
-pub struct mask8x16([i8; 16]);
+pub type mask32x2 = Simd<i32, 2>;
+pub type mask8x16 = Simd<i8, 16>;
 
 // NOTE(eddyb) `%{{x|1}}` is used because on some targets (e.g. WASM)
 // SIMD vectors are passed directly, resulting in `%x` being a vector,
diff --git a/tests/codegen/simd-intrinsic/simd-intrinsic-transmute-array.rs b/tests/codegen/simd-intrinsic/simd-intrinsic-transmute-array.rs
index 301f06c2d74..05c2f7e1bdf 100644
--- a/tests/codegen/simd-intrinsic/simd-intrinsic-transmute-array.rs
+++ b/tests/codegen/simd-intrinsic/simd-intrinsic-transmute-array.rs
@@ -8,13 +8,12 @@
 #![allow(non_camel_case_types)]
 #![feature(repr_simd, core_intrinsics)]
 
-#[repr(simd)]
-#[derive(Copy, Clone)]
-pub struct S<const N: usize>([f32; N]);
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::*;
 
-#[repr(simd)]
-#[derive(Copy, Clone)]
-pub struct T([f32; 4]);
+pub type S<const N: usize> = Simd<f32, N>;
+pub type T = Simd<f32, 4>;
 
 // CHECK-LABEL: @array_align(
 #[no_mangle]
@@ -34,7 +33,7 @@ pub fn vector_align() -> usize {
 #[no_mangle]
 pub fn build_array_s(x: [f32; 4]) -> S<4> {
     // CHECK: call void @llvm.memcpy.{{.+}}({{.*}} align [[VECTOR_ALIGN]] {{.*}} align [[ARRAY_ALIGN]] {{.*}}, [[USIZE]] 16, i1 false)
-    S::<4>(x)
+    Simd(x)
 }
 
 // CHECK-LABEL: @build_array_transmute_s
@@ -48,7 +47,7 @@ pub fn build_array_transmute_s(x: [f32; 4]) -> S<4> {
 #[no_mangle]
 pub fn build_array_t(x: [f32; 4]) -> T {
     // CHECK: call void @llvm.memcpy.{{.+}}({{.*}} align [[VECTOR_ALIGN]] {{.*}} align [[ARRAY_ALIGN]] {{.*}}, [[USIZE]] 16, i1 false)
-    T(x)
+    Simd(x)
 }
 
 // CHECK-LABEL: @build_array_transmute_t
diff --git a/tests/codegen/simd/aggregate-simd.rs b/tests/codegen/simd/aggregate-simd.rs
index 065e429a4c7..57a301d634c 100644
--- a/tests/codegen/simd/aggregate-simd.rs
+++ b/tests/codegen/simd/aggregate-simd.rs
@@ -5,15 +5,11 @@
 #![no_std]
 #![crate_type = "lib"]
 
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
 use core::intrinsics::simd::{simd_add, simd_extract};
 
-#[repr(simd)]
-#[derive(Clone, Copy)]
-pub struct Simd<T, const N: usize>([T; N]);
-
-#[repr(simd, packed)]
-#[derive(Clone, Copy)]
-pub struct PackedSimd<T, const N: usize>([T; N]);
+use minisimd::*;
 
 #[repr(transparent)]
 pub struct Transparent<T>(T);
diff --git a/tests/codegen/simd/packed-simd.rs b/tests/codegen/simd/packed-simd.rs
index 73e0d29d7d6..70c03fcc955 100644
--- a/tests/codegen/simd/packed-simd.rs
+++ b/tests/codegen/simd/packed-simd.rs
@@ -9,18 +9,14 @@
 use core::intrinsics::simd as intrinsics;
 use core::{mem, ptr};
 
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::{PackedSimd, Simd as FullSimd};
+
 // Test codegen for not only "packed" but also "fully aligned" SIMD types, and conversion between
 // them. A repr(packed,simd) type with 3 elements can't exceed its element alignment, whereas the
 // same type as repr(simd) will instead have padding.
 
-#[repr(simd, packed)]
-#[derive(Copy, Clone)]
-pub struct PackedSimd<T, const N: usize>([T; N]);
-
-#[repr(simd)]
-#[derive(Copy, Clone)]
-pub struct FullSimd<T, const N: usize>([T; N]);
-
 // non-powers-of-two have padding and need to be expanded to full vectors
 fn load<T, const N: usize>(v: PackedSimd<T, N>) -> FullSimd<T, N> {
     unsafe {
diff --git a/tests/codegen/simd/project-to-simd-array-field.rs b/tests/codegen/simd/project-to-simd-array-field.rs
deleted file mode 100644
index 29fab640633..00000000000
--- a/tests/codegen/simd/project-to-simd-array-field.rs
+++ /dev/null
@@ -1,31 +0,0 @@
-//@compile-flags: -Copt-level=3
-
-#![crate_type = "lib"]
-#![feature(repr_simd, core_intrinsics)]
-
-#[allow(non_camel_case_types)]
-#[derive(Clone, Copy)]
-#[repr(simd)]
-struct i32x4([i32; 4]);
-
-#[inline(always)]
-fn to_array4(a: i32x4) -> [i32; 4] {
-    a.0
-}
-
-// CHECK-LABEL: simd_add_self_then_return_array(
-// CHECK-SAME: ptr{{.+}}sret{{.+}}%[[RET:.+]],
-// CHECK-SAME: ptr{{.+}}%a)
-#[no_mangle]
-pub fn simd_add_self_then_return_array(a: &i32x4) -> [i32; 4] {
-    // It would be nice to just ban `.0` into simd types,
-    // but until we do this has to keep working.
-    // See also <https://github.com/rust-lang/rust/issues/105439>
-
-    // CHECK: %[[T1:.+]] = load <4 x i32>, ptr %a
-    // CHECK: %[[T2:.+]] = shl <4 x i32> %[[T1]], {{splat \(i32 1\)|<i32 1, i32 1, i32 1, i32 1>}}
-    // CHECK: store <4 x i32> %[[T2]], ptr %[[RET]]
-    let a = *a;
-    let b = unsafe { core::intrinsics::simd::simd_add(a, a) };
-    to_array4(b)
-}
diff --git a/tests/codegen/simd/simd_arith_offset.rs b/tests/codegen/simd/simd_arith_offset.rs
index b8af6fce332..210b4e9bb50 100644
--- a/tests/codegen/simd/simd_arith_offset.rs
+++ b/tests/codegen/simd/simd_arith_offset.rs
@@ -5,16 +5,14 @@
 #![crate_type = "lib"]
 #![feature(repr_simd, core_intrinsics)]
 
+#[path = "../../auxiliary/minisimd.rs"]
+mod minisimd;
 use std::intrinsics::simd::simd_arith_offset;
 
-/// A vector of *const T.
-#[derive(Debug, Copy, Clone)]
-#[repr(simd)]
-pub struct SimdConstPtr<T, const LANES: usize>([*const T; LANES]);
+use minisimd::*;
 
-#[derive(Debug, Copy, Clone)]
-#[repr(simd)]
-pub struct Simd<T, const LANES: usize>([T; LANES]);
+/// A vector of *const T.
+pub type SimdConstPtr<T, const LANES: usize> = Simd<*const T, LANES>;
 
 // CHECK-LABEL: smoke
 #[no_mangle]