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authorCamille GILLOT <gillot.camille@gmail.com>2022-12-04 18:26:09 +0000
committerCamille GILLOT <gillot.camille@gmail.com>2023-05-09 17:59:34 +0000
commit34903755701a5595ee4bab3bb89de15c5469cd3e (patch)
tree86d662115d239932ad2f5f5ebddf431be78ce84a /tests/mir-opt/reference_prop.maybe_dead.ReferencePropagation.diff
parentf7b831ac8a897273f78b9f47165cf8e54066ce4b (diff)
downloadrust-34903755701a5595ee4bab3bb89de15c5469cd3e.tar.gz
rust-34903755701a5595ee4bab3bb89de15c5469cd3e.zip
Implement SSA-based reference propagation.
Diffstat (limited to 'tests/mir-opt/reference_prop.maybe_dead.ReferencePropagation.diff')
-rw-r--r--tests/mir-opt/reference_prop.maybe_dead.ReferencePropagation.diff50
1 files changed, 50 insertions, 0 deletions
diff --git a/tests/mir-opt/reference_prop.maybe_dead.ReferencePropagation.diff b/tests/mir-opt/reference_prop.maybe_dead.ReferencePropagation.diff
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+- // MIR for `maybe_dead` before ReferencePropagation
++ // MIR for `maybe_dead` after ReferencePropagation
+  
+  fn maybe_dead(_1: bool) -> () {
+      let mut _0: ();                      // return place in scope 0 at $DIR/reference_prop.rs:+0:24: +0:24
+      let mut _2: i32;                     // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+      let mut _3: i32;                     // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+      let mut _4: &i32;                    // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+      let mut _5: &mut i32;                // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+      let mut _6: i32;                     // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+      let mut _7: i32;                     // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+  
+      bb0: {
+          StorageLive(_2);                 // scope 0 at $DIR/reference_prop.rs:+7:13: +7:27
+          StorageLive(_3);                 // scope 0 at $DIR/reference_prop.rs:+8:13: +8:27
+          _2 = const 5_i32;                // scope 0 at $DIR/reference_prop.rs:+9:13: +9:18
+          _3 = const 5_i32;                // scope 0 at $DIR/reference_prop.rs:+10:13: +10:18
+          _4 = &_2;                        // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+          _5 = &mut _3;                    // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+          (*_5) = const 7_i32;             // scope 0 at $DIR/reference_prop.rs:+14:13: +14:19
+          switchInt(_1) -> [1: bb1, otherwise: bb2]; // scope 0 at $DIR/reference_prop.rs:+15:13: +15:46
+      }
+  
+      bb1: {
+          StorageDead(_2);                 // scope 0 at $DIR/reference_prop.rs:+18:13: +18:27
+          StorageDead(_3);                 // scope 0 at $DIR/reference_prop.rs:+19:13: +19:27
+          goto -> bb2;                     // scope 0 at $DIR/reference_prop.rs:+20:13: +20:22
+      }
+  
+      bb2: {
+          _6 = (*_4);                      // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+          _0 = opaque::<i32>(_6) -> bb3;   // scope 0 at $DIR/reference_prop.rs:+25:13: +25:38
+                                           // mir::Constant
+                                           // + span: $DIR/reference_prop.rs:394:28: 394:34
+                                           // + literal: Const { ty: fn(i32) {opaque::<i32>}, val: Value(<ZST>) }
+      }
+  
+      bb3: {
+          _7 = (*_5);                      // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
+          _0 = opaque::<i32>(_7) -> bb4;   // scope 0 at $DIR/reference_prop.rs:+31:13: +31:43
+                                           // mir::Constant
+                                           // + span: $DIR/reference_prop.rs:400:33: 400:39
+                                           // + literal: Const { ty: fn(i32) {opaque::<i32>}, val: Value(<ZST>) }
+      }
+  
+      bb4: {
+          return;                          // scope 0 at $DIR/reference_prop.rs:+34:13: +34:21
+      }
+  }
+