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| author | Jubilee <workingjubilee@gmail.com> | 2024-10-21 20:32:01 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-21 20:32:01 -0700 |
| commit | 1b24c6fc1442a00f6edb8f4381ea64c2ba017843 (patch) | |
| tree | f6a976a82a0a610d19eb7645f6dd4bae5c7036d6 /tests | |
| parent | 763fbf8a90902dd13102bef3411629a010059312 (diff) | |
| parent | 3ea91c05db131ec7c4bd6d507b569a58cd19dd93 (diff) | |
| download | rust-1b24c6fc1442a00f6edb8f4381ea64c2ba017843.tar.gz rust-1b24c6fc1442a00f6edb8f4381ea64c2ba017843.zip | |
Rollup merge of #131807 - beetrees:riscv-target-abi, r=workingjubilee
Always specify `llvm_abiname` for RISC-V targets For RISC-V targets, when `llvm_abiname` is not specified LLVM will infer the ABI from the target features, causing #116344 to occur. This PR adds the correct `llvm_abiname` to all RISC-V targets where it is missing (which are all soft-float targets), and adds a test to prevent future RISC-V targets from accidentally omitting `llvm_abiname`. The only affect of this PR is that `-Ctarget-feature=+f` (or similar) will no longer affect the ABI on the modified targets. <!-- homu-ignore:start --> r? `@RalfJung` <!--- homu-ignore:end -->
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/assembly/riscv-soft-abi-with-float-features.rs | 46 | ||||
| -rw-r--r-- | tests/codegen/riscv-target-abi.rs | 2 |
2 files changed, 47 insertions, 1 deletions
diff --git a/tests/assembly/riscv-soft-abi-with-float-features.rs b/tests/assembly/riscv-soft-abi-with-float-features.rs new file mode 100644 index 00000000000..733137f5700 --- /dev/null +++ b/tests/assembly/riscv-soft-abi-with-float-features.rs @@ -0,0 +1,46 @@ +//@ assembly-output: emit-asm +//@ compile-flags: --target riscv64imac-unknown-none-elf -Ctarget-feature=+f,+d +//@ needs-llvm-components: riscv + +#![feature(no_core, lang_items, f16)] +#![crate_type = "lib"] +#![no_core] + +#[lang = "sized"] +trait Sized {} + +#[lang = "copy"] +trait Copy {} + +impl Copy for f16 {} +impl Copy for f32 {} +impl Copy for f64 {} + +// This test checks that the floats are all returned in `a0` as required by the `lp64` ABI. + +// CHECK-LABEL: read_f16 +#[no_mangle] +pub extern "C" fn read_f16(x: &f16) -> f16 { + // CHECK: lh a0, 0(a0) + // CHECK-NEXT: lui a1, 1048560 + // CHECK-NEXT: or a0, a0, a1 + // CHECK-NEXT: ret + *x +} + +// CHECK-LABEL: read_f32 +#[no_mangle] +pub extern "C" fn read_f32(x: &f32) -> f32 { + // CHECK: flw fa5, 0(a0) + // CHECK-NEXT: fmv.x.w a0, fa5 + // CHECK-NEXT: ret + *x +} + +// CHECK-LABEL: read_f64 +#[no_mangle] +pub extern "C" fn read_f64(x: &f64) -> f64 { + // CHECK: ld a0, 0(a0) + // CHECK-NEXT: ret + *x +} diff --git a/tests/codegen/riscv-target-abi.rs b/tests/codegen/riscv-target-abi.rs index 5d545af9c76..88da4ece7ba 100644 --- a/tests/codegen/riscv-target-abi.rs +++ b/tests/codegen/riscv-target-abi.rs @@ -10,7 +10,7 @@ //@[riscv32imac] compile-flags: --target=riscv32imac-unknown-none-elf //@[riscv32imac] needs-llvm-components: riscv -// riscv32imac-NOT: !"target-abi" +// riscv32imac: !{i32 1, !"target-abi", !"ilp32"} #![feature(no_core, lang_items)] #![crate_type = "lib"] |
