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| author | Camille GILLOT <gillot.camille@gmail.com> | 2023-10-18 16:28:25 +0000 |
|---|---|---|
| committer | Camille GILLOT <gillot.camille@gmail.com> | 2023-10-21 07:08:48 +0000 |
| commit | 6abd8f119e48c707488a545cf2fc0614d7dc433c (patch) | |
| tree | bc14cc68342ce4a5dcfa7e53a60edd3a5bb987da /tests | |
| parent | 98b86fa9e5f6edfc696ce80e2b8ca33b73249031 (diff) | |
| download | rust-6abd8f119e48c707488a545cf2fc0614d7dc433c.tar.gz rust-6abd8f119e48c707488a545cf2fc0614d7dc433c.zip | |
Rebase fallout.
Diffstat (limited to 'tests')
3 files changed, 1 insertions, 25 deletions
diff --git a/tests/mir-opt/jump_threading.rs b/tests/mir-opt/jump_threading.rs index 00dd98d825f..dcf61773565 100644 --- a/tests/mir-opt/jump_threading.rs +++ b/tests/mir-opt/jump_threading.rs @@ -1,5 +1,5 @@ // unit-test: JumpThreading -// compile-flags: -Zmir-enable-passes=+Inline +// compile-flags: -Zmir-enable-passes=+Inline -Zinline-mir // EMIT_MIR_FOR_EACH_PANIC_STRATEGY #![feature(control_flow_enum)] diff --git a/tests/mir-opt/while_storage.while_loop.PreCodegen.after.panic-abort.mir b/tests/mir-opt/while_storage.while_loop.PreCodegen.after.panic-abort.mir index e6ce33ed682..21c4b92cf04 100644 --- a/tests/mir-opt/while_storage.while_loop.PreCodegen.after.panic-abort.mir +++ b/tests/mir-opt/while_storage.while_loop.PreCodegen.after.panic-abort.mir @@ -11,18 +11,6 @@ fn while_loop(_1: bool) -> () { } bb0: { - goto -> bb1; - } - - bb1: { - switchInt(_1) -> [0: bb3, otherwise: bb2]; - } - - bb2: { - switchInt(_1) -> [0: bb1, otherwise: bb3]; - } - - bb3: { return; } } diff --git a/tests/mir-opt/while_storage.while_loop.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/while_storage.while_loop.PreCodegen.after.panic-unwind.mir index e6ce33ed682..21c4b92cf04 100644 --- a/tests/mir-opt/while_storage.while_loop.PreCodegen.after.panic-unwind.mir +++ b/tests/mir-opt/while_storage.while_loop.PreCodegen.after.panic-unwind.mir @@ -11,18 +11,6 @@ fn while_loop(_1: bool) -> () { } bb0: { - goto -> bb1; - } - - bb1: { - switchInt(_1) -> [0: bb3, otherwise: bb2]; - } - - bb2: { - switchInt(_1) -> [0: bb1, otherwise: bb3]; - } - - bb3: { return; } } |