diff options
| -rw-r--r-- | library/core/src/hint.rs | 41 |
1 files changed, 17 insertions, 24 deletions
diff --git a/library/core/src/hint.rs b/library/core/src/hint.rs index 75c104ce2fa..4bf3da07354 100644 --- a/library/core/src/hint.rs +++ b/library/core/src/hint.rs @@ -175,34 +175,27 @@ pub fn spin_loop() { unsafe { crate::arch::x86_64::_mm_pause() }; } - // RISC-V platform spin loop hint implementation + #[cfg(target_arch = "riscv32")] { - // RISC-V RV32 and RV64 share the same PAUSE instruction, but they are located in different - // modules in `core::arch`. - // In this case, here we call `pause` function in each core arch module. - #[cfg(target_arch = "riscv32")] - { - crate::arch::riscv32::pause(); - } - #[cfg(target_arch = "riscv64")] - { - crate::arch::riscv64::pause(); - } + crate::arch::riscv32::pause(); } - #[cfg(any(target_arch = "aarch64", all(target_arch = "arm", target_feature = "v6")))] + #[cfg(target_arch = "riscv64")] { - #[cfg(target_arch = "aarch64")] - { - // SAFETY: the `cfg` attr ensures that we only execute this on aarch64 targets. - unsafe { crate::arch::aarch64::__isb(crate::arch::aarch64::SY) }; - } - #[cfg(target_arch = "arm")] - { - // SAFETY: the `cfg` attr ensures that we only execute this on arm targets - // with support for the v6 feature. - unsafe { crate::arch::arm::__yield() }; - } + crate::arch::riscv64::pause(); + } + + #[cfg(target_arch = "aarch64")] + { + // SAFETY: the `cfg` attr ensures that we only execute this on aarch64 targets. + unsafe { crate::arch::aarch64::__isb(crate::arch::aarch64::SY) }; + } + + #[cfg(all(target_arch = "arm", target_feature = "v6"))] + { + // SAFETY: the `cfg` attr ensures that we only execute this on arm targets + // with support for the v6 feature. + unsafe { crate::arch::arm::__yield() }; } } |