diff options
Diffstat (limited to 'compiler/rustc_codegen_gcc/src')
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/abi.rs | 79 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/attributes.rs | 3 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/base.rs | 7 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/builder.rs | 5 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/common.rs | 16 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/context.rs | 68 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/declare.rs | 17 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/gcc_util.rs | 9 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/int.rs | 165 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/intrinsic/archs.rs | 1455 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs | 24 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/intrinsic/mod.rs | 147 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/lib.rs | 6 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/type_.rs | 14 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/type_of.rs | 12 | 
15 files changed, 1812 insertions, 215 deletions
| diff --git a/compiler/rustc_codegen_gcc/src/abi.rs b/compiler/rustc_codegen_gcc/src/abi.rs index 35bb0b6e5f4..f601cd95f2a 100644 --- a/compiler/rustc_codegen_gcc/src/abi.rs +++ b/compiler/rustc_codegen_gcc/src/abi.rs @@ -1,3 +1,5 @@ +#[cfg(feature = "master")] +use gccjit::FnAttribute; use gccjit::{ToLValue, ToRValue, Type}; use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeMethods}; use rustc_data_structures::fx::FxHashSet; @@ -96,14 +98,23 @@ impl GccType for Reg { } } +pub struct FnAbiGcc<'gcc> { + pub return_type: Type<'gcc>, + pub arguments_type: Vec<Type<'gcc>>, + pub is_c_variadic: bool, + pub on_stack_param_indices: FxHashSet<usize>, + #[cfg(feature = "master")] + pub fn_attributes: Vec<FnAttribute<'gcc>>, +} + pub trait FnAbiGccExt<'gcc, 'tcx> { // TODO(antoyo): return a function pointer type instead? - fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>); + fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> FnAbiGcc<'gcc>; fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>; } impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> { - fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>) { + fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> FnAbiGcc<'gcc> { let mut on_stack_param_indices = FxHashSet::default(); // This capacity calculation is approximate. @@ -111,7 +122,7 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> { self.args.len() + if let PassMode::Indirect { .. } = self.ret.mode { 1 } else { 0 } ); - let return_ty = + let return_type = match self.ret.mode { PassMode::Ignore => cx.type_void(), PassMode::Direct(_) | PassMode::Pair(..) => self.ret.layout.immediate_gcc_type(cx), @@ -121,19 +132,24 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> { cx.type_void() } }; + #[cfg(feature = "master")] + let mut non_null_args = Vec::new(); #[cfg(feature = "master")] - let apply_attrs = |ty: Type<'gcc>, attrs: &ArgAttributes| { - if cx.sess().opts.optimize != config::OptLevel::No - && attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NoAlias) - { - ty.make_restrict() - } else { - ty + let mut apply_attrs = |mut ty: Type<'gcc>, attrs: &ArgAttributes, arg_index: usize| { + if cx.sess().opts.optimize == config::OptLevel::No { + return ty; + } + if attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NoAlias) { + ty = ty.make_restrict() + } + if attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NonNull) { + non_null_args.push(arg_index as i32 + 1); } + ty }; #[cfg(not(feature = "master"))] - let apply_attrs = |ty: Type<'gcc>, _attrs: &ArgAttributes| { + let apply_attrs = |ty: Type<'gcc>, _attrs: &ArgAttributes, _arg_index: usize| { ty }; @@ -141,8 +157,9 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> { let arg_ty = match arg.mode { PassMode::Ignore => continue, PassMode::Pair(a, b) => { - argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 0), &a)); - argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 1), &b)); + let arg_pos = argument_tys.len(); + argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 0), &a, arg_pos)); + argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 1), &b, arg_pos + 1)); continue; } PassMode::Cast { ref cast, pad_i32 } => { @@ -151,31 +168,53 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> { argument_tys.push(Reg::i32().gcc_type(cx)); } let ty = cast.gcc_type(cx); - apply_attrs(ty, &cast.attrs) + apply_attrs(ty, &cast.attrs, argument_tys.len()) } PassMode::Indirect { attrs: _, meta_attrs: None, on_stack: true } => { // This is a "byval" argument, so we don't apply the `restrict` attribute on it. on_stack_param_indices.insert(argument_tys.len()); arg.memory_ty(cx) }, - PassMode::Direct(attrs) => apply_attrs(arg.layout.immediate_gcc_type(cx), &attrs), + PassMode::Direct(attrs) => apply_attrs(arg.layout.immediate_gcc_type(cx), &attrs, argument_tys.len()), PassMode::Indirect { attrs, meta_attrs: None, on_stack: false } => { - apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs) + apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs, argument_tys.len()) } PassMode::Indirect { attrs, meta_attrs: Some(meta_attrs), on_stack } => { assert!(!on_stack); - apply_attrs(apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs), &meta_attrs) + let ty = apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs, argument_tys.len()); + apply_attrs(ty, &meta_attrs, argument_tys.len()) } }; argument_tys.push(arg_ty); } - (return_ty, argument_tys, self.c_variadic, on_stack_param_indices) + #[cfg(feature = "master")] + let fn_attrs = if non_null_args.is_empty() { + Vec::new() + } else { + vec![FnAttribute::NonNull(non_null_args)] + }; + + FnAbiGcc { + return_type, + arguments_type: argument_tys, + is_c_variadic: self.c_variadic, + on_stack_param_indices, + #[cfg(feature = "master")] + fn_attributes: fn_attrs, + } } fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> { - let (return_type, params, variadic, on_stack_param_indices) = self.gcc_type(cx); - let pointer_type = cx.context.new_function_pointer_type(None, return_type, ¶ms, variadic); + // FIXME(antoyo): Should we do something with `FnAbiGcc::fn_attributes`? + let FnAbiGcc { + return_type, + arguments_type, + is_c_variadic, + on_stack_param_indices, + .. + } = self.gcc_type(cx); + let pointer_type = cx.context.new_function_pointer_type(None, return_type, &arguments_type, is_c_variadic); cx.on_stack_params.borrow_mut().insert(pointer_type.dyncast_function_ptr_type().expect("function ptr type"), on_stack_param_indices); pointer_type } diff --git a/compiler/rustc_codegen_gcc/src/attributes.rs b/compiler/rustc_codegen_gcc/src/attributes.rs index 971e019a4f6..6159971cfaa 100644 --- a/compiler/rustc_codegen_gcc/src/attributes.rs +++ b/compiler/rustc_codegen_gcc/src/attributes.rs @@ -53,6 +53,9 @@ pub fn from_fn_attrs<'gcc, 'tcx>( codegen_fn_attrs.inline }; if let Some(attr) = inline_attr(cx, inline) { + if let FnAttribute::AlwaysInline = attr { + func.add_attribute(FnAttribute::Inline); + } func.add_attribute(attr); } diff --git a/compiler/rustc_codegen_gcc/src/base.rs b/compiler/rustc_codegen_gcc/src/base.rs index b081e9ff2fd..5073066c138 100644 --- a/compiler/rustc_codegen_gcc/src/base.rs +++ b/compiler/rustc_codegen_gcc/src/base.rs @@ -98,10 +98,11 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock .map(|string| &string[1..]) .collect(); - // TODO(antoyo): only set on x86 platforms. - context.add_command_line_option("-masm=intel"); + if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" { + context.add_command_line_option("-masm=intel"); + } - if !disabled_features.contains("avx") { + if !disabled_features.contains("avx") && tcx.sess.target.arch == "x86_64" { // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead. // FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar. diff --git a/compiler/rustc_codegen_gcc/src/builder.rs b/compiler/rustc_codegen_gcc/src/builder.rs index b7841808934..b8a8c144dc9 100644 --- a/compiler/rustc_codegen_gcc/src/builder.rs +++ b/compiler/rustc_codegen_gcc/src/builder.rs @@ -751,9 +751,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> { loaded_value.to_rvalue() } - fn volatile_load(&mut self, _ty: Type<'gcc>, ptr: RValue<'gcc>) -> RValue<'gcc> { - // TODO(antoyo): use ty. - let ptr = self.context.new_cast(None, ptr, ptr.get_type().make_volatile()); + fn volatile_load(&mut self, ty: Type<'gcc>, ptr: RValue<'gcc>) -> RValue<'gcc> { + let ptr = self.context.new_cast(None, ptr, ty.make_volatile().make_pointer()); ptr.dereference(None).to_rvalue() } diff --git a/compiler/rustc_codegen_gcc/src/common.rs b/compiler/rustc_codegen_gcc/src/common.rs index 5f54cb16d8e..93fe27e547a 100644 --- a/compiler/rustc_codegen_gcc/src/common.rs +++ b/compiler/rustc_codegen_gcc/src/common.rs @@ -424,35 +424,35 @@ impl<'gcc, 'tcx> TypeReflection<'gcc, 'tcx> for Type<'gcc> { } fn is_i8(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool { - self.unqualified() == cx.i8_type + self.is_compatible_with(cx.i8_type) } fn is_u8(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool { - self.unqualified() == cx.u8_type + self.is_compatible_with(cx.u8_type) } fn is_i16(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool { - self.unqualified() == cx.i16_type + self.is_compatible_with(cx.i16_type) } fn is_u16(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool { - self.unqualified() == cx.u16_type + self.is_compatible_with(cx.u16_type) } fn is_i32(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool { - self.unqualified() == cx.i32_type + self.is_compatible_with(cx.i32_type) } fn is_u32(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool { - self.unqualified() == cx.u32_type + self.is_compatible_with(cx.u32_type) } fn is_i64(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool { - self.unqualified() == cx.i64_type + self.is_compatible_with(cx.i64_type) } fn is_u64(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool { - self.unqualified() == cx.u64_type + self.is_compatible_with(cx.u64_type) } fn is_i128(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool { diff --git a/compiler/rustc_codegen_gcc/src/context.rs b/compiler/rustc_codegen_gcc/src/context.rs index dcebd92a61c..a043660ea63 100644 --- a/compiler/rustc_codegen_gcc/src/context.rs +++ b/compiler/rustc_codegen_gcc/src/context.rs @@ -20,6 +20,7 @@ use rustc_target::abi::{call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDat use rustc_target::spec::{HasTargetSpec, Target, TlsModel}; use crate::callee::get_fn; +use crate::common::SignType; #[derive(Clone)] pub struct FuncSig<'gcc> { @@ -129,29 +130,57 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> { pub fn new(context: &'gcc Context<'gcc>, codegen_unit: &'tcx CodegenUnit<'tcx>, tcx: TyCtxt<'tcx>, supports_128bit_integers: bool) -> Self { let check_overflow = tcx.sess.overflow_checks(); - let i8_type = context.new_c_type(CType::Int8t); - let i16_type = context.new_c_type(CType::Int16t); - let i32_type = context.new_c_type(CType::Int32t); - let i64_type = context.new_c_type(CType::Int64t); - let u8_type = context.new_c_type(CType::UInt8t); - let u16_type = context.new_c_type(CType::UInt16t); - let u32_type = context.new_c_type(CType::UInt32t); - let u64_type = context.new_c_type(CType::UInt64t); + let create_type = |ctype, rust_type| { + let layout = tcx.layout_of(ParamEnv::reveal_all().and(rust_type)).unwrap(); + let align = layout.align.abi.bytes(); + #[cfg(feature="master")] + { + context.new_c_type(ctype).get_aligned(align) + } + #[cfg(not(feature="master"))] + { + // Since libgccjit 12 doesn't contain the fix to compare aligned integer types, + // only align u128 and i128. + if layout.ty.int_size_and_signed(tcx).0.bytes() == 16 { + context.new_c_type(ctype).get_aligned(align) + } + else { + context.new_c_type(ctype) + } + } + }; + + let i8_type = create_type(CType::Int8t, tcx.types.i8); + let i16_type = create_type(CType::Int16t, tcx.types.i16); + let i32_type = create_type(CType::Int32t, tcx.types.i32); + let i64_type = create_type(CType::Int64t, tcx.types.i64); + let u8_type = create_type(CType::UInt8t, tcx.types.u8); + let u16_type = create_type(CType::UInt16t, tcx.types.u16); + let u32_type = create_type(CType::UInt32t, tcx.types.u32); + let u64_type = create_type(CType::UInt64t, tcx.types.u64); let (i128_type, u128_type) = if supports_128bit_integers { - let i128_type = context.new_c_type(CType::Int128t).get_aligned(8); // TODO(antoyo): should the alignment be hard-coded?; - let u128_type = context.new_c_type(CType::UInt128t).get_aligned(8); // TODO(antoyo): should the alignment be hard-coded?; + let i128_type = create_type(CType::Int128t, tcx.types.i128); + let u128_type = create_type(CType::UInt128t, tcx.types.u128); (i128_type, u128_type) } else { - let i128_type = context.new_array_type(None, i64_type, 2); - let u128_type = context.new_array_type(None, u64_type, 2); + /*let layout = tcx.layout_of(ParamEnv::reveal_all().and(tcx.types.i128)).unwrap(); + let i128_align = layout.align.abi.bytes(); + let layout = tcx.layout_of(ParamEnv::reveal_all().and(tcx.types.u128)).unwrap(); + let u128_align = layout.align.abi.bytes();*/ + + // TODO(antoyo): re-enable the alignment when libgccjit fixed the issue in + // gcc_jit_context_new_array_constructor (it should not use reinterpret_cast). + let i128_type = context.new_array_type(None, i64_type, 2)/*.get_aligned(i128_align)*/; + let u128_type = context.new_array_type(None, u64_type, 2)/*.get_aligned(u128_align)*/; (i128_type, u128_type) }; let tls_model = to_gcc_tls_mode(tcx.sess.tls_model()); + // TODO(antoyo): set alignment on those types as well. let float_type = context.new_type::<f32>(); let double_type = context.new_type::<f64>(); @@ -167,14 +196,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> { let ulonglong_type = context.new_c_type(CType::ULongLong); let sizet_type = context.new_c_type(CType::SizeT); - let isize_type = context.new_c_type(CType::LongLong); - let usize_type = context.new_c_type(CType::ULongLong); + let usize_type = sizet_type; + let isize_type = usize_type; let bool_type = context.new_type::<bool>(); - // TODO(antoyo): only have those assertions on x86_64. - assert_eq!(isize_type.get_size(), i64_type.get_size()); - assert_eq!(usize_type.get_size(), u64_type.get_size()); - let mut functions = FxHashMap::default(); let builtins = [ "__builtin_unreachable", "abort", "__builtin_expect", "__builtin_add_overflow", "__builtin_mul_overflow", @@ -192,7 +217,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> { functions.insert(builtin.to_string(), context.get_builtin_function(builtin)); } - Self { + let mut cx = Self { check_overflow, codegen_unit, context, @@ -254,7 +279,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> { pointee_infos: Default::default(), structs_as_pointer: Default::default(), cleanup_blocks: Default::default(), - } + }; + // TODO(antoyo): instead of doing this, add SsizeT to libgccjit. + cx.isize_type = usize_type.to_signed(&cx); + cx } pub fn rvalue_as_function(&self, value: RValue<'gcc>) -> Function<'gcc> { diff --git a/compiler/rustc_codegen_gcc/src/declare.rs b/compiler/rustc_codegen_gcc/src/declare.rs index e673d0af4c7..247454fa58e 100644 --- a/compiler/rustc_codegen_gcc/src/declare.rs +++ b/compiler/rustc_codegen_gcc/src/declare.rs @@ -6,7 +6,7 @@ use rustc_middle::ty::Ty; use rustc_span::Symbol; use rustc_target::abi::call::FnAbi; -use crate::abi::FnAbiGccExt; +use crate::abi::{FnAbiGcc, FnAbiGccExt}; use crate::context::CodegenCx; use crate::intrinsic::llvm; @@ -80,9 +80,20 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> { } pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Function<'gcc> { - let (return_type, params, variadic, on_stack_param_indices) = fn_abi.gcc_type(self); - let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, ¶ms, variadic); + let FnAbiGcc { + return_type, + arguments_type, + is_c_variadic, + on_stack_param_indices, + #[cfg(feature="master")] + fn_attributes, + } = fn_abi.gcc_type(self); + let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &arguments_type, is_c_variadic); self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices); + #[cfg(feature="master")] + for fn_attr in fn_attributes { + func.add_attribute(fn_attr); + } func } diff --git a/compiler/rustc_codegen_gcc/src/gcc_util.rs b/compiler/rustc_codegen_gcc/src/gcc_util.rs index 0514c9988e0..1248fdcd259 100644 --- a/compiler/rustc_codegen_gcc/src/gcc_util.rs +++ b/compiler/rustc_codegen_gcc/src/gcc_util.rs @@ -198,9 +198,16 @@ pub fn check_tied_features(sess: &Session, features: &FxHashMap<&str, bool>) -> None } +fn arch_to_gcc(name: &str) -> &str { + match name { + "M68020" => "68020", + _ => name, + } +} + fn handle_native(name: &str) -> &str { if name != "native" { - return name; + return arch_to_gcc(name); } #[cfg(feature="master")] diff --git a/compiler/rustc_codegen_gcc/src/int.rs b/compiler/rustc_codegen_gcc/src/int.rs index 58e0dd56f38..ea8550d20f3 100644 --- a/compiler/rustc_codegen_gcc/src/int.rs +++ b/compiler/rustc_codegen_gcc/src/int.rs @@ -7,7 +7,9 @@ use std::convert::TryFrom; use gccjit::{ComparisonOp, FunctionType, RValue, ToRValue, Type, UnaryOp, BinaryOp}; use rustc_codegen_ssa::common::{IntPredicate, TypeKind}; use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeMethods, BuilderMethods, OverflowOp}; -use rustc_middle::ty::Ty; +use rustc_middle::ty::{ParamEnv, Ty}; +use rustc_target::abi::{Endian, call::{ArgAbi, ArgAttributes, Conv, FnAbi, PassMode}}; +use rustc_target::spec; use crate::builder::ToGccComp; use crate::{builder::Builder, common::{SignType, TypeReflection}, context::CodegenCx}; @@ -37,11 +39,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { } else { let element_type = typ.dyncast_array().expect("element type"); - let values = [ + self.from_low_high_rvalues(typ, self.cx.context.new_unary_op(None, UnaryOp::BitwiseNegate, element_type, self.low(a)), self.cx.context.new_unary_op(None, UnaryOp::BitwiseNegate, element_type, self.high(a)), - ]; - self.cx.context.new_array_constructor(None, typ, &values) + ) } } @@ -100,7 +101,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero); self.llbb().end_with_conditional(None, condition, then_block, else_block); - // TODO(antoyo): take endianness into account. let shift_value = self.gcc_sub(b, sixty_four); let high = self.high(a); let sign = @@ -110,11 +110,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { else { zero }; - let values = [ - high >> shift_value, - sign, - ]; - let array_value = self.context.new_array_constructor(None, a_type, &values); + let array_value = self.from_low_high_rvalues(a_type, high >> shift_value, sign); then_block.add_assignment(None, result, array_value); then_block.end_with_jump(None, after_block); @@ -130,11 +126,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { let casted_low = self.context.new_cast(None, self.low(a), unsigned_type); let shifted_low = casted_low >> self.context.new_cast(None, b, unsigned_type); let shifted_low = self.context.new_cast(None, shifted_low, native_int_type); - let values = [ + let array_value = self.from_low_high_rvalues(a_type, (high << shift_value) | shifted_low, high >> b, - ]; - let array_value = self.context.new_array_constructor(None, a_type, &values); + ); actual_else_block.add_assignment(None, result, array_value); actual_else_block.end_with_jump(None, after_block); @@ -314,18 +309,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { _ => unreachable!(), }, }; - let a_type = lhs.get_type(); - let b_type = rhs.get_type(); - let param_a = self.context.new_parameter(None, a_type, "a"); - let param_b = self.context.new_parameter(None, b_type, "b"); - let result_field = self.context.new_field(None, a_type, "result"); - let overflow_field = self.context.new_field(None, self.bool_type, "overflow"); - let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]); - let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false); - let result = self.context.new_call(None, func, &[lhs, rhs]); - let overflow = result.access_field(None, overflow_field); - let int_result = result.access_field(None, result_field); - return (int_result, overflow); + return self.operation_with_overflow(func_name, lhs, rhs); }, _ => { match oop { @@ -350,6 +334,54 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { (res.dereference(None).to_rvalue(), overflow) } + pub fn operation_with_overflow(&self, func_name: &str, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) { + let a_type = lhs.get_type(); + let b_type = rhs.get_type(); + let param_a = self.context.new_parameter(None, a_type, "a"); + let param_b = self.context.new_parameter(None, b_type, "b"); + let result_field = self.context.new_field(None, a_type, "result"); + let overflow_field = self.context.new_field(None, self.bool_type, "overflow"); + + let ret_ty = Ty::new_tup(self.tcx, &[self.tcx.types.i128, self.tcx.types.bool]); + let layout = self.tcx.layout_of(ParamEnv::reveal_all().and(ret_ty)).unwrap(); + + let arg_abi = ArgAbi { + layout, + mode: PassMode::Direct(ArgAttributes::new()), + }; + let mut fn_abi = FnAbi { + args: vec![arg_abi.clone(), arg_abi.clone()].into_boxed_slice(), + ret: arg_abi, + c_variadic: false, + fixed_count: 2, + conv: Conv::C, + can_unwind: false, + }; + fn_abi.adjust_for_foreign_abi(self.cx, spec::abi::Abi::C { + unwind: false, + }).unwrap(); + + let indirect = matches!(fn_abi.ret.mode, PassMode::Indirect { .. }); + + let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]); + let result = + if indirect { + let return_value = self.current_func().new_local(None, return_type.as_type(), "return_value"); + let return_param_type = return_type.as_type().make_pointer(); + let return_param = self.context.new_parameter(None, return_param_type, "return_value"); + let func = self.context.new_function(None, FunctionType::Extern, self.type_void(), &[return_param, param_a, param_b], func_name, false); + self.llbb().add_eval(None, self.context.new_call(None, func, &[return_value.get_address(None), lhs, rhs])); + return_value.to_rvalue() + } + else { + let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false); + self.context.new_call(None, func, &[lhs, rhs]) + }; + let overflow = result.access_field(None, overflow_field); + let int_result = result.access_field(None, result_field); + return (int_result, overflow); + } + pub fn gcc_icmp(&mut self, op: IntPredicate, mut lhs: RValue<'gcc>, mut rhs: RValue<'gcc>) -> RValue<'gcc> { let a_type = lhs.get_type(); let b_type = rhs.get_type(); @@ -415,6 +447,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { IntPredicate::IntNE => { return self.context.new_comparison(None, ComparisonOp::NotEquals, cmp, self.context.new_rvalue_one(self.int_type)); }, + // TODO(antoyo): cast to u128 for unsigned comparison. See below. IntPredicate::IntUGT => (ComparisonOp::Equals, 2), IntPredicate::IntUGE => (ComparisonOp::GreaterThanEquals, 1), IntPredicate::IntULT => (ComparisonOp::Equals, 0), @@ -444,6 +477,18 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { rhs = self.context.new_cast(None, rhs, a_type); } } + match op { + IntPredicate::IntUGT | IntPredicate::IntUGE | IntPredicate::IntULT | IntPredicate::IntULE => { + if !a_type.is_vector() { + let unsigned_type = a_type.to_unsigned(&self.cx); + lhs = self.context.new_cast(None, lhs, unsigned_type); + rhs = self.context.new_cast(None, rhs, unsigned_type); + } + }, + // TODO(antoyo): we probably need to handle signed comparison for unsigned + // integers. + _ => (), + } self.context.new_comparison(None, op.to_gcc_comparison(), lhs, rhs) } } @@ -455,11 +500,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { a ^ b } else { - let values = [ + self.from_low_high_rvalues(a_type, self.low(a) ^ self.low(b), self.high(a) ^ self.high(b), - ]; - self.context.new_array_constructor(None, a_type, &values) + ) } } @@ -505,12 +549,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero); self.llbb().end_with_conditional(None, condition, then_block, else_block); - // TODO(antoyo): take endianness into account. - let values = [ + let array_value = self.from_low_high_rvalues(a_type, zero, self.low(a) << (b - sixty_four), - ]; - let array_value = self.context.new_array_constructor(None, a_type, &values); + ); then_block.add_assignment(None, result, array_value); then_block.end_with_jump(None, after_block); @@ -521,16 +563,16 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { b0_block.end_with_jump(None, after_block); // NOTE: cast low to its unsigned type in order to perform a logical right shift. + // TODO(antoyo): adjust this ^ comment. let unsigned_type = native_int_type.to_unsigned(&self.cx); let casted_low = self.context.new_cast(None, self.low(a), unsigned_type); let shift_value = self.context.new_cast(None, sixty_four - b, unsigned_type); let high_low = self.context.new_cast(None, casted_low >> shift_value, native_int_type); - let values = [ + + let array_value = self.from_low_high_rvalues(a_type, self.low(a) << b, (self.high(a) << b) | high_low, - ]; - - let array_value = self.context.new_array_constructor(None, a_type, &values); + ); actual_else_block.add_assignment(None, result, array_value); actual_else_block.end_with_jump(None, after_block); @@ -546,16 +588,16 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { let arg_type = arg.get_type(); if !self.is_native_int_type(arg_type) { let native_int_type = arg_type.dyncast_array().expect("get element type"); - let lsb = self.context.new_array_access(None, arg, self.context.new_rvalue_from_int(self.int_type, 0)).to_rvalue(); + let lsb = self.low(arg); let swapped_lsb = self.gcc_bswap(lsb, width / 2); let swapped_lsb = self.context.new_cast(None, swapped_lsb, native_int_type); - let msb = self.context.new_array_access(None, arg, self.context.new_rvalue_from_int(self.int_type, 1)).to_rvalue(); + let msb = self.high(arg); let swapped_msb = self.gcc_bswap(msb, width / 2); let swapped_msb = self.context.new_cast(None, swapped_msb, native_int_type); // NOTE: we also need to swap the two elements here, in addition to swapping inside // the elements themselves like done above. - return self.context.new_array_constructor(None, arg_type, &[swapped_msb, swapped_lsb]); + return self.from_low_high_rvalues(arg_type, swapped_msb, swapped_lsb); } // TODO(antoyo): check if it's faster to use string literals and a @@ -659,11 +701,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> { else { assert!(!a_native && !b_native, "both types should either be native or non-native for or operation"); let native_int_type = a_type.dyncast_array().expect("get element type"); - let values = [ + self.from_low_high_rvalues(a_type, self.context.new_binary_op(None, operation, native_int_type, self.low(a), self.low(b)), self.context.new_binary_op(None, operation, native_int_type, self.high(a), self.high(b)), - ]; - self.context.new_array_constructor(None, a_type, &values) + ) } } @@ -687,11 +728,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> { let zero = self.context.new_rvalue_zero(value_type); let is_negative = self.context.new_comparison(None, ComparisonOp::LessThan, value, zero); let is_negative = self.gcc_int_cast(is_negative, dest_element_type); - let values = [ + self.from_low_high_rvalues(dest_typ, self.context.new_cast(None, value, dest_element_type), self.context.new_unary_op(None, UnaryOp::Minus, dest_element_type, is_negative), - ]; - self.context.new_array_constructor(None, dest_typ, &values) + ) } else { // Since u128 and i128 are the only types that can be unsupported, we know the type of @@ -769,20 +809,47 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> { } fn high(&self, value: RValue<'gcc>) -> RValue<'gcc> { - self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, 1)) + let index = + match self.sess().target.options.endian { + Endian::Little => 1, + Endian::Big => 0, + }; + self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, index)) .to_rvalue() } fn low(&self, value: RValue<'gcc>) -> RValue<'gcc> { - self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, 0)) + let index = + match self.sess().target.options.endian { + Endian::Little => 0, + Endian::Big => 1, + }; + self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, index)) .to_rvalue() } + fn from_low_high_rvalues(&self, typ: Type<'gcc>, low: RValue<'gcc>, high: RValue<'gcc>) -> RValue<'gcc> { + let (first, last) = + match self.sess().target.options.endian { + Endian::Little => (low, high), + Endian::Big => (high, low), + }; + + let values = [first, last]; + self.context.new_array_constructor(None, typ, &values) + } + fn from_low_high(&self, typ: Type<'gcc>, low: i64, high: i64) -> RValue<'gcc> { + let (first, last) = + match self.sess().target.options.endian { + Endian::Little => (low, high), + Endian::Big => (high, low), + }; + let native_int_type = typ.dyncast_array().expect("get element type"); let values = [ - self.context.new_rvalue_from_long(native_int_type, low), - self.context.new_rvalue_from_long(native_int_type, high), + self.context.new_rvalue_from_long(native_int_type, first), + self.context.new_rvalue_from_long(native_int_type, last), ]; self.context.new_array_constructor(None, typ, &values) } diff --git a/compiler/rustc_codegen_gcc/src/intrinsic/archs.rs b/compiler/rustc_codegen_gcc/src/intrinsic/archs.rs index e01299d32fd..15d67385c3e 100644 --- a/compiler/rustc_codegen_gcc/src/intrinsic/archs.rs +++ b/compiler/rustc_codegen_gcc/src/intrinsic/archs.rs @@ -2285,8 +2285,1460 @@ match name { "llvm.loongarch.iocsrwr.d" => "__builtin_loongarch_iocsrwr_d", "llvm.loongarch.iocsrwr.h" => "__builtin_loongarch_iocsrwr_h", "llvm.loongarch.iocsrwr.w" => "__builtin_loongarch_iocsrwr_w", + "llvm.loongarch.lasx.vext2xv.d.b" => "__builtin_lasx_vext2xv_d_b", + "llvm.loongarch.lasx.vext2xv.d.h" => "__builtin_lasx_vext2xv_d_h", + "llvm.loongarch.lasx.vext2xv.d.w" => "__builtin_lasx_vext2xv_d_w", + "llvm.loongarch.lasx.vext2xv.du.bu" => "__builtin_lasx_vext2xv_du_bu", + "llvm.loongarch.lasx.vext2xv.du.hu" => "__builtin_lasx_vext2xv_du_hu", + "llvm.loongarch.lasx.vext2xv.du.wu" => "__builtin_lasx_vext2xv_du_wu", + "llvm.loongarch.lasx.vext2xv.h.b" => "__builtin_lasx_vext2xv_h_b", + "llvm.loongarch.lasx.vext2xv.hu.bu" => "__builtin_lasx_vext2xv_hu_bu", + "llvm.loongarch.lasx.vext2xv.w.b" => "__builtin_lasx_vext2xv_w_b", + "llvm.loongarch.lasx.vext2xv.w.h" => "__builtin_lasx_vext2xv_w_h", + "llvm.loongarch.lasx.vext2xv.wu.bu" => "__builtin_lasx_vext2xv_wu_bu", + "llvm.loongarch.lasx.vext2xv.wu.hu" => "__builtin_lasx_vext2xv_wu_hu", + "llvm.loongarch.lasx.xbnz.b" => "__builtin_lasx_xbnz_b", + "llvm.loongarch.lasx.xbnz.d" => "__builtin_lasx_xbnz_d", + "llvm.loongarch.lasx.xbnz.h" => "__builtin_lasx_xbnz_h", + "llvm.loongarch.lasx.xbnz.v" => "__builtin_lasx_xbnz_v", + "llvm.loongarch.lasx.xbnz.w" => "__builtin_lasx_xbnz_w", + "llvm.loongarch.lasx.xbz.b" => "__builtin_lasx_xbz_b", + "llvm.loongarch.lasx.xbz.d" => "__builtin_lasx_xbz_d", + "llvm.loongarch.lasx.xbz.h" => "__builtin_lasx_xbz_h", + "llvm.loongarch.lasx.xbz.v" => "__builtin_lasx_xbz_v", + "llvm.loongarch.lasx.xbz.w" => "__builtin_lasx_xbz_w", + "llvm.loongarch.lasx.xvabsd.b" => "__builtin_lasx_xvabsd_b", + "llvm.loongarch.lasx.xvabsd.bu" => "__builtin_lasx_xvabsd_bu", + "llvm.loongarch.lasx.xvabsd.d" => "__builtin_lasx_xvabsd_d", + "llvm.loongarch.lasx.xvabsd.du" => "__builtin_lasx_xvabsd_du", + "llvm.loongarch.lasx.xvabsd.h" => "__builtin_lasx_xvabsd_h", + "llvm.loongarch.lasx.xvabsd.hu" => "__builtin_lasx_xvabsd_hu", + "llvm.loongarch.lasx.xvabsd.w" => "__builtin_lasx_xvabsd_w", + "llvm.loongarch.lasx.xvabsd.wu" => "__builtin_lasx_xvabsd_wu", + "llvm.loongarch.lasx.xvadd.b" => "__builtin_lasx_xvadd_b", + "llvm.loongarch.lasx.xvadd.d" => "__builtin_lasx_xvadd_d", + "llvm.loongarch.lasx.xvadd.h" => "__builtin_lasx_xvadd_h", + "llvm.loongarch.lasx.xvadd.q" => "__builtin_lasx_xvadd_q", + "llvm.loongarch.lasx.xvadd.w" => "__builtin_lasx_xvadd_w", + "llvm.loongarch.lasx.xvadda.b" => "__builtin_lasx_xvadda_b", + "llvm.loongarch.lasx.xvadda.d" => "__builtin_lasx_xvadda_d", + "llvm.loongarch.lasx.xvadda.h" => "__builtin_lasx_xvadda_h", + "llvm.loongarch.lasx.xvadda.w" => "__builtin_lasx_xvadda_w", + "llvm.loongarch.lasx.xvaddi.bu" => "__builtin_lasx_xvaddi_bu", + "llvm.loongarch.lasx.xvaddi.du" => "__builtin_lasx_xvaddi_du", + "llvm.loongarch.lasx.xvaddi.hu" => "__builtin_lasx_xvaddi_hu", + "llvm.loongarch.lasx.xvaddi.wu" => "__builtin_lasx_xvaddi_wu", + "llvm.loongarch.lasx.xvaddwev.d.w" => "__builtin_lasx_xvaddwev_d_w", + "llvm.loongarch.lasx.xvaddwev.d.wu" => "__builtin_lasx_xvaddwev_d_wu", + "llvm.loongarch.lasx.xvaddwev.d.wu.w" => "__builtin_lasx_xvaddwev_d_wu_w", + "llvm.loongarch.lasx.xvaddwev.h.b" => "__builtin_lasx_xvaddwev_h_b", + "llvm.loongarch.lasx.xvaddwev.h.bu" => "__builtin_lasx_xvaddwev_h_bu", + "llvm.loongarch.lasx.xvaddwev.h.bu.b" => "__builtin_lasx_xvaddwev_h_bu_b", + "llvm.loongarch.lasx.xvaddwev.q.d" => "__builtin_lasx_xvaddwev_q_d", + "llvm.loongarch.lasx.xvaddwev.q.du" => "__builtin_lasx_xvaddwev_q_du", + "llvm.loongarch.lasx.xvaddwev.q.du.d" => "__builtin_lasx_xvaddwev_q_du_d", + "llvm.loongarch.lasx.xvaddwev.w.h" => "__builtin_lasx_xvaddwev_w_h", + "llvm.loongarch.lasx.xvaddwev.w.hu" => "__builtin_lasx_xvaddwev_w_hu", + "llvm.loongarch.lasx.xvaddwev.w.hu.h" => "__builtin_lasx_xvaddwev_w_hu_h", + "llvm.loongarch.lasx.xvaddwod.d.w" => "__builtin_lasx_xvaddwod_d_w", + "llvm.loongarch.lasx.xvaddwod.d.wu" => "__builtin_lasx_xvaddwod_d_wu", + "llvm.loongarch.lasx.xvaddwod.d.wu.w" => "__builtin_lasx_xvaddwod_d_wu_w", + "llvm.loongarch.lasx.xvaddwod.h.b" => "__builtin_lasx_xvaddwod_h_b", + "llvm.loongarch.lasx.xvaddwod.h.bu" => "__builtin_lasx_xvaddwod_h_bu", + "llvm.loongarch.lasx.xvaddwod.h.bu.b" => "__builtin_lasx_xvaddwod_h_bu_b", + "llvm.loongarch.lasx.xvaddwod.q.d" => "__builtin_lasx_xvaddwod_q_d", + "llvm.loongarch.lasx.xvaddwod.q.du" => "__builtin_lasx_xvaddwod_q_du", + "llvm.loongarch.lasx.xvaddwod.q.du.d" => "__builtin_lasx_xvaddwod_q_du_d", + "llvm.loongarch.lasx.xvaddwod.w.h" => "__builtin_lasx_xvaddwod_w_h", + "llvm.loongarch.lasx.xvaddwod.w.hu" => "__builtin_lasx_xvaddwod_w_hu", + "llvm.loongarch.lasx.xvaddwod.w.hu.h" => "__builtin_lasx_xvaddwod_w_hu_h", + "llvm.loongarch.lasx.xvand.v" => "__builtin_lasx_xvand_v", + "llvm.loongarch.lasx.xvandi.b" => "__builtin_lasx_xvandi_b", + "llvm.loongarch.lasx.xvandn.v" => "__builtin_lasx_xvandn_v", + "llvm.loongarch.lasx.xvavg.b" => "__builtin_lasx_xvavg_b", + "llvm.loongarch.lasx.xvavg.bu" => "__builtin_lasx_xvavg_bu", + "llvm.loongarch.lasx.xvavg.d" => "__builtin_lasx_xvavg_d", + "llvm.loongarch.lasx.xvavg.du" => "__builtin_lasx_xvavg_du", + "llvm.loongarch.lasx.xvavg.h" => "__builtin_lasx_xvavg_h", + "llvm.loongarch.lasx.xvavg.hu" => "__builtin_lasx_xvavg_hu", + "llvm.loongarch.lasx.xvavg.w" => "__builtin_lasx_xvavg_w", + "llvm.loongarch.lasx.xvavg.wu" => "__builtin_lasx_xvavg_wu", + "llvm.loongarch.lasx.xvavgr.b" => "__builtin_lasx_xvavgr_b", + "llvm.loongarch.lasx.xvavgr.bu" => "__builtin_lasx_xvavgr_bu", + "llvm.loongarch.lasx.xvavgr.d" => "__builtin_lasx_xvavgr_d", + "llvm.loongarch.lasx.xvavgr.du" => "__builtin_lasx_xvavgr_du", + "llvm.loongarch.lasx.xvavgr.h" => "__builtin_lasx_xvavgr_h", + "llvm.loongarch.lasx.xvavgr.hu" => "__builtin_lasx_xvavgr_hu", + "llvm.loongarch.lasx.xvavgr.w" => "__builtin_lasx_xvavgr_w", + "llvm.loongarch.lasx.xvavgr.wu" => "__builtin_lasx_xvavgr_wu", + "llvm.loongarch.lasx.xvbitclr.b" => "__builtin_lasx_xvbitclr_b", + "llvm.loongarch.lasx.xvbitclr.d" => "__builtin_lasx_xvbitclr_d", + "llvm.loongarch.lasx.xvbitclr.h" => "__builtin_lasx_xvbitclr_h", + "llvm.loongarch.lasx.xvbitclr.w" => "__builtin_lasx_xvbitclr_w", + "llvm.loongarch.lasx.xvbitclri.b" => "__builtin_lasx_xvbitclri_b", + "llvm.loongarch.lasx.xvbitclri.d" => "__builtin_lasx_xvbitclri_d", + "llvm.loongarch.lasx.xvbitclri.h" => "__builtin_lasx_xvbitclri_h", + "llvm.loongarch.lasx.xvbitclri.w" => "__builtin_lasx_xvbitclri_w", + "llvm.loongarch.lasx.xvbitrev.b" => "__builtin_lasx_xvbitrev_b", + "llvm.loongarch.lasx.xvbitrev.d" => "__builtin_lasx_xvbitrev_d", + "llvm.loongarch.lasx.xvbitrev.h" => "__builtin_lasx_xvbitrev_h", + "llvm.loongarch.lasx.xvbitrev.w" => "__builtin_lasx_xvbitrev_w", + "llvm.loongarch.lasx.xvbitrevi.b" => "__builtin_lasx_xvbitrevi_b", + "llvm.loongarch.lasx.xvbitrevi.d" => "__builtin_lasx_xvbitrevi_d", + "llvm.loongarch.lasx.xvbitrevi.h" => "__builtin_lasx_xvbitrevi_h", + "llvm.loongarch.lasx.xvbitrevi.w" => "__builtin_lasx_xvbitrevi_w", + "llvm.loongarch.lasx.xvbitsel.v" => "__builtin_lasx_xvbitsel_v", + "llvm.loongarch.lasx.xvbitseli.b" => "__builtin_lasx_xvbitseli_b", + "llvm.loongarch.lasx.xvbitset.b" => "__builtin_lasx_xvbitset_b", + "llvm.loongarch.lasx.xvbitset.d" => "__builtin_lasx_xvbitset_d", + "llvm.loongarch.lasx.xvbitset.h" => "__builtin_lasx_xvbitset_h", + "llvm.loongarch.lasx.xvbitset.w" => "__builtin_lasx_xvbitset_w", + "llvm.loongarch.lasx.xvbitseti.b" => "__builtin_lasx_xvbitseti_b", + "llvm.loongarch.lasx.xvbitseti.d" => "__builtin_lasx_xvbitseti_d", + "llvm.loongarch.lasx.xvbitseti.h" => "__builtin_lasx_xvbitseti_h", + "llvm.loongarch.lasx.xvbitseti.w" => "__builtin_lasx_xvbitseti_w", + "llvm.loongarch.lasx.xvbsll.v" => "__builtin_lasx_xvbsll_v", + "llvm.loongarch.lasx.xvbsrl.v" => "__builtin_lasx_xvbsrl_v", + "llvm.loongarch.lasx.xvclo.b" => "__builtin_lasx_xvclo_b", + "llvm.loongarch.lasx.xvclo.d" => "__builtin_lasx_xvclo_d", + "llvm.loongarch.lasx.xvclo.h" => "__builtin_lasx_xvclo_h", + "llvm.loongarch.lasx.xvclo.w" => "__builtin_lasx_xvclo_w", + "llvm.loongarch.lasx.xvclz.b" => "__builtin_lasx_xvclz_b", + "llvm.loongarch.lasx.xvclz.d" => "__builtin_lasx_xvclz_d", + "llvm.loongarch.lasx.xvclz.h" => "__builtin_lasx_xvclz_h", + "llvm.loongarch.lasx.xvclz.w" => "__builtin_lasx_xvclz_w", + "llvm.loongarch.lasx.xvdiv.b" => "__builtin_lasx_xvdiv_b", + "llvm.loongarch.lasx.xvdiv.bu" => "__builtin_lasx_xvdiv_bu", + "llvm.loongarch.lasx.xvdiv.d" => "__builtin_lasx_xvdiv_d", + "llvm.loongarch.lasx.xvdiv.du" => "__builtin_lasx_xvdiv_du", + "llvm.loongarch.lasx.xvdiv.h" => "__builtin_lasx_xvdiv_h", + "llvm.loongarch.lasx.xvdiv.hu" => "__builtin_lasx_xvdiv_hu", + "llvm.loongarch.lasx.xvdiv.w" => "__builtin_lasx_xvdiv_w", + "llvm.loongarch.lasx.xvdiv.wu" => "__builtin_lasx_xvdiv_wu", + "llvm.loongarch.lasx.xvexth.d.w" => "__builtin_lasx_xvexth_d_w", + "llvm.loongarch.lasx.xvexth.du.wu" => "__builtin_lasx_xvexth_du_wu", + "llvm.loongarch.lasx.xvexth.h.b" => "__builtin_lasx_xvexth_h_b", + "llvm.loongarch.lasx.xvexth.hu.bu" => "__builtin_lasx_xvexth_hu_bu", + "llvm.loongarch.lasx.xvexth.q.d" => "__builtin_lasx_xvexth_q_d", + "llvm.loongarch.lasx.xvexth.qu.du" => "__builtin_lasx_xvexth_qu_du", + "llvm.loongarch.lasx.xvexth.w.h" => "__builtin_lasx_xvexth_w_h", + "llvm.loongarch.lasx.xvexth.wu.hu" => "__builtin_lasx_xvexth_wu_hu", + "llvm.loongarch.lasx.xvextl.q.d" => "__builtin_lasx_xvextl_q_d", + "llvm.loongarch.lasx.xvextl.qu.du" => "__builtin_lasx_xvextl_qu_du", + "llvm.loongarch.lasx.xvextrins.b" => "__builtin_lasx_xvextrins_b", + "llvm.loongarch.lasx.xvextrins.d" => "__builtin_lasx_xvextrins_d", + "llvm.loongarch.lasx.xvextrins.h" => "__builtin_lasx_xvextrins_h", + "llvm.loongarch.lasx.xvextrins.w" => "__builtin_lasx_xvextrins_w", + "llvm.loongarch.lasx.xvfadd.d" => "__builtin_lasx_xvfadd_d", + "llvm.loongarch.lasx.xvfadd.s" => "__builtin_lasx_xvfadd_s", + "llvm.loongarch.lasx.xvfclass.d" => "__builtin_lasx_xvfclass_d", + "llvm.loongarch.lasx.xvfclass.s" => "__builtin_lasx_xvfclass_s", + "llvm.loongarch.lasx.xvfcmp.caf.d" => "__builtin_lasx_xvfcmp_caf_d", + "llvm.loongarch.lasx.xvfcmp.caf.s" => "__builtin_lasx_xvfcmp_caf_s", + "llvm.loongarch.lasx.xvfcmp.ceq.d" => "__builtin_lasx_xvfcmp_ceq_d", + "llvm.loongarch.lasx.xvfcmp.ceq.s" => "__builtin_lasx_xvfcmp_ceq_s", + "llvm.loongarch.lasx.xvfcmp.cle.d" => "__builtin_lasx_xvfcmp_cle_d", + "llvm.loongarch.lasx.xvfcmp.cle.s" => "__builtin_lasx_xvfcmp_cle_s", + "llvm.loongarch.lasx.xvfcmp.clt.d" => "__builtin_lasx_xvfcmp_clt_d", + "llvm.loongarch.lasx.xvfcmp.clt.s" => "__builtin_lasx_xvfcmp_clt_s", + "llvm.loongarch.lasx.xvfcmp.cne.d" => "__builtin_lasx_xvfcmp_cne_d", + "llvm.loongarch.lasx.xvfcmp.cne.s" => "__builtin_lasx_xvfcmp_cne_s", + "llvm.loongarch.lasx.xvfcmp.cor.d" => "__builtin_lasx_xvfcmp_cor_d", + "llvm.loongarch.lasx.xvfcmp.cor.s" => "__builtin_lasx_xvfcmp_cor_s", + "llvm.loongarch.lasx.xvfcmp.cueq.d" => "__builtin_lasx_xvfcmp_cueq_d", + "llvm.loongarch.lasx.xvfcmp.cueq.s" => "__builtin_lasx_xvfcmp_cueq_s", + "llvm.loongarch.lasx.xvfcmp.cule.d" => "__builtin_lasx_xvfcmp_cule_d", + "llvm.loongarch.lasx.xvfcmp.cule.s" => "__builtin_lasx_xvfcmp_cule_s", + "llvm.loongarch.lasx.xvfcmp.cult.d" => "__builtin_lasx_xvfcmp_cult_d", + "llvm.loongarch.lasx.xvfcmp.cult.s" => "__builtin_lasx_xvfcmp_cult_s", + "llvm.loongarch.lasx.xvfcmp.cun.d" => "__builtin_lasx_xvfcmp_cun_d", + "llvm.loongarch.lasx.xvfcmp.cun.s" => "__builtin_lasx_xvfcmp_cun_s", + "llvm.loongarch.lasx.xvfcmp.cune.d" => "__builtin_lasx_xvfcmp_cune_d", + "llvm.loongarch.lasx.xvfcmp.cune.s" => "__builtin_lasx_xvfcmp_cune_s", + "llvm.loongarch.lasx.xvfcmp.saf.d" => "__builtin_lasx_xvfcmp_saf_d", + "llvm.loongarch.lasx.xvfcmp.saf.s" => "__builtin_lasx_xvfcmp_saf_s", + "llvm.loongarch.lasx.xvfcmp.seq.d" => "__builtin_lasx_xvfcmp_seq_d", + "llvm.loongarch.lasx.xvfcmp.seq.s" => "__builtin_lasx_xvfcmp_seq_s", + "llvm.loongarch.lasx.xvfcmp.sle.d" => "__builtin_lasx_xvfcmp_sle_d", + "llvm.loongarch.lasx.xvfcmp.sle.s" => "__builtin_lasx_xvfcmp_sle_s", + "llvm.loongarch.lasx.xvfcmp.slt.d" => "__builtin_lasx_xvfcmp_slt_d", + "llvm.loongarch.lasx.xvfcmp.slt.s" => "__builtin_lasx_xvfcmp_slt_s", + "llvm.loongarch.lasx.xvfcmp.sne.d" => "__builtin_lasx_xvfcmp_sne_d", + "llvm.loongarch.lasx.xvfcmp.sne.s" => "__builtin_lasx_xvfcmp_sne_s", + "llvm.loongarch.lasx.xvfcmp.sor.d" => "__builtin_lasx_xvfcmp_sor_d", + "llvm.loongarch.lasx.xvfcmp.sor.s" => "__builtin_lasx_xvfcmp_sor_s", + "llvm.loongarch.lasx.xvfcmp.sueq.d" => "__builtin_lasx_xvfcmp_sueq_d", + "llvm.loongarch.lasx.xvfcmp.sueq.s" => "__builtin_lasx_xvfcmp_sueq_s", + "llvm.loongarch.lasx.xvfcmp.sule.d" => "__builtin_lasx_xvfcmp_sule_d", + "llvm.loongarch.lasx.xvfcmp.sule.s" => "__builtin_lasx_xvfcmp_sule_s", + "llvm.loongarch.lasx.xvfcmp.sult.d" => "__builtin_lasx_xvfcmp_sult_d", + "llvm.loongarch.lasx.xvfcmp.sult.s" => "__builtin_lasx_xvfcmp_sult_s", + "llvm.loongarch.lasx.xvfcmp.sun.d" => "__builtin_lasx_xvfcmp_sun_d", + "llvm.loongarch.lasx.xvfcmp.sun.s" => "__builtin_lasx_xvfcmp_sun_s", + "llvm.loongarch.lasx.xvfcmp.sune.d" => "__builtin_lasx_xvfcmp_sune_d", + "llvm.loongarch.lasx.xvfcmp.sune.s" => "__builtin_lasx_xvfcmp_sune_s", + "llvm.loongarch.lasx.xvfcvt.h.s" => "__builtin_lasx_xvfcvt_h_s", + "llvm.loongarch.lasx.xvfcvt.s.d" => "__builtin_lasx_xvfcvt_s_d", + "llvm.loongarch.lasx.xvfcvth.d.s" => "__builtin_lasx_xvfcvth_d_s", + "llvm.loongarch.lasx.xvfcvth.s.h" => "__builtin_lasx_xvfcvth_s_h", + "llvm.loongarch.lasx.xvfcvtl.d.s" => "__builtin_lasx_xvfcvtl_d_s", + "llvm.loongarch.lasx.xvfcvtl.s.h" => "__builtin_lasx_xvfcvtl_s_h", + "llvm.loongarch.lasx.xvfdiv.d" => "__builtin_lasx_xvfdiv_d", + "llvm.loongarch.lasx.xvfdiv.s" => "__builtin_lasx_xvfdiv_s", + "llvm.loongarch.lasx.xvffint.d.l" => "__builtin_lasx_xvffint_d_l", + "llvm.loongarch.lasx.xvffint.d.lu" => "__builtin_lasx_xvffint_d_lu", + "llvm.loongarch.lasx.xvffint.s.l" => "__builtin_lasx_xvffint_s_l", + "llvm.loongarch.lasx.xvffint.s.w" => "__builtin_lasx_xvffint_s_w", + "llvm.loongarch.lasx.xvffint.s.wu" => "__builtin_lasx_xvffint_s_wu", + "llvm.loongarch.lasx.xvffinth.d.w" => "__builtin_lasx_xvffinth_d_w", + "llvm.loongarch.lasx.xvffintl.d.w" => "__builtin_lasx_xvffintl_d_w", + "llvm.loongarch.lasx.xvflogb.d" => "__builtin_lasx_xvflogb_d", + "llvm.loongarch.lasx.xvflogb.s" => "__builtin_lasx_xvflogb_s", + "llvm.loongarch.lasx.xvfmadd.d" => "__builtin_lasx_xvfmadd_d", + "llvm.loongarch.lasx.xvfmadd.s" => "__builtin_lasx_xvfmadd_s", + "llvm.loongarch.lasx.xvfmax.d" => "__builtin_lasx_xvfmax_d", + "llvm.loongarch.lasx.xvfmax.s" => "__builtin_lasx_xvfmax_s", + "llvm.loongarch.lasx.xvfmaxa.d" => "__builtin_lasx_xvfmaxa_d", + "llvm.loongarch.lasx.xvfmaxa.s" => "__builtin_lasx_xvfmaxa_s", + "llvm.loongarch.lasx.xvfmin.d" => "__builtin_lasx_xvfmin_d", + "llvm.loongarch.lasx.xvfmin.s" => "__builtin_lasx_xvfmin_s", + "llvm.loongarch.lasx.xvfmina.d" => "__builtin_lasx_xvfmina_d", + "llvm.loongarch.lasx.xvfmina.s" => "__builtin_lasx_xvfmina_s", + "llvm.loongarch.lasx.xvfmsub.d" => "__builtin_lasx_xvfmsub_d", + "llvm.loongarch.lasx.xvfmsub.s" => "__builtin_lasx_xvfmsub_s", + "llvm.loongarch.lasx.xvfmul.d" => "__builtin_lasx_xvfmul_d", + "llvm.loongarch.lasx.xvfmul.s" => "__builtin_lasx_xvfmul_s", + "llvm.loongarch.lasx.xvfnmadd.d" => "__builtin_lasx_xvfnmadd_d", + "llvm.loongarch.lasx.xvfnmadd.s" => "__builtin_lasx_xvfnmadd_s", + "llvm.loongarch.lasx.xvfnmsub.d" => "__builtin_lasx_xvfnmsub_d", + "llvm.loongarch.lasx.xvfnmsub.s" => "__builtin_lasx_xvfnmsub_s", + "llvm.loongarch.lasx.xvfrecip.d" => "__builtin_lasx_xvfrecip_d", + "llvm.loongarch.lasx.xvfrecip.s" => "__builtin_lasx_xvfrecip_s", + "llvm.loongarch.lasx.xvfrint.d" => "__builtin_lasx_xvfrint_d", + "llvm.loongarch.lasx.xvfrint.s" => "__builtin_lasx_xvfrint_s", + "llvm.loongarch.lasx.xvfrintrm.d" => "__builtin_lasx_xvfrintrm_d", + "llvm.loongarch.lasx.xvfrintrm.s" => "__builtin_lasx_xvfrintrm_s", + "llvm.loongarch.lasx.xvfrintrne.d" => "__builtin_lasx_xvfrintrne_d", + "llvm.loongarch.lasx.xvfrintrne.s" => "__builtin_lasx_xvfrintrne_s", + "llvm.loongarch.lasx.xvfrintrp.d" => "__builtin_lasx_xvfrintrp_d", + "llvm.loongarch.lasx.xvfrintrp.s" => "__builtin_lasx_xvfrintrp_s", + "llvm.loongarch.lasx.xvfrintrz.d" => "__builtin_lasx_xvfrintrz_d", + "llvm.loongarch.lasx.xvfrintrz.s" => "__builtin_lasx_xvfrintrz_s", + "llvm.loongarch.lasx.xvfrsqrt.d" => "__builtin_lasx_xvfrsqrt_d", + "llvm.loongarch.lasx.xvfrsqrt.s" => "__builtin_lasx_xvfrsqrt_s", + "llvm.loongarch.lasx.xvfrstp.b" => "__builtin_lasx_xvfrstp_b", + "llvm.loongarch.lasx.xvfrstp.h" => "__builtin_lasx_xvfrstp_h", + "llvm.loongarch.lasx.xvfrstpi.b" => "__builtin_lasx_xvfrstpi_b", + "llvm.loongarch.lasx.xvfrstpi.h" => "__builtin_lasx_xvfrstpi_h", + "llvm.loongarch.lasx.xvfsqrt.d" => "__builtin_lasx_xvfsqrt_d", + "llvm.loongarch.lasx.xvfsqrt.s" => "__builtin_lasx_xvfsqrt_s", + "llvm.loongarch.lasx.xvfsub.d" => "__builtin_lasx_xvfsub_d", + "llvm.loongarch.lasx.xvfsub.s" => "__builtin_lasx_xvfsub_s", + "llvm.loongarch.lasx.xvftint.l.d" => "__builtin_lasx_xvftint_l_d", + "llvm.loongarch.lasx.xvftint.lu.d" => "__builtin_lasx_xvftint_lu_d", + "llvm.loongarch.lasx.xvftint.w.d" => "__builtin_lasx_xvftint_w_d", + "llvm.loongarch.lasx.xvftint.w.s" => "__builtin_lasx_xvftint_w_s", + "llvm.loongarch.lasx.xvftint.wu.s" => "__builtin_lasx_xvftint_wu_s", + "llvm.loongarch.lasx.xvftinth.l.s" => "__builtin_lasx_xvftinth_l_s", + "llvm.loongarch.lasx.xvftintl.l.s" => "__builtin_lasx_xvftintl_l_s", + "llvm.loongarch.lasx.xvftintrm.l.d" => "__builtin_lasx_xvftintrm_l_d", + "llvm.loongarch.lasx.xvftintrm.w.d" => "__builtin_lasx_xvftintrm_w_d", + "llvm.loongarch.lasx.xvftintrm.w.s" => "__builtin_lasx_xvftintrm_w_s", + "llvm.loongarch.lasx.xvftintrmh.l.s" => "__builtin_lasx_xvftintrmh_l_s", + "llvm.loongarch.lasx.xvftintrml.l.s" => "__builtin_lasx_xvftintrml_l_s", + "llvm.loongarch.lasx.xvftintrne.l.d" => "__builtin_lasx_xvftintrne_l_d", + "llvm.loongarch.lasx.xvftintrne.w.d" => "__builtin_lasx_xvftintrne_w_d", + "llvm.loongarch.lasx.xvftintrne.w.s" => "__builtin_lasx_xvftintrne_w_s", + "llvm.loongarch.lasx.xvftintrneh.l.s" => "__builtin_lasx_xvftintrneh_l_s", + "llvm.loongarch.lasx.xvftintrnel.l.s" => "__builtin_lasx_xvftintrnel_l_s", + "llvm.loongarch.lasx.xvftintrp.l.d" => "__builtin_lasx_xvftintrp_l_d", + "llvm.loongarch.lasx.xvftintrp.w.d" => "__builtin_lasx_xvftintrp_w_d", + "llvm.loongarch.lasx.xvftintrp.w.s" => "__builtin_lasx_xvftintrp_w_s", + "llvm.loongarch.lasx.xvftintrph.l.s" => "__builtin_lasx_xvftintrph_l_s", + "llvm.loongarch.lasx.xvftintrpl.l.s" => "__builtin_lasx_xvftintrpl_l_s", + "llvm.loongarch.lasx.xvftintrz.l.d" => "__builtin_lasx_xvftintrz_l_d", + "llvm.loongarch.lasx.xvftintrz.lu.d" => "__builtin_lasx_xvftintrz_lu_d", + "llvm.loongarch.lasx.xvftintrz.w.d" => "__builtin_lasx_xvftintrz_w_d", + "llvm.loongarch.lasx.xvftintrz.w.s" => "__builtin_lasx_xvftintrz_w_s", + "llvm.loongarch.lasx.xvftintrz.wu.s" => "__builtin_lasx_xvftintrz_wu_s", + "llvm.loongarch.lasx.xvftintrzh.l.s" => "__builtin_lasx_xvftintrzh_l_s", + "llvm.loongarch.lasx.xvftintrzl.l.s" => "__builtin_lasx_xvftintrzl_l_s", + "llvm.loongarch.lasx.xvhaddw.d.w" => "__builtin_lasx_xvhaddw_d_w", + "llvm.loongarch.lasx.xvhaddw.du.wu" => "__builtin_lasx_xvhaddw_du_wu", + "llvm.loongarch.lasx.xvhaddw.h.b" => "__builtin_lasx_xvhaddw_h_b", + "llvm.loongarch.lasx.xvhaddw.hu.bu" => "__builtin_lasx_xvhaddw_hu_bu", + "llvm.loongarch.lasx.xvhaddw.q.d" => "__builtin_lasx_xvhaddw_q_d", + "llvm.loongarch.lasx.xvhaddw.qu.du" => "__builtin_lasx_xvhaddw_qu_du", + "llvm.loongarch.lasx.xvhaddw.w.h" => "__builtin_lasx_xvhaddw_w_h", + "llvm.loongarch.lasx.xvhaddw.wu.hu" => "__builtin_lasx_xvhaddw_wu_hu", + "llvm.loongarch.lasx.xvhsubw.d.w" => "__builtin_lasx_xvhsubw_d_w", + "llvm.loongarch.lasx.xvhsubw.du.wu" => "__builtin_lasx_xvhsubw_du_wu", + "llvm.loongarch.lasx.xvhsubw.h.b" => "__builtin_lasx_xvhsubw_h_b", + "llvm.loongarch.lasx.xvhsubw.hu.bu" => "__builtin_lasx_xvhsubw_hu_bu", + "llvm.loongarch.lasx.xvhsubw.q.d" => "__builtin_lasx_xvhsubw_q_d", + "llvm.loongarch.lasx.xvhsubw.qu.du" => "__builtin_lasx_xvhsubw_qu_du", + "llvm.loongarch.lasx.xvhsubw.w.h" => "__builtin_lasx_xvhsubw_w_h", + "llvm.loongarch.lasx.xvhsubw.wu.hu" => "__builtin_lasx_xvhsubw_wu_hu", + "llvm.loongarch.lasx.xvilvh.b" => "__builtin_lasx_xvilvh_b", + "llvm.loongarch.lasx.xvilvh.d" => "__builtin_lasx_xvilvh_d", + "llvm.loongarch.lasx.xvilvh.h" => "__builtin_lasx_xvilvh_h", + "llvm.loongarch.lasx.xvilvh.w" => "__builtin_lasx_xvilvh_w", + "llvm.loongarch.lasx.xvilvl.b" => "__builtin_lasx_xvilvl_b", + "llvm.loongarch.lasx.xvilvl.d" => "__builtin_lasx_xvilvl_d", + "llvm.loongarch.lasx.xvilvl.h" => "__builtin_lasx_xvilvl_h", + "llvm.loongarch.lasx.xvilvl.w" => "__builtin_lasx_xvilvl_w", + "llvm.loongarch.lasx.xvinsgr2vr.d" => "__builtin_lasx_xvinsgr2vr_d", + "llvm.loongarch.lasx.xvinsgr2vr.w" => "__builtin_lasx_xvinsgr2vr_w", + "llvm.loongarch.lasx.xvinsve0.d" => "__builtin_lasx_xvinsve0_d", + "llvm.loongarch.lasx.xvinsve0.w" => "__builtin_lasx_xvinsve0_w", + "llvm.loongarch.lasx.xvld" => "__builtin_lasx_xvld", + "llvm.loongarch.lasx.xvldi" => "__builtin_lasx_xvldi", + "llvm.loongarch.lasx.xvldrepl.b" => "__builtin_lasx_xvldrepl_b", + "llvm.loongarch.lasx.xvldrepl.d" => "__builtin_lasx_xvldrepl_d", + "llvm.loongarch.lasx.xvldrepl.h" => "__builtin_lasx_xvldrepl_h", + "llvm.loongarch.lasx.xvldrepl.w" => "__builtin_lasx_xvldrepl_w", + "llvm.loongarch.lasx.xvldx" => "__builtin_lasx_xvldx", + "llvm.loongarch.lasx.xvmadd.b" => "__builtin_lasx_xvmadd_b", + "llvm.loongarch.lasx.xvmadd.d" => "__builtin_lasx_xvmadd_d", + "llvm.loongarch.lasx.xvmadd.h" => "__builtin_lasx_xvmadd_h", + "llvm.loongarch.lasx.xvmadd.w" => "__builtin_lasx_xvmadd_w", + "llvm.loongarch.lasx.xvmaddwev.d.w" => "__builtin_lasx_xvmaddwev_d_w", + "llvm.loongarch.lasx.xvmaddwev.d.wu" => "__builtin_lasx_xvmaddwev_d_wu", + "llvm.loongarch.lasx.xvmaddwev.d.wu.w" => "__builtin_lasx_xvmaddwev_d_wu_w", + "llvm.loongarch.lasx.xvmaddwev.h.b" => "__builtin_lasx_xvmaddwev_h_b", + "llvm.loongarch.lasx.xvmaddwev.h.bu" => "__builtin_lasx_xvmaddwev_h_bu", + "llvm.loongarch.lasx.xvmaddwev.h.bu.b" => "__builtin_lasx_xvmaddwev_h_bu_b", + "llvm.loongarch.lasx.xvmaddwev.q.d" => "__builtin_lasx_xvmaddwev_q_d", + "llvm.loongarch.lasx.xvmaddwev.q.du" => "__builtin_lasx_xvmaddwev_q_du", + "llvm.loongarch.lasx.xvmaddwev.q.du.d" => "__builtin_lasx_xvmaddwev_q_du_d", + "llvm.loongarch.lasx.xvmaddwev.w.h" => "__builtin_lasx_xvmaddwev_w_h", + "llvm.loongarch.lasx.xvmaddwev.w.hu" => "__builtin_lasx_xvmaddwev_w_hu", + "llvm.loongarch.lasx.xvmaddwev.w.hu.h" => "__builtin_lasx_xvmaddwev_w_hu_h", + "llvm.loongarch.lasx.xvmaddwod.d.w" => "__builtin_lasx_xvmaddwod_d_w", + "llvm.loongarch.lasx.xvmaddwod.d.wu" => "__builtin_lasx_xvmaddwod_d_wu", + "llvm.loongarch.lasx.xvmaddwod.d.wu.w" => "__builtin_lasx_xvmaddwod_d_wu_w", + "llvm.loongarch.lasx.xvmaddwod.h.b" => "__builtin_lasx_xvmaddwod_h_b", + "llvm.loongarch.lasx.xvmaddwod.h.bu" => "__builtin_lasx_xvmaddwod_h_bu", + "llvm.loongarch.lasx.xvmaddwod.h.bu.b" => "__builtin_lasx_xvmaddwod_h_bu_b", + "llvm.loongarch.lasx.xvmaddwod.q.d" => "__builtin_lasx_xvmaddwod_q_d", + "llvm.loongarch.lasx.xvmaddwod.q.du" => "__builtin_lasx_xvmaddwod_q_du", + "llvm.loongarch.lasx.xvmaddwod.q.du.d" => "__builtin_lasx_xvmaddwod_q_du_d", + "llvm.loongarch.lasx.xvmaddwod.w.h" => "__builtin_lasx_xvmaddwod_w_h", + "llvm.loongarch.lasx.xvmaddwod.w.hu" => "__builtin_lasx_xvmaddwod_w_hu", + "llvm.loongarch.lasx.xvmaddwod.w.hu.h" => "__builtin_lasx_xvmaddwod_w_hu_h", + "llvm.loongarch.lasx.xvmax.b" => "__builtin_lasx_xvmax_b", + "llvm.loongarch.lasx.xvmax.bu" => "__builtin_lasx_xvmax_bu", + "llvm.loongarch.lasx.xvmax.d" => "__builtin_lasx_xvmax_d", + "llvm.loongarch.lasx.xvmax.du" => "__builtin_lasx_xvmax_du", + "llvm.loongarch.lasx.xvmax.h" => "__builtin_lasx_xvmax_h", + "llvm.loongarch.lasx.xvmax.hu" => "__builtin_lasx_xvmax_hu", + "llvm.loongarch.lasx.xvmax.w" => "__builtin_lasx_xvmax_w", + "llvm.loongarch.lasx.xvmax.wu" => "__builtin_lasx_xvmax_wu", + "llvm.loongarch.lasx.xvmaxi.b" => "__builtin_lasx_xvmaxi_b", + "llvm.loongarch.lasx.xvmaxi.bu" => "__builtin_lasx_xvmaxi_bu", + "llvm.loongarch.lasx.xvmaxi.d" => "__builtin_lasx_xvmaxi_d", + "llvm.loongarch.lasx.xvmaxi.du" => "__builtin_lasx_xvmaxi_du", + "llvm.loongarch.lasx.xvmaxi.h" => "__builtin_lasx_xvmaxi_h", + "llvm.loongarch.lasx.xvmaxi.hu" => "__builtin_lasx_xvmaxi_hu", + "llvm.loongarch.lasx.xvmaxi.w" => "__builtin_lasx_xvmaxi_w", + "llvm.loongarch.lasx.xvmaxi.wu" => "__builtin_lasx_xvmaxi_wu", + "llvm.loongarch.lasx.xvmin.b" => "__builtin_lasx_xvmin_b", + "llvm.loongarch.lasx.xvmin.bu" => "__builtin_lasx_xvmin_bu", + "llvm.loongarch.lasx.xvmin.d" => "__builtin_lasx_xvmin_d", + "llvm.loongarch.lasx.xvmin.du" => "__builtin_lasx_xvmin_du", + "llvm.loongarch.lasx.xvmin.h" => "__builtin_lasx_xvmin_h", + "llvm.loongarch.lasx.xvmin.hu" => "__builtin_lasx_xvmin_hu", + "llvm.loongarch.lasx.xvmin.w" => "__builtin_lasx_xvmin_w", + "llvm.loongarch.lasx.xvmin.wu" => "__builtin_lasx_xvmin_wu", + "llvm.loongarch.lasx.xvmini.b" => "__builtin_lasx_xvmini_b", + "llvm.loongarch.lasx.xvmini.bu" => "__builtin_lasx_xvmini_bu", + "llvm.loongarch.lasx.xvmini.d" => "__builtin_lasx_xvmini_d", + "llvm.loongarch.lasx.xvmini.du" => "__builtin_lasx_xvmini_du", + "llvm.loongarch.lasx.xvmini.h" => "__builtin_lasx_xvmini_h", + "llvm.loongarch.lasx.xvmini.hu" => "__builtin_lasx_xvmini_hu", + "llvm.loongarch.lasx.xvmini.w" => "__builtin_lasx_xvmini_w", + "llvm.loongarch.lasx.xvmini.wu" => "__builtin_lasx_xvmini_wu", + "llvm.loongarch.lasx.xvmod.b" => "__builtin_lasx_xvmod_b", + "llvm.loongarch.lasx.xvmod.bu" => "__builtin_lasx_xvmod_bu", + "llvm.loongarch.lasx.xvmod.d" => "__builtin_lasx_xvmod_d", + "llvm.loongarch.lasx.xvmod.du" => "__builtin_lasx_xvmod_du", + "llvm.loongarch.lasx.xvmod.h" => "__builtin_lasx_xvmod_h", + "llvm.loongarch.lasx.xvmod.hu" => "__builtin_lasx_xvmod_hu", + "llvm.loongarch.lasx.xvmod.w" => "__builtin_lasx_xvmod_w", + "llvm.loongarch.lasx.xvmod.wu" => "__builtin_lasx_xvmod_wu", + "llvm.loongarch.lasx.xvmskgez.b" => "__builtin_lasx_xvmskgez_b", + "llvm.loongarch.lasx.xvmskltz.b" => "__builtin_lasx_xvmskltz_b", + "llvm.loongarch.lasx.xvmskltz.d" => "__builtin_lasx_xvmskltz_d", + "llvm.loongarch.lasx.xvmskltz.h" => "__builtin_lasx_xvmskltz_h", + "llvm.loongarch.lasx.xvmskltz.w" => "__builtin_lasx_xvmskltz_w", + "llvm.loongarch.lasx.xvmsknz.b" => "__builtin_lasx_xvmsknz_b", + "llvm.loongarch.lasx.xvmsub.b" => "__builtin_lasx_xvmsub_b", + "llvm.loongarch.lasx.xvmsub.d" => "__builtin_lasx_xvmsub_d", + "llvm.loongarch.lasx.xvmsub.h" => "__builtin_lasx_xvmsub_h", + "llvm.loongarch.lasx.xvmsub.w" => "__builtin_lasx_xvmsub_w", + "llvm.loongarch.lasx.xvmuh.b" => "__builtin_lasx_xvmuh_b", + "llvm.loongarch.lasx.xvmuh.bu" => "__builtin_lasx_xvmuh_bu", + "llvm.loongarch.lasx.xvmuh.d" => "__builtin_lasx_xvmuh_d", + "llvm.loongarch.lasx.xvmuh.du" => "__builtin_lasx_xvmuh_du", + "llvm.loongarch.lasx.xvmuh.h" => "__builtin_lasx_xvmuh_h", + "llvm.loongarch.lasx.xvmuh.hu" => "__builtin_lasx_xvmuh_hu", + "llvm.loongarch.lasx.xvmuh.w" => "__builtin_lasx_xvmuh_w", + "llvm.loongarch.lasx.xvmuh.wu" => "__builtin_lasx_xvmuh_wu", + "llvm.loongarch.lasx.xvmul.b" => "__builtin_lasx_xvmul_b", + "llvm.loongarch.lasx.xvmul.d" => "__builtin_lasx_xvmul_d", + "llvm.loongarch.lasx.xvmul.h" => "__builtin_lasx_xvmul_h", + "llvm.loongarch.lasx.xvmul.w" => "__builtin_lasx_xvmul_w", + "llvm.loongarch.lasx.xvmulwev.d.w" => "__builtin_lasx_xvmulwev_d_w", + "llvm.loongarch.lasx.xvmulwev.d.wu" => "__builtin_lasx_xvmulwev_d_wu", + "llvm.loongarch.lasx.xvmulwev.d.wu.w" => "__builtin_lasx_xvmulwev_d_wu_w", + "llvm.loongarch.lasx.xvmulwev.h.b" => "__builtin_lasx_xvmulwev_h_b", + "llvm.loongarch.lasx.xvmulwev.h.bu" => "__builtin_lasx_xvmulwev_h_bu", + "llvm.loongarch.lasx.xvmulwev.h.bu.b" => "__builtin_lasx_xvmulwev_h_bu_b", + "llvm.loongarch.lasx.xvmulwev.q.d" => "__builtin_lasx_xvmulwev_q_d", + "llvm.loongarch.lasx.xvmulwev.q.du" => "__builtin_lasx_xvmulwev_q_du", + "llvm.loongarch.lasx.xvmulwev.q.du.d" => "__builtin_lasx_xvmulwev_q_du_d", + "llvm.loongarch.lasx.xvmulwev.w.h" => "__builtin_lasx_xvmulwev_w_h", + "llvm.loongarch.lasx.xvmulwev.w.hu" => "__builtin_lasx_xvmulwev_w_hu", + "llvm.loongarch.lasx.xvmulwev.w.hu.h" => "__builtin_lasx_xvmulwev_w_hu_h", + "llvm.loongarch.lasx.xvmulwod.d.w" => "__builtin_lasx_xvmulwod_d_w", + "llvm.loongarch.lasx.xvmulwod.d.wu" => "__builtin_lasx_xvmulwod_d_wu", + "llvm.loongarch.lasx.xvmulwod.d.wu.w" => "__builtin_lasx_xvmulwod_d_wu_w", + "llvm.loongarch.lasx.xvmulwod.h.b" => "__builtin_lasx_xvmulwod_h_b", + "llvm.loongarch.lasx.xvmulwod.h.bu" => "__builtin_lasx_xvmulwod_h_bu", + "llvm.loongarch.lasx.xvmulwod.h.bu.b" => "__builtin_lasx_xvmulwod_h_bu_b", + "llvm.loongarch.lasx.xvmulwod.q.d" => "__builtin_lasx_xvmulwod_q_d", + "llvm.loongarch.lasx.xvmulwod.q.du" => "__builtin_lasx_xvmulwod_q_du", + "llvm.loongarch.lasx.xvmulwod.q.du.d" => "__builtin_lasx_xvmulwod_q_du_d", + "llvm.loongarch.lasx.xvmulwod.w.h" => "__builtin_lasx_xvmulwod_w_h", + "llvm.loongarch.lasx.xvmulwod.w.hu" => "__builtin_lasx_xvmulwod_w_hu", + "llvm.loongarch.lasx.xvmulwod.w.hu.h" => "__builtin_lasx_xvmulwod_w_hu_h", + "llvm.loongarch.lasx.xvneg.b" => "__builtin_lasx_xvneg_b", + "llvm.loongarch.lasx.xvneg.d" => "__builtin_lasx_xvneg_d", + "llvm.loongarch.lasx.xvneg.h" => "__builtin_lasx_xvneg_h", + "llvm.loongarch.lasx.xvneg.w" => "__builtin_lasx_xvneg_w", + "llvm.loongarch.lasx.xvnor.v" => "__builtin_lasx_xvnor_v", + "llvm.loongarch.lasx.xvnori.b" => "__builtin_lasx_xvnori_b", + "llvm.loongarch.lasx.xvor.v" => "__builtin_lasx_xvor_v", + "llvm.loongarch.lasx.xvori.b" => "__builtin_lasx_xvori_b", + "llvm.loongarch.lasx.xvorn.v" => "__builtin_lasx_xvorn_v", + "llvm.loongarch.lasx.xvpackev.b" => "__builtin_lasx_xvpackev_b", + "llvm.loongarch.lasx.xvpackev.d" => "__builtin_lasx_xvpackev_d", + "llvm.loongarch.lasx.xvpackev.h" => "__builtin_lasx_xvpackev_h", + "llvm.loongarch.lasx.xvpackev.w" => "__builtin_lasx_xvpackev_w", + "llvm.loongarch.lasx.xvpackod.b" => "__builtin_lasx_xvpackod_b", + "llvm.loongarch.lasx.xvpackod.d" => "__builtin_lasx_xvpackod_d", + "llvm.loongarch.lasx.xvpackod.h" => "__builtin_lasx_xvpackod_h", + "llvm.loongarch.lasx.xvpackod.w" => "__builtin_lasx_xvpackod_w", + "llvm.loongarch.lasx.xvpcnt.b" => "__builtin_lasx_xvpcnt_b", + "llvm.loongarch.lasx.xvpcnt.d" => "__builtin_lasx_xvpcnt_d", + "llvm.loongarch.lasx.xvpcnt.h" => "__builtin_lasx_xvpcnt_h", + "llvm.loongarch.lasx.xvpcnt.w" => "__builtin_lasx_xvpcnt_w", + "llvm.loongarch.lasx.xvperm.w" => "__builtin_lasx_xvperm_w", + "llvm.loongarch.lasx.xvpermi.d" => "__builtin_lasx_xvpermi_d", + "llvm.loongarch.lasx.xvpermi.q" => "__builtin_lasx_xvpermi_q", + "llvm.loongarch.lasx.xvpermi.w" => "__builtin_lasx_xvpermi_w", + "llvm.loongarch.lasx.xvpickev.b" => "__builtin_lasx_xvpickev_b", + "llvm.loongarch.lasx.xvpickev.d" => "__builtin_lasx_xvpickev_d", + "llvm.loongarch.lasx.xvpickev.h" => "__builtin_lasx_xvpickev_h", + "llvm.loongarch.lasx.xvpickev.w" => "__builtin_lasx_xvpickev_w", + "llvm.loongarch.lasx.xvpickod.b" => "__builtin_lasx_xvpickod_b", + "llvm.loongarch.lasx.xvpickod.d" => "__builtin_lasx_xvpickod_d", + "llvm.loongarch.lasx.xvpickod.h" => "__builtin_lasx_xvpickod_h", + "llvm.loongarch.lasx.xvpickod.w" => "__builtin_lasx_xvpickod_w", + "llvm.loongarch.lasx.xvpickve.d" => "__builtin_lasx_xvpickve_d", + "llvm.loongarch.lasx.xvpickve.d.f" => "__builtin_lasx_xvpickve_d_f", + "llvm.loongarch.lasx.xvpickve.w" => "__builtin_lasx_xvpickve_w", + "llvm.loongarch.lasx.xvpickve.w.f" => "__builtin_lasx_xvpickve_w_f", + "llvm.loongarch.lasx.xvpickve2gr.d" => "__builtin_lasx_xvpickve2gr_d", + "llvm.loongarch.lasx.xvpickve2gr.du" => "__builtin_lasx_xvpickve2gr_du", + "llvm.loongarch.lasx.xvpickve2gr.w" => "__builtin_lasx_xvpickve2gr_w", + "llvm.loongarch.lasx.xvpickve2gr.wu" => "__builtin_lasx_xvpickve2gr_wu", + "llvm.loongarch.lasx.xvrepl128vei.b" => "__builtin_lasx_xvrepl128vei_b", + "llvm.loongarch.lasx.xvrepl128vei.d" => "__builtin_lasx_xvrepl128vei_d", + "llvm.loongarch.lasx.xvrepl128vei.h" => "__builtin_lasx_xvrepl128vei_h", + "llvm.loongarch.lasx.xvrepl128vei.w" => "__builtin_lasx_xvrepl128vei_w", + "llvm.loongarch.lasx.xvreplgr2vr.b" => "__builtin_lasx_xvreplgr2vr_b", + "llvm.loongarch.lasx.xvreplgr2vr.d" => "__builtin_lasx_xvreplgr2vr_d", + "llvm.loongarch.lasx.xvreplgr2vr.h" => "__builtin_lasx_xvreplgr2vr_h", + "llvm.loongarch.lasx.xvreplgr2vr.w" => "__builtin_lasx_xvreplgr2vr_w", + "llvm.loongarch.lasx.xvrepli.b" => "__builtin_lasx_xvrepli_b", + "llvm.loongarch.lasx.xvrepli.d" => "__builtin_lasx_xvrepli_d", + "llvm.loongarch.lasx.xvrepli.h" => "__builtin_lasx_xvrepli_h", + "llvm.loongarch.lasx.xvrepli.w" => "__builtin_lasx_xvrepli_w", + "llvm.loongarch.lasx.xvreplve.b" => "__builtin_lasx_xvreplve_b", + "llvm.loongarch.lasx.xvreplve.d" => "__builtin_lasx_xvreplve_d", + "llvm.loongarch.lasx.xvreplve.h" => "__builtin_lasx_xvreplve_h", + "llvm.loongarch.lasx.xvreplve.w" => "__builtin_lasx_xvreplve_w", + "llvm.loongarch.lasx.xvreplve0.b" => "__builtin_lasx_xvreplve0_b", + "llvm.loongarch.lasx.xvreplve0.d" => "__builtin_lasx_xvreplve0_d", + "llvm.loongarch.lasx.xvreplve0.h" => "__builtin_lasx_xvreplve0_h", + "llvm.loongarch.lasx.xvreplve0.q" => "__builtin_lasx_xvreplve0_q", + "llvm.loongarch.lasx.xvreplve0.w" => "__builtin_lasx_xvreplve0_w", + "llvm.loongarch.lasx.xvrotr.b" => "__builtin_lasx_xvrotr_b", + "llvm.loongarch.lasx.xvrotr.d" => "__builtin_lasx_xvrotr_d", + "llvm.loongarch.lasx.xvrotr.h" => "__builtin_lasx_xvrotr_h", + "llvm.loongarch.lasx.xvrotr.w" => "__builtin_lasx_xvrotr_w", + "llvm.loongarch.lasx.xvrotri.b" => "__builtin_lasx_xvrotri_b", + "llvm.loongarch.lasx.xvrotri.d" => "__builtin_lasx_xvrotri_d", + "llvm.loongarch.lasx.xvrotri.h" => "__builtin_lasx_xvrotri_h", + "llvm.loongarch.lasx.xvrotri.w" => "__builtin_lasx_xvrotri_w", + "llvm.loongarch.lasx.xvsadd.b" => "__builtin_lasx_xvsadd_b", + "llvm.loongarch.lasx.xvsadd.bu" => "__builtin_lasx_xvsadd_bu", + "llvm.loongarch.lasx.xvsadd.d" => "__builtin_lasx_xvsadd_d", + "llvm.loongarch.lasx.xvsadd.du" => "__builtin_lasx_xvsadd_du", + "llvm.loongarch.lasx.xvsadd.h" => "__builtin_lasx_xvsadd_h", + "llvm.loongarch.lasx.xvsadd.hu" => "__builtin_lasx_xvsadd_hu", + "llvm.loongarch.lasx.xvsadd.w" => "__builtin_lasx_xvsadd_w", + "llvm.loongarch.lasx.xvsadd.wu" => "__builtin_lasx_xvsadd_wu", + "llvm.loongarch.lasx.xvsat.b" => "__builtin_lasx_xvsat_b", + "llvm.loongarch.lasx.xvsat.bu" => "__builtin_lasx_xvsat_bu", + "llvm.loongarch.lasx.xvsat.d" => "__builtin_lasx_xvsat_d", + "llvm.loongarch.lasx.xvsat.du" => "__builtin_lasx_xvsat_du", + "llvm.loongarch.lasx.xvsat.h" => "__builtin_lasx_xvsat_h", + "llvm.loongarch.lasx.xvsat.hu" => "__builtin_lasx_xvsat_hu", + "llvm.loongarch.lasx.xvsat.w" => "__builtin_lasx_xvsat_w", + "llvm.loongarch.lasx.xvsat.wu" => "__builtin_lasx_xvsat_wu", + "llvm.loongarch.lasx.xvseq.b" => "__builtin_lasx_xvseq_b", + "llvm.loongarch.lasx.xvseq.d" => "__builtin_lasx_xvseq_d", + "llvm.loongarch.lasx.xvseq.h" => "__builtin_lasx_xvseq_h", + "llvm.loongarch.lasx.xvseq.w" => "__builtin_lasx_xvseq_w", + "llvm.loongarch.lasx.xvseqi.b" => "__builtin_lasx_xvseqi_b", + "llvm.loongarch.lasx.xvseqi.d" => "__builtin_lasx_xvseqi_d", + "llvm.loongarch.lasx.xvseqi.h" => "__builtin_lasx_xvseqi_h", + "llvm.loongarch.lasx.xvseqi.w" => "__builtin_lasx_xvseqi_w", + "llvm.loongarch.lasx.xvshuf.b" => "__builtin_lasx_xvshuf_b", + "llvm.loongarch.lasx.xvshuf.d" => "__builtin_lasx_xvshuf_d", + "llvm.loongarch.lasx.xvshuf.h" => "__builtin_lasx_xvshuf_h", + "llvm.loongarch.lasx.xvshuf.w" => "__builtin_lasx_xvshuf_w", + "llvm.loongarch.lasx.xvshuf4i.b" => "__builtin_lasx_xvshuf4i_b", + "llvm.loongarch.lasx.xvshuf4i.d" => "__builtin_lasx_xvshuf4i_d", + "llvm.loongarch.lasx.xvshuf4i.h" => "__builtin_lasx_xvshuf4i_h", + "llvm.loongarch.lasx.xvshuf4i.w" => "__builtin_lasx_xvshuf4i_w", + "llvm.loongarch.lasx.xvsigncov.b" => "__builtin_lasx_xvsigncov_b", + "llvm.loongarch.lasx.xvsigncov.d" => "__builtin_lasx_xvsigncov_d", + "llvm.loongarch.lasx.xvsigncov.h" => "__builtin_lasx_xvsigncov_h", + "llvm.loongarch.lasx.xvsigncov.w" => "__builtin_lasx_xvsigncov_w", + "llvm.loongarch.lasx.xvsle.b" => "__builtin_lasx_xvsle_b", + "llvm.loongarch.lasx.xvsle.bu" => "__builtin_lasx_xvsle_bu", + "llvm.loongarch.lasx.xvsle.d" => "__builtin_lasx_xvsle_d", + "llvm.loongarch.lasx.xvsle.du" => "__builtin_lasx_xvsle_du", + "llvm.loongarch.lasx.xvsle.h" => "__builtin_lasx_xvsle_h", + "llvm.loongarch.lasx.xvsle.hu" => "__builtin_lasx_xvsle_hu", + "llvm.loongarch.lasx.xvsle.w" => "__builtin_lasx_xvsle_w", + "llvm.loongarch.lasx.xvsle.wu" => "__builtin_lasx_xvsle_wu", + "llvm.loongarch.lasx.xvslei.b" => "__builtin_lasx_xvslei_b", + "llvm.loongarch.lasx.xvslei.bu" => "__builtin_lasx_xvslei_bu", + "llvm.loongarch.lasx.xvslei.d" => "__builtin_lasx_xvslei_d", + "llvm.loongarch.lasx.xvslei.du" => "__builtin_lasx_xvslei_du", + "llvm.loongarch.lasx.xvslei.h" => "__builtin_lasx_xvslei_h", + "llvm.loongarch.lasx.xvslei.hu" => "__builtin_lasx_xvslei_hu", + "llvm.loongarch.lasx.xvslei.w" => "__builtin_lasx_xvslei_w", + "llvm.loongarch.lasx.xvslei.wu" => "__builtin_lasx_xvslei_wu", + "llvm.loongarch.lasx.xvsll.b" => "__builtin_lasx_xvsll_b", + "llvm.loongarch.lasx.xvsll.d" => "__builtin_lasx_xvsll_d", + "llvm.loongarch.lasx.xvsll.h" => "__builtin_lasx_xvsll_h", + "llvm.loongarch.lasx.xvsll.w" => "__builtin_lasx_xvsll_w", + "llvm.loongarch.lasx.xvslli.b" => "__builtin_lasx_xvslli_b", + "llvm.loongarch.lasx.xvslli.d" => "__builtin_lasx_xvslli_d", + "llvm.loongarch.lasx.xvslli.h" => "__builtin_lasx_xvslli_h", + "llvm.loongarch.lasx.xvslli.w" => "__builtin_lasx_xvslli_w", + "llvm.loongarch.lasx.xvsllwil.d.w" => "__builtin_lasx_xvsllwil_d_w", + "llvm.loongarch.lasx.xvsllwil.du.wu" => "__builtin_lasx_xvsllwil_du_wu", + "llvm.loongarch.lasx.xvsllwil.h.b" => "__builtin_lasx_xvsllwil_h_b", + "llvm.loongarch.lasx.xvsllwil.hu.bu" => "__builtin_lasx_xvsllwil_hu_bu", + "llvm.loongarch.lasx.xvsllwil.w.h" => "__builtin_lasx_xvsllwil_w_h", + "llvm.loongarch.lasx.xvsllwil.wu.hu" => "__builtin_lasx_xvsllwil_wu_hu", + "llvm.loongarch.lasx.xvslt.b" => "__builtin_lasx_xvslt_b", + "llvm.loongarch.lasx.xvslt.bu" => "__builtin_lasx_xvslt_bu", + "llvm.loongarch.lasx.xvslt.d" => "__builtin_lasx_xvslt_d", + "llvm.loongarch.lasx.xvslt.du" => "__builtin_lasx_xvslt_du", + "llvm.loongarch.lasx.xvslt.h" => "__builtin_lasx_xvslt_h", + "llvm.loongarch.lasx.xvslt.hu" => "__builtin_lasx_xvslt_hu", + "llvm.loongarch.lasx.xvslt.w" => "__builtin_lasx_xvslt_w", + "llvm.loongarch.lasx.xvslt.wu" => "__builtin_lasx_xvslt_wu", + "llvm.loongarch.lasx.xvslti.b" => "__builtin_lasx_xvslti_b", + "llvm.loongarch.lasx.xvslti.bu" => "__builtin_lasx_xvslti_bu", + "llvm.loongarch.lasx.xvslti.d" => "__builtin_lasx_xvslti_d", + "llvm.loongarch.lasx.xvslti.du" => "__builtin_lasx_xvslti_du", + "llvm.loongarch.lasx.xvslti.h" => "__builtin_lasx_xvslti_h", + "llvm.loongarch.lasx.xvslti.hu" => "__builtin_lasx_xvslti_hu", + "llvm.loongarch.lasx.xvslti.w" => "__builtin_lasx_xvslti_w", + "llvm.loongarch.lasx.xvslti.wu" => "__builtin_lasx_xvslti_wu", + "llvm.loongarch.lasx.xvsra.b" => "__builtin_lasx_xvsra_b", + "llvm.loongarch.lasx.xvsra.d" => "__builtin_lasx_xvsra_d", + "llvm.loongarch.lasx.xvsra.h" => "__builtin_lasx_xvsra_h", + "llvm.loongarch.lasx.xvsra.w" => "__builtin_lasx_xvsra_w", + "llvm.loongarch.lasx.xvsrai.b" => "__builtin_lasx_xvsrai_b", + "llvm.loongarch.lasx.xvsrai.d" => "__builtin_lasx_xvsrai_d", + "llvm.loongarch.lasx.xvsrai.h" => "__builtin_lasx_xvsrai_h", + "llvm.loongarch.lasx.xvsrai.w" => "__builtin_lasx_xvsrai_w", + "llvm.loongarch.lasx.xvsran.b.h" => "__builtin_lasx_xvsran_b_h", + "llvm.loongarch.lasx.xvsran.h.w" => "__builtin_lasx_xvsran_h_w", + "llvm.loongarch.lasx.xvsran.w.d" => "__builtin_lasx_xvsran_w_d", + "llvm.loongarch.lasx.xvsrani.b.h" => "__builtin_lasx_xvsrani_b_h", + "llvm.loongarch.lasx.xvsrani.d.q" => "__builtin_lasx_xvsrani_d_q", + "llvm.loongarch.lasx.xvsrani.h.w" => "__builtin_lasx_xvsrani_h_w", + "llvm.loongarch.lasx.xvsrani.w.d" => "__builtin_lasx_xvsrani_w_d", + "llvm.loongarch.lasx.xvsrar.b" => "__builtin_lasx_xvsrar_b", + "llvm.loongarch.lasx.xvsrar.d" => "__builtin_lasx_xvsrar_d", + "llvm.loongarch.lasx.xvsrar.h" => "__builtin_lasx_xvsrar_h", + "llvm.loongarch.lasx.xvsrar.w" => "__builtin_lasx_xvsrar_w", + "llvm.loongarch.lasx.xvsrari.b" => "__builtin_lasx_xvsrari_b", + "llvm.loongarch.lasx.xvsrari.d" => "__builtin_lasx_xvsrari_d", + "llvm.loongarch.lasx.xvsrari.h" => "__builtin_lasx_xvsrari_h", + "llvm.loongarch.lasx.xvsrari.w" => "__builtin_lasx_xvsrari_w", + "llvm.loongarch.lasx.xvsrarn.b.h" => "__builtin_lasx_xvsrarn_b_h", + "llvm.loongarch.lasx.xvsrarn.h.w" => "__builtin_lasx_xvsrarn_h_w", + "llvm.loongarch.lasx.xvsrarn.w.d" => "__builtin_lasx_xvsrarn_w_d", + "llvm.loongarch.lasx.xvsrarni.b.h" => "__builtin_lasx_xvsrarni_b_h", + "llvm.loongarch.lasx.xvsrarni.d.q" => "__builtin_lasx_xvsrarni_d_q", + "llvm.loongarch.lasx.xvsrarni.h.w" => "__builtin_lasx_xvsrarni_h_w", + "llvm.loongarch.lasx.xvsrarni.w.d" => "__builtin_lasx_xvsrarni_w_d", + "llvm.loongarch.lasx.xvsrl.b" => "__builtin_lasx_xvsrl_b", + "llvm.loongarch.lasx.xvsrl.d" => "__builtin_lasx_xvsrl_d", + "llvm.loongarch.lasx.xvsrl.h" => "__builtin_lasx_xvsrl_h", + "llvm.loongarch.lasx.xvsrl.w" => "__builtin_lasx_xvsrl_w", + "llvm.loongarch.lasx.xvsrli.b" => "__builtin_lasx_xvsrli_b", + "llvm.loongarch.lasx.xvsrli.d" => "__builtin_lasx_xvsrli_d", + "llvm.loongarch.lasx.xvsrli.h" => "__builtin_lasx_xvsrli_h", + "llvm.loongarch.lasx.xvsrli.w" => "__builtin_lasx_xvsrli_w", + "llvm.loongarch.lasx.xvsrln.b.h" => "__builtin_lasx_xvsrln_b_h", + "llvm.loongarch.lasx.xvsrln.h.w" => "__builtin_lasx_xvsrln_h_w", + "llvm.loongarch.lasx.xvsrln.w.d" => "__builtin_lasx_xvsrln_w_d", + "llvm.loongarch.lasx.xvsrlni.b.h" => "__builtin_lasx_xvsrlni_b_h", + "llvm.loongarch.lasx.xvsrlni.d.q" => "__builtin_lasx_xvsrlni_d_q", + "llvm.loongarch.lasx.xvsrlni.h.w" => "__builtin_lasx_xvsrlni_h_w", + "llvm.loongarch.lasx.xvsrlni.w.d" => "__builtin_lasx_xvsrlni_w_d", + "llvm.loongarch.lasx.xvsrlr.b" => "__builtin_lasx_xvsrlr_b", + "llvm.loongarch.lasx.xvsrlr.d" => "__builtin_lasx_xvsrlr_d", + "llvm.loongarch.lasx.xvsrlr.h" => "__builtin_lasx_xvsrlr_h", + "llvm.loongarch.lasx.xvsrlr.w" => "__builtin_lasx_xvsrlr_w", + "llvm.loongarch.lasx.xvsrlri.b" => "__builtin_lasx_xvsrlri_b", + "llvm.loongarch.lasx.xvsrlri.d" => "__builtin_lasx_xvsrlri_d", + "llvm.loongarch.lasx.xvsrlri.h" => "__builtin_lasx_xvsrlri_h", + "llvm.loongarch.lasx.xvsrlri.w" => "__builtin_lasx_xvsrlri_w", + "llvm.loongarch.lasx.xvsrlrn.b.h" => "__builtin_lasx_xvsrlrn_b_h", + "llvm.loongarch.lasx.xvsrlrn.h.w" => "__builtin_lasx_xvsrlrn_h_w", + "llvm.loongarch.lasx.xvsrlrn.w.d" => "__builtin_lasx_xvsrlrn_w_d", + "llvm.loongarch.lasx.xvsrlrni.b.h" => "__builtin_lasx_xvsrlrni_b_h", + "llvm.loongarch.lasx.xvsrlrni.d.q" => "__builtin_lasx_xvsrlrni_d_q", + "llvm.loongarch.lasx.xvsrlrni.h.w" => "__builtin_lasx_xvsrlrni_h_w", + "llvm.loongarch.lasx.xvsrlrni.w.d" => "__builtin_lasx_xvsrlrni_w_d", + "llvm.loongarch.lasx.xvssran.b.h" => "__builtin_lasx_xvssran_b_h", + "llvm.loongarch.lasx.xvssran.bu.h" => "__builtin_lasx_xvssran_bu_h", + "llvm.loongarch.lasx.xvssran.h.w" => "__builtin_lasx_xvssran_h_w", + "llvm.loongarch.lasx.xvssran.hu.w" => "__builtin_lasx_xvssran_hu_w", + "llvm.loongarch.lasx.xvssran.w.d" => "__builtin_lasx_xvssran_w_d", + "llvm.loongarch.lasx.xvssran.wu.d" => "__builtin_lasx_xvssran_wu_d", + "llvm.loongarch.lasx.xvssrani.b.h" => "__builtin_lasx_xvssrani_b_h", + "llvm.loongarch.lasx.xvssrani.bu.h" => "__builtin_lasx_xvssrani_bu_h", + "llvm.loongarch.lasx.xvssrani.d.q" => "__builtin_lasx_xvssrani_d_q", + "llvm.loongarch.lasx.xvssrani.du.q" => "__builtin_lasx_xvssrani_du_q", + "llvm.loongarch.lasx.xvssrani.h.w" => "__builtin_lasx_xvssrani_h_w", + "llvm.loongarch.lasx.xvssrani.hu.w" => "__builtin_lasx_xvssrani_hu_w", + "llvm.loongarch.lasx.xvssrani.w.d" => "__builtin_lasx_xvssrani_w_d", + "llvm.loongarch.lasx.xvssrani.wu.d" => "__builtin_lasx_xvssrani_wu_d", + "llvm.loongarch.lasx.xvssrarn.b.h" => "__builtin_lasx_xvssrarn_b_h", + "llvm.loongarch.lasx.xvssrarn.bu.h" => "__builtin_lasx_xvssrarn_bu_h", + "llvm.loongarch.lasx.xvssrarn.h.w" => "__builtin_lasx_xvssrarn_h_w", + "llvm.loongarch.lasx.xvssrarn.hu.w" => "__builtin_lasx_xvssrarn_hu_w", + "llvm.loongarch.lasx.xvssrarn.w.d" => "__builtin_lasx_xvssrarn_w_d", + "llvm.loongarch.lasx.xvssrarn.wu.d" => "__builtin_lasx_xvssrarn_wu_d", + "llvm.loongarch.lasx.xvssrarni.b.h" => "__builtin_lasx_xvssrarni_b_h", + "llvm.loongarch.lasx.xvssrarni.bu.h" => "__builtin_lasx_xvssrarni_bu_h", + "llvm.loongarch.lasx.xvssrarni.d.q" => "__builtin_lasx_xvssrarni_d_q", + "llvm.loongarch.lasx.xvssrarni.du.q" => "__builtin_lasx_xvssrarni_du_q", + "llvm.loongarch.lasx.xvssrarni.h.w" => "__builtin_lasx_xvssrarni_h_w", + "llvm.loongarch.lasx.xvssrarni.hu.w" => "__builtin_lasx_xvssrarni_hu_w", + "llvm.loongarch.lasx.xvssrarni.w.d" => "__builtin_lasx_xvssrarni_w_d", + "llvm.loongarch.lasx.xvssrarni.wu.d" => "__builtin_lasx_xvssrarni_wu_d", + "llvm.loongarch.lasx.xvssrln.b.h" => "__builtin_lasx_xvssrln_b_h", + "llvm.loongarch.lasx.xvssrln.bu.h" => "__builtin_lasx_xvssrln_bu_h", + "llvm.loongarch.lasx.xvssrln.h.w" => "__builtin_lasx_xvssrln_h_w", + "llvm.loongarch.lasx.xvssrln.hu.w" => "__builtin_lasx_xvssrln_hu_w", + "llvm.loongarch.lasx.xvssrln.w.d" => "__builtin_lasx_xvssrln_w_d", + "llvm.loongarch.lasx.xvssrln.wu.d" => "__builtin_lasx_xvssrln_wu_d", + "llvm.loongarch.lasx.xvssrlni.b.h" => "__builtin_lasx_xvssrlni_b_h", + "llvm.loongarch.lasx.xvssrlni.bu.h" => "__builtin_lasx_xvssrlni_bu_h", + "llvm.loongarch.lasx.xvssrlni.d.q" => "__builtin_lasx_xvssrlni_d_q", + "llvm.loongarch.lasx.xvssrlni.du.q" => "__builtin_lasx_xvssrlni_du_q", + "llvm.loongarch.lasx.xvssrlni.h.w" => "__builtin_lasx_xvssrlni_h_w", + "llvm.loongarch.lasx.xvssrlni.hu.w" => "__builtin_lasx_xvssrlni_hu_w", + "llvm.loongarch.lasx.xvssrlni.w.d" => "__builtin_lasx_xvssrlni_w_d", + "llvm.loongarch.lasx.xvssrlni.wu.d" => "__builtin_lasx_xvssrlni_wu_d", + "llvm.loongarch.lasx.xvssrlrn.b.h" => "__builtin_lasx_xvssrlrn_b_h", + "llvm.loongarch.lasx.xvssrlrn.bu.h" => "__builtin_lasx_xvssrlrn_bu_h", + "llvm.loongarch.lasx.xvssrlrn.h.w" => "__builtin_lasx_xvssrlrn_h_w", + "llvm.loongarch.lasx.xvssrlrn.hu.w" => "__builtin_lasx_xvssrlrn_hu_w", + "llvm.loongarch.lasx.xvssrlrn.w.d" => "__builtin_lasx_xvssrlrn_w_d", + "llvm.loongarch.lasx.xvssrlrn.wu.d" => "__builtin_lasx_xvssrlrn_wu_d", + "llvm.loongarch.lasx.xvssrlrni.b.h" => "__builtin_lasx_xvssrlrni_b_h", + "llvm.loongarch.lasx.xvssrlrni.bu.h" => "__builtin_lasx_xvssrlrni_bu_h", + "llvm.loongarch.lasx.xvssrlrni.d.q" => "__builtin_lasx_xvssrlrni_d_q", + "llvm.loongarch.lasx.xvssrlrni.du.q" => "__builtin_lasx_xvssrlrni_du_q", + "llvm.loongarch.lasx.xvssrlrni.h.w" => "__builtin_lasx_xvssrlrni_h_w", + "llvm.loongarch.lasx.xvssrlrni.hu.w" => "__builtin_lasx_xvssrlrni_hu_w", + "llvm.loongarch.lasx.xvssrlrni.w.d" => "__builtin_lasx_xvssrlrni_w_d", + "llvm.loongarch.lasx.xvssrlrni.wu.d" => "__builtin_lasx_xvssrlrni_wu_d", + "llvm.loongarch.lasx.xvssub.b" => "__builtin_lasx_xvssub_b", + "llvm.loongarch.lasx.xvssub.bu" => "__builtin_lasx_xvssub_bu", + "llvm.loongarch.lasx.xvssub.d" => "__builtin_lasx_xvssub_d", + "llvm.loongarch.lasx.xvssub.du" => "__builtin_lasx_xvssub_du", + "llvm.loongarch.lasx.xvssub.h" => "__builtin_lasx_xvssub_h", + "llvm.loongarch.lasx.xvssub.hu" => "__builtin_lasx_xvssub_hu", + "llvm.loongarch.lasx.xvssub.w" => "__builtin_lasx_xvssub_w", + "llvm.loongarch.lasx.xvssub.wu" => "__builtin_lasx_xvssub_wu", + "llvm.loongarch.lasx.xvst" => "__builtin_lasx_xvst", + "llvm.loongarch.lasx.xvstelm.b" => "__builtin_lasx_xvstelm_b", + "llvm.loongarch.lasx.xvstelm.d" => "__builtin_lasx_xvstelm_d", + "llvm.loongarch.lasx.xvstelm.h" => "__builtin_lasx_xvstelm_h", + "llvm.loongarch.lasx.xvstelm.w" => "__builtin_lasx_xvstelm_w", + "llvm.loongarch.lasx.xvstx" => "__builtin_lasx_xvstx", + "llvm.loongarch.lasx.xvsub.b" => "__builtin_lasx_xvsub_b", + "llvm.loongarch.lasx.xvsub.d" => "__builtin_lasx_xvsub_d", + "llvm.loongarch.lasx.xvsub.h" => "__builtin_lasx_xvsub_h", + "llvm.loongarch.lasx.xvsub.q" => "__builtin_lasx_xvsub_q", + "llvm.loongarch.lasx.xvsub.w" => "__builtin_lasx_xvsub_w", + "llvm.loongarch.lasx.xvsubi.bu" => "__builtin_lasx_xvsubi_bu", + "llvm.loongarch.lasx.xvsubi.du" => "__builtin_lasx_xvsubi_du", + "llvm.loongarch.lasx.xvsubi.hu" => "__builtin_lasx_xvsubi_hu", + "llvm.loongarch.lasx.xvsubi.wu" => "__builtin_lasx_xvsubi_wu", + "llvm.loongarch.lasx.xvsubwev.d.w" => "__builtin_lasx_xvsubwev_d_w", + "llvm.loongarch.lasx.xvsubwev.d.wu" => "__builtin_lasx_xvsubwev_d_wu", + "llvm.loongarch.lasx.xvsubwev.h.b" => "__builtin_lasx_xvsubwev_h_b", + "llvm.loongarch.lasx.xvsubwev.h.bu" => "__builtin_lasx_xvsubwev_h_bu", + "llvm.loongarch.lasx.xvsubwev.q.d" => "__builtin_lasx_xvsubwev_q_d", + "llvm.loongarch.lasx.xvsubwev.q.du" => "__builtin_lasx_xvsubwev_q_du", + "llvm.loongarch.lasx.xvsubwev.w.h" => "__builtin_lasx_xvsubwev_w_h", + "llvm.loongarch.lasx.xvsubwev.w.hu" => "__builtin_lasx_xvsubwev_w_hu", + "llvm.loongarch.lasx.xvsubwod.d.w" => "__builtin_lasx_xvsubwod_d_w", + "llvm.loongarch.lasx.xvsubwod.d.wu" => "__builtin_lasx_xvsubwod_d_wu", + "llvm.loongarch.lasx.xvsubwod.h.b" => "__builtin_lasx_xvsubwod_h_b", + "llvm.loongarch.lasx.xvsubwod.h.bu" => "__builtin_lasx_xvsubwod_h_bu", + "llvm.loongarch.lasx.xvsubwod.q.d" => "__builtin_lasx_xvsubwod_q_d", + "llvm.loongarch.lasx.xvsubwod.q.du" => "__builtin_lasx_xvsubwod_q_du", + "llvm.loongarch.lasx.xvsubwod.w.h" => "__builtin_lasx_xvsubwod_w_h", + "llvm.loongarch.lasx.xvsubwod.w.hu" => "__builtin_lasx_xvsubwod_w_hu", + "llvm.loongarch.lasx.xvxor.v" => "__builtin_lasx_xvxor_v", + "llvm.loongarch.lasx.xvxori.b" => "__builtin_lasx_xvxori_b", "llvm.loongarch.lddir.d" => "__builtin_loongarch_lddir_d", "llvm.loongarch.ldpte.d" => "__builtin_loongarch_ldpte_d", + "llvm.loongarch.lsx.bnz.b" => "__builtin_lsx_bnz_b", + "llvm.loongarch.lsx.bnz.d" => "__builtin_lsx_bnz_d", + "llvm.loongarch.lsx.bnz.h" => "__builtin_lsx_bnz_h", + "llvm.loongarch.lsx.bnz.v" => "__builtin_lsx_bnz_v", + "llvm.loongarch.lsx.bnz.w" => "__builtin_lsx_bnz_w", + "llvm.loongarch.lsx.bz.b" => "__builtin_lsx_bz_b", + "llvm.loongarch.lsx.bz.d" => "__builtin_lsx_bz_d", + "llvm.loongarch.lsx.bz.h" => "__builtin_lsx_bz_h", + "llvm.loongarch.lsx.bz.v" => "__builtin_lsx_bz_v", + "llvm.loongarch.lsx.bz.w" => "__builtin_lsx_bz_w", + "llvm.loongarch.lsx.vabsd.b" => "__builtin_lsx_vabsd_b", + "llvm.loongarch.lsx.vabsd.bu" => "__builtin_lsx_vabsd_bu", + "llvm.loongarch.lsx.vabsd.d" => "__builtin_lsx_vabsd_d", + "llvm.loongarch.lsx.vabsd.du" => "__builtin_lsx_vabsd_du", + "llvm.loongarch.lsx.vabsd.h" => "__builtin_lsx_vabsd_h", + "llvm.loongarch.lsx.vabsd.hu" => "__builtin_lsx_vabsd_hu", + "llvm.loongarch.lsx.vabsd.w" => "__builtin_lsx_vabsd_w", + "llvm.loongarch.lsx.vabsd.wu" => "__builtin_lsx_vabsd_wu", + "llvm.loongarch.lsx.vadd.b" => "__builtin_lsx_vadd_b", + "llvm.loongarch.lsx.vadd.d" => "__builtin_lsx_vadd_d", + "llvm.loongarch.lsx.vadd.h" => "__builtin_lsx_vadd_h", + "llvm.loongarch.lsx.vadd.q" => "__builtin_lsx_vadd_q", + "llvm.loongarch.lsx.vadd.w" => "__builtin_lsx_vadd_w", + "llvm.loongarch.lsx.vadda.b" => "__builtin_lsx_vadda_b", + "llvm.loongarch.lsx.vadda.d" => "__builtin_lsx_vadda_d", + "llvm.loongarch.lsx.vadda.h" => "__builtin_lsx_vadda_h", + "llvm.loongarch.lsx.vadda.w" => "__builtin_lsx_vadda_w", + "llvm.loongarch.lsx.vaddi.bu" => "__builtin_lsx_vaddi_bu", + "llvm.loongarch.lsx.vaddi.du" => "__builtin_lsx_vaddi_du", + "llvm.loongarch.lsx.vaddi.hu" => "__builtin_lsx_vaddi_hu", + "llvm.loongarch.lsx.vaddi.wu" => "__builtin_lsx_vaddi_wu", + "llvm.loongarch.lsx.vaddwev.d.w" => "__builtin_lsx_vaddwev_d_w", + "llvm.loongarch.lsx.vaddwev.d.wu" => "__builtin_lsx_vaddwev_d_wu", + "llvm.loongarch.lsx.vaddwev.d.wu.w" => "__builtin_lsx_vaddwev_d_wu_w", + "llvm.loongarch.lsx.vaddwev.h.b" => "__builtin_lsx_vaddwev_h_b", + "llvm.loongarch.lsx.vaddwev.h.bu" => "__builtin_lsx_vaddwev_h_bu", + "llvm.loongarch.lsx.vaddwev.h.bu.b" => "__builtin_lsx_vaddwev_h_bu_b", + "llvm.loongarch.lsx.vaddwev.q.d" => "__builtin_lsx_vaddwev_q_d", + "llvm.loongarch.lsx.vaddwev.q.du" => "__builtin_lsx_vaddwev_q_du", + "llvm.loongarch.lsx.vaddwev.q.du.d" => "__builtin_lsx_vaddwev_q_du_d", + "llvm.loongarch.lsx.vaddwev.w.h" => "__builtin_lsx_vaddwev_w_h", + "llvm.loongarch.lsx.vaddwev.w.hu" => "__builtin_lsx_vaddwev_w_hu", + "llvm.loongarch.lsx.vaddwev.w.hu.h" => "__builtin_lsx_vaddwev_w_hu_h", + "llvm.loongarch.lsx.vaddwod.d.w" => "__builtin_lsx_vaddwod_d_w", + "llvm.loongarch.lsx.vaddwod.d.wu" => "__builtin_lsx_vaddwod_d_wu", + "llvm.loongarch.lsx.vaddwod.d.wu.w" => "__builtin_lsx_vaddwod_d_wu_w", + "llvm.loongarch.lsx.vaddwod.h.b" => "__builtin_lsx_vaddwod_h_b", + "llvm.loongarch.lsx.vaddwod.h.bu" => "__builtin_lsx_vaddwod_h_bu", + "llvm.loongarch.lsx.vaddwod.h.bu.b" => "__builtin_lsx_vaddwod_h_bu_b", + "llvm.loongarch.lsx.vaddwod.q.d" => "__builtin_lsx_vaddwod_q_d", + "llvm.loongarch.lsx.vaddwod.q.du" => "__builtin_lsx_vaddwod_q_du", + "llvm.loongarch.lsx.vaddwod.q.du.d" => "__builtin_lsx_vaddwod_q_du_d", + "llvm.loongarch.lsx.vaddwod.w.h" => "__builtin_lsx_vaddwod_w_h", + "llvm.loongarch.lsx.vaddwod.w.hu" => "__builtin_lsx_vaddwod_w_hu", + "llvm.loongarch.lsx.vaddwod.w.hu.h" => "__builtin_lsx_vaddwod_w_hu_h", + "llvm.loongarch.lsx.vand.v" => "__builtin_lsx_vand_v", + "llvm.loongarch.lsx.vandi.b" => "__builtin_lsx_vandi_b", + "llvm.loongarch.lsx.vandn.v" => "__builtin_lsx_vandn_v", + "llvm.loongarch.lsx.vavg.b" => "__builtin_lsx_vavg_b", + "llvm.loongarch.lsx.vavg.bu" => "__builtin_lsx_vavg_bu", + "llvm.loongarch.lsx.vavg.d" => "__builtin_lsx_vavg_d", + "llvm.loongarch.lsx.vavg.du" => "__builtin_lsx_vavg_du", + "llvm.loongarch.lsx.vavg.h" => "__builtin_lsx_vavg_h", + "llvm.loongarch.lsx.vavg.hu" => "__builtin_lsx_vavg_hu", + "llvm.loongarch.lsx.vavg.w" => "__builtin_lsx_vavg_w", + "llvm.loongarch.lsx.vavg.wu" => "__builtin_lsx_vavg_wu", + "llvm.loongarch.lsx.vavgr.b" => "__builtin_lsx_vavgr_b", + "llvm.loongarch.lsx.vavgr.bu" => "__builtin_lsx_vavgr_bu", + "llvm.loongarch.lsx.vavgr.d" => "__builtin_lsx_vavgr_d", + "llvm.loongarch.lsx.vavgr.du" => "__builtin_lsx_vavgr_du", + "llvm.loongarch.lsx.vavgr.h" => "__builtin_lsx_vavgr_h", + "llvm.loongarch.lsx.vavgr.hu" => "__builtin_lsx_vavgr_hu", + "llvm.loongarch.lsx.vavgr.w" => "__builtin_lsx_vavgr_w", + "llvm.loongarch.lsx.vavgr.wu" => "__builtin_lsx_vavgr_wu", + "llvm.loongarch.lsx.vbitclr.b" => "__builtin_lsx_vbitclr_b", + "llvm.loongarch.lsx.vbitclr.d" => "__builtin_lsx_vbitclr_d", + "llvm.loongarch.lsx.vbitclr.h" => "__builtin_lsx_vbitclr_h", + "llvm.loongarch.lsx.vbitclr.w" => "__builtin_lsx_vbitclr_w", + "llvm.loongarch.lsx.vbitclri.b" => "__builtin_lsx_vbitclri_b", + "llvm.loongarch.lsx.vbitclri.d" => "__builtin_lsx_vbitclri_d", + "llvm.loongarch.lsx.vbitclri.h" => "__builtin_lsx_vbitclri_h", + "llvm.loongarch.lsx.vbitclri.w" => "__builtin_lsx_vbitclri_w", + "llvm.loongarch.lsx.vbitrev.b" => "__builtin_lsx_vbitrev_b", + "llvm.loongarch.lsx.vbitrev.d" => "__builtin_lsx_vbitrev_d", + "llvm.loongarch.lsx.vbitrev.h" => "__builtin_lsx_vbitrev_h", + "llvm.loongarch.lsx.vbitrev.w" => "__builtin_lsx_vbitrev_w", + "llvm.loongarch.lsx.vbitrevi.b" => "__builtin_lsx_vbitrevi_b", + "llvm.loongarch.lsx.vbitrevi.d" => "__builtin_lsx_vbitrevi_d", + "llvm.loongarch.lsx.vbitrevi.h" => "__builtin_lsx_vbitrevi_h", + "llvm.loongarch.lsx.vbitrevi.w" => "__builtin_lsx_vbitrevi_w", + "llvm.loongarch.lsx.vbitsel.v" => "__builtin_lsx_vbitsel_v", + "llvm.loongarch.lsx.vbitseli.b" => "__builtin_lsx_vbitseli_b", + "llvm.loongarch.lsx.vbitset.b" => "__builtin_lsx_vbitset_b", + "llvm.loongarch.lsx.vbitset.d" => "__builtin_lsx_vbitset_d", + "llvm.loongarch.lsx.vbitset.h" => "__builtin_lsx_vbitset_h", + "llvm.loongarch.lsx.vbitset.w" => "__builtin_lsx_vbitset_w", + "llvm.loongarch.lsx.vbitseti.b" => "__builtin_lsx_vbitseti_b", + "llvm.loongarch.lsx.vbitseti.d" => "__builtin_lsx_vbitseti_d", + "llvm.loongarch.lsx.vbitseti.h" => "__builtin_lsx_vbitseti_h", + "llvm.loongarch.lsx.vbitseti.w" => "__builtin_lsx_vbitseti_w", + "llvm.loongarch.lsx.vbsll.v" => "__builtin_lsx_vbsll_v", + "llvm.loongarch.lsx.vbsrl.v" => "__builtin_lsx_vbsrl_v", + "llvm.loongarch.lsx.vclo.b" => "__builtin_lsx_vclo_b", + "llvm.loongarch.lsx.vclo.d" => "__builtin_lsx_vclo_d", + "llvm.loongarch.lsx.vclo.h" => "__builtin_lsx_vclo_h", + "llvm.loongarch.lsx.vclo.w" => "__builtin_lsx_vclo_w", + "llvm.loongarch.lsx.vclz.b" => "__builtin_lsx_vclz_b", + "llvm.loongarch.lsx.vclz.d" => "__builtin_lsx_vclz_d", + "llvm.loongarch.lsx.vclz.h" => "__builtin_lsx_vclz_h", + "llvm.loongarch.lsx.vclz.w" => "__builtin_lsx_vclz_w", + "llvm.loongarch.lsx.vdiv.b" => "__builtin_lsx_vdiv_b", + "llvm.loongarch.lsx.vdiv.bu" => "__builtin_lsx_vdiv_bu", + "llvm.loongarch.lsx.vdiv.d" => "__builtin_lsx_vdiv_d", + "llvm.loongarch.lsx.vdiv.du" => "__builtin_lsx_vdiv_du", + "llvm.loongarch.lsx.vdiv.h" => "__builtin_lsx_vdiv_h", + "llvm.loongarch.lsx.vdiv.hu" => "__builtin_lsx_vdiv_hu", + "llvm.loongarch.lsx.vdiv.w" => "__builtin_lsx_vdiv_w", + "llvm.loongarch.lsx.vdiv.wu" => "__builtin_lsx_vdiv_wu", + "llvm.loongarch.lsx.vexth.d.w" => "__builtin_lsx_vexth_d_w", + "llvm.loongarch.lsx.vexth.du.wu" => "__builtin_lsx_vexth_du_wu", + "llvm.loongarch.lsx.vexth.h.b" => "__builtin_lsx_vexth_h_b", + "llvm.loongarch.lsx.vexth.hu.bu" => "__builtin_lsx_vexth_hu_bu", + "llvm.loongarch.lsx.vexth.q.d" => "__builtin_lsx_vexth_q_d", + "llvm.loongarch.lsx.vexth.qu.du" => "__builtin_lsx_vexth_qu_du", + "llvm.loongarch.lsx.vexth.w.h" => "__builtin_lsx_vexth_w_h", + "llvm.loongarch.lsx.vexth.wu.hu" => "__builtin_lsx_vexth_wu_hu", + "llvm.loongarch.lsx.vextl.q.d" => "__builtin_lsx_vextl_q_d", + "llvm.loongarch.lsx.vextl.qu.du" => "__builtin_lsx_vextl_qu_du", + "llvm.loongarch.lsx.vextrins.b" => "__builtin_lsx_vextrins_b", + "llvm.loongarch.lsx.vextrins.d" => "__builtin_lsx_vextrins_d", + "llvm.loongarch.lsx.vextrins.h" => "__builtin_lsx_vextrins_h", + "llvm.loongarch.lsx.vextrins.w" => "__builtin_lsx_vextrins_w", + "llvm.loongarch.lsx.vfadd.d" => "__builtin_lsx_vfadd_d", + "llvm.loongarch.lsx.vfadd.s" => "__builtin_lsx_vfadd_s", + "llvm.loongarch.lsx.vfclass.d" => "__builtin_lsx_vfclass_d", + "llvm.loongarch.lsx.vfclass.s" => "__builtin_lsx_vfclass_s", + "llvm.loongarch.lsx.vfcmp.caf.d" => "__builtin_lsx_vfcmp_caf_d", + "llvm.loongarch.lsx.vfcmp.caf.s" => "__builtin_lsx_vfcmp_caf_s", + "llvm.loongarch.lsx.vfcmp.ceq.d" => "__builtin_lsx_vfcmp_ceq_d", + "llvm.loongarch.lsx.vfcmp.ceq.s" => "__builtin_lsx_vfcmp_ceq_s", + "llvm.loongarch.lsx.vfcmp.cle.d" => "__builtin_lsx_vfcmp_cle_d", + "llvm.loongarch.lsx.vfcmp.cle.s" => "__builtin_lsx_vfcmp_cle_s", + "llvm.loongarch.lsx.vfcmp.clt.d" => "__builtin_lsx_vfcmp_clt_d", + "llvm.loongarch.lsx.vfcmp.clt.s" => "__builtin_lsx_vfcmp_clt_s", + "llvm.loongarch.lsx.vfcmp.cne.d" => "__builtin_lsx_vfcmp_cne_d", + "llvm.loongarch.lsx.vfcmp.cne.s" => "__builtin_lsx_vfcmp_cne_s", + "llvm.loongarch.lsx.vfcmp.cor.d" => "__builtin_lsx_vfcmp_cor_d", + "llvm.loongarch.lsx.vfcmp.cor.s" => "__builtin_lsx_vfcmp_cor_s", + "llvm.loongarch.lsx.vfcmp.cueq.d" => "__builtin_lsx_vfcmp_cueq_d", + "llvm.loongarch.lsx.vfcmp.cueq.s" => "__builtin_lsx_vfcmp_cueq_s", + "llvm.loongarch.lsx.vfcmp.cule.d" => "__builtin_lsx_vfcmp_cule_d", + "llvm.loongarch.lsx.vfcmp.cule.s" => "__builtin_lsx_vfcmp_cule_s", + "llvm.loongarch.lsx.vfcmp.cult.d" => "__builtin_lsx_vfcmp_cult_d", + "llvm.loongarch.lsx.vfcmp.cult.s" => "__builtin_lsx_vfcmp_cult_s", + "llvm.loongarch.lsx.vfcmp.cun.d" => "__builtin_lsx_vfcmp_cun_d", + "llvm.loongarch.lsx.vfcmp.cun.s" => "__builtin_lsx_vfcmp_cun_s", + "llvm.loongarch.lsx.vfcmp.cune.d" => "__builtin_lsx_vfcmp_cune_d", + "llvm.loongarch.lsx.vfcmp.cune.s" => "__builtin_lsx_vfcmp_cune_s", + "llvm.loongarch.lsx.vfcmp.saf.d" => "__builtin_lsx_vfcmp_saf_d", + "llvm.loongarch.lsx.vfcmp.saf.s" => "__builtin_lsx_vfcmp_saf_s", + "llvm.loongarch.lsx.vfcmp.seq.d" => "__builtin_lsx_vfcmp_seq_d", + "llvm.loongarch.lsx.vfcmp.seq.s" => "__builtin_lsx_vfcmp_seq_s", + "llvm.loongarch.lsx.vfcmp.sle.d" => "__builtin_lsx_vfcmp_sle_d", + "llvm.loongarch.lsx.vfcmp.sle.s" => "__builtin_lsx_vfcmp_sle_s", + "llvm.loongarch.lsx.vfcmp.slt.d" => "__builtin_lsx_vfcmp_slt_d", + "llvm.loongarch.lsx.vfcmp.slt.s" => "__builtin_lsx_vfcmp_slt_s", + "llvm.loongarch.lsx.vfcmp.sne.d" => "__builtin_lsx_vfcmp_sne_d", + "llvm.loongarch.lsx.vfcmp.sne.s" => "__builtin_lsx_vfcmp_sne_s", + "llvm.loongarch.lsx.vfcmp.sor.d" => "__builtin_lsx_vfcmp_sor_d", + "llvm.loongarch.lsx.vfcmp.sor.s" => "__builtin_lsx_vfcmp_sor_s", + "llvm.loongarch.lsx.vfcmp.sueq.d" => "__builtin_lsx_vfcmp_sueq_d", + "llvm.loongarch.lsx.vfcmp.sueq.s" => "__builtin_lsx_vfcmp_sueq_s", + "llvm.loongarch.lsx.vfcmp.sule.d" => "__builtin_lsx_vfcmp_sule_d", + "llvm.loongarch.lsx.vfcmp.sule.s" => "__builtin_lsx_vfcmp_sule_s", + "llvm.loongarch.lsx.vfcmp.sult.d" => "__builtin_lsx_vfcmp_sult_d", + "llvm.loongarch.lsx.vfcmp.sult.s" => "__builtin_lsx_vfcmp_sult_s", + "llvm.loongarch.lsx.vfcmp.sun.d" => "__builtin_lsx_vfcmp_sun_d", + "llvm.loongarch.lsx.vfcmp.sun.s" => "__builtin_lsx_vfcmp_sun_s", + "llvm.loongarch.lsx.vfcmp.sune.d" => "__builtin_lsx_vfcmp_sune_d", + "llvm.loongarch.lsx.vfcmp.sune.s" => "__builtin_lsx_vfcmp_sune_s", + "llvm.loongarch.lsx.vfcvt.h.s" => "__builtin_lsx_vfcvt_h_s", + "llvm.loongarch.lsx.vfcvt.s.d" => "__builtin_lsx_vfcvt_s_d", + "llvm.loongarch.lsx.vfcvth.d.s" => "__builtin_lsx_vfcvth_d_s", + "llvm.loongarch.lsx.vfcvth.s.h" => "__builtin_lsx_vfcvth_s_h", + "llvm.loongarch.lsx.vfcvtl.d.s" => "__builtin_lsx_vfcvtl_d_s", + "llvm.loongarch.lsx.vfcvtl.s.h" => "__builtin_lsx_vfcvtl_s_h", + "llvm.loongarch.lsx.vfdiv.d" => "__builtin_lsx_vfdiv_d", + "llvm.loongarch.lsx.vfdiv.s" => "__builtin_lsx_vfdiv_s", + "llvm.loongarch.lsx.vffint.d.l" => "__builtin_lsx_vffint_d_l", + "llvm.loongarch.lsx.vffint.d.lu" => "__builtin_lsx_vffint_d_lu", + "llvm.loongarch.lsx.vffint.s.l" => "__builtin_lsx_vffint_s_l", + "llvm.loongarch.lsx.vffint.s.w" => "__builtin_lsx_vffint_s_w", + "llvm.loongarch.lsx.vffint.s.wu" => "__builtin_lsx_vffint_s_wu", + "llvm.loongarch.lsx.vffinth.d.w" => "__builtin_lsx_vffinth_d_w", + "llvm.loongarch.lsx.vffintl.d.w" => "__builtin_lsx_vffintl_d_w", + "llvm.loongarch.lsx.vflogb.d" => "__builtin_lsx_vflogb_d", + "llvm.loongarch.lsx.vflogb.s" => "__builtin_lsx_vflogb_s", + "llvm.loongarch.lsx.vfmadd.d" => "__builtin_lsx_vfmadd_d", + "llvm.loongarch.lsx.vfmadd.s" => "__builtin_lsx_vfmadd_s", + "llvm.loongarch.lsx.vfmax.d" => "__builtin_lsx_vfmax_d", + "llvm.loongarch.lsx.vfmax.s" => "__builtin_lsx_vfmax_s", + "llvm.loongarch.lsx.vfmaxa.d" => "__builtin_lsx_vfmaxa_d", + "llvm.loongarch.lsx.vfmaxa.s" => "__builtin_lsx_vfmaxa_s", + "llvm.loongarch.lsx.vfmin.d" => "__builtin_lsx_vfmin_d", + "llvm.loongarch.lsx.vfmin.s" => "__builtin_lsx_vfmin_s", + "llvm.loongarch.lsx.vfmina.d" => "__builtin_lsx_vfmina_d", + "llvm.loongarch.lsx.vfmina.s" => "__builtin_lsx_vfmina_s", + "llvm.loongarch.lsx.vfmsub.d" => "__builtin_lsx_vfmsub_d", + "llvm.loongarch.lsx.vfmsub.s" => "__builtin_lsx_vfmsub_s", + "llvm.loongarch.lsx.vfmul.d" => "__builtin_lsx_vfmul_d", + "llvm.loongarch.lsx.vfmul.s" => "__builtin_lsx_vfmul_s", + "llvm.loongarch.lsx.vfnmadd.d" => "__builtin_lsx_vfnmadd_d", + "llvm.loongarch.lsx.vfnmadd.s" => "__builtin_lsx_vfnmadd_s", + "llvm.loongarch.lsx.vfnmsub.d" => "__builtin_lsx_vfnmsub_d", + "llvm.loongarch.lsx.vfnmsub.s" => "__builtin_lsx_vfnmsub_s", + "llvm.loongarch.lsx.vfrecip.d" => "__builtin_lsx_vfrecip_d", + "llvm.loongarch.lsx.vfrecip.s" => "__builtin_lsx_vfrecip_s", + "llvm.loongarch.lsx.vfrint.d" => "__builtin_lsx_vfrint_d", + "llvm.loongarch.lsx.vfrint.s" => "__builtin_lsx_vfrint_s", + "llvm.loongarch.lsx.vfrintrm.d" => "__builtin_lsx_vfrintrm_d", + "llvm.loongarch.lsx.vfrintrm.s" => "__builtin_lsx_vfrintrm_s", + "llvm.loongarch.lsx.vfrintrne.d" => "__builtin_lsx_vfrintrne_d", + "llvm.loongarch.lsx.vfrintrne.s" => "__builtin_lsx_vfrintrne_s", + "llvm.loongarch.lsx.vfrintrp.d" => "__builtin_lsx_vfrintrp_d", + "llvm.loongarch.lsx.vfrintrp.s" => "__builtin_lsx_vfrintrp_s", + "llvm.loongarch.lsx.vfrintrz.d" => "__builtin_lsx_vfrintrz_d", + "llvm.loongarch.lsx.vfrintrz.s" => "__builtin_lsx_vfrintrz_s", + "llvm.loongarch.lsx.vfrsqrt.d" => "__builtin_lsx_vfrsqrt_d", + "llvm.loongarch.lsx.vfrsqrt.s" => "__builtin_lsx_vfrsqrt_s", + "llvm.loongarch.lsx.vfrstp.b" => "__builtin_lsx_vfrstp_b", + "llvm.loongarch.lsx.vfrstp.h" => "__builtin_lsx_vfrstp_h", + "llvm.loongarch.lsx.vfrstpi.b" => "__builtin_lsx_vfrstpi_b", + "llvm.loongarch.lsx.vfrstpi.h" => "__builtin_lsx_vfrstpi_h", + "llvm.loongarch.lsx.vfsqrt.d" => "__builtin_lsx_vfsqrt_d", + "llvm.loongarch.lsx.vfsqrt.s" => "__builtin_lsx_vfsqrt_s", + "llvm.loongarch.lsx.vfsub.d" => "__builtin_lsx_vfsub_d", + "llvm.loongarch.lsx.vfsub.s" => "__builtin_lsx_vfsub_s", + "llvm.loongarch.lsx.vftint.l.d" => "__builtin_lsx_vftint_l_d", + "llvm.loongarch.lsx.vftint.lu.d" => "__builtin_lsx_vftint_lu_d", + "llvm.loongarch.lsx.vftint.w.d" => "__builtin_lsx_vftint_w_d", + "llvm.loongarch.lsx.vftint.w.s" => "__builtin_lsx_vftint_w_s", + "llvm.loongarch.lsx.vftint.wu.s" => "__builtin_lsx_vftint_wu_s", + "llvm.loongarch.lsx.vftinth.l.s" => "__builtin_lsx_vftinth_l_s", + "llvm.loongarch.lsx.vftintl.l.s" => "__builtin_lsx_vftintl_l_s", + "llvm.loongarch.lsx.vftintrm.l.d" => "__builtin_lsx_vftintrm_l_d", + "llvm.loongarch.lsx.vftintrm.w.d" => "__builtin_lsx_vftintrm_w_d", + "llvm.loongarch.lsx.vftintrm.w.s" => "__builtin_lsx_vftintrm_w_s", + "llvm.loongarch.lsx.vftintrmh.l.s" => "__builtin_lsx_vftintrmh_l_s", + "llvm.loongarch.lsx.vftintrml.l.s" => "__builtin_lsx_vftintrml_l_s", + "llvm.loongarch.lsx.vftintrne.l.d" => "__builtin_lsx_vftintrne_l_d", + "llvm.loongarch.lsx.vftintrne.w.d" => "__builtin_lsx_vftintrne_w_d", + "llvm.loongarch.lsx.vftintrne.w.s" => "__builtin_lsx_vftintrne_w_s", + "llvm.loongarch.lsx.vftintrneh.l.s" => "__builtin_lsx_vftintrneh_l_s", + "llvm.loongarch.lsx.vftintrnel.l.s" => "__builtin_lsx_vftintrnel_l_s", + "llvm.loongarch.lsx.vftintrp.l.d" => "__builtin_lsx_vftintrp_l_d", + "llvm.loongarch.lsx.vftintrp.w.d" => "__builtin_lsx_vftintrp_w_d", + "llvm.loongarch.lsx.vftintrp.w.s" => "__builtin_lsx_vftintrp_w_s", + "llvm.loongarch.lsx.vftintrph.l.s" => "__builtin_lsx_vftintrph_l_s", + "llvm.loongarch.lsx.vftintrpl.l.s" => "__builtin_lsx_vftintrpl_l_s", + "llvm.loongarch.lsx.vftintrz.l.d" => "__builtin_lsx_vftintrz_l_d", + "llvm.loongarch.lsx.vftintrz.lu.d" => "__builtin_lsx_vftintrz_lu_d", + "llvm.loongarch.lsx.vftintrz.w.d" => "__builtin_lsx_vftintrz_w_d", + "llvm.loongarch.lsx.vftintrz.w.s" => "__builtin_lsx_vftintrz_w_s", + "llvm.loongarch.lsx.vftintrz.wu.s" => "__builtin_lsx_vftintrz_wu_s", + "llvm.loongarch.lsx.vftintrzh.l.s" => "__builtin_lsx_vftintrzh_l_s", + "llvm.loongarch.lsx.vftintrzl.l.s" => "__builtin_lsx_vftintrzl_l_s", + "llvm.loongarch.lsx.vhaddw.d.w" => "__builtin_lsx_vhaddw_d_w", + "llvm.loongarch.lsx.vhaddw.du.wu" => "__builtin_lsx_vhaddw_du_wu", + "llvm.loongarch.lsx.vhaddw.h.b" => "__builtin_lsx_vhaddw_h_b", + "llvm.loongarch.lsx.vhaddw.hu.bu" => "__builtin_lsx_vhaddw_hu_bu", + "llvm.loongarch.lsx.vhaddw.q.d" => "__builtin_lsx_vhaddw_q_d", + "llvm.loongarch.lsx.vhaddw.qu.du" => "__builtin_lsx_vhaddw_qu_du", + "llvm.loongarch.lsx.vhaddw.w.h" => "__builtin_lsx_vhaddw_w_h", + "llvm.loongarch.lsx.vhaddw.wu.hu" => "__builtin_lsx_vhaddw_wu_hu", + "llvm.loongarch.lsx.vhsubw.d.w" => "__builtin_lsx_vhsubw_d_w", + "llvm.loongarch.lsx.vhsubw.du.wu" => "__builtin_lsx_vhsubw_du_wu", + "llvm.loongarch.lsx.vhsubw.h.b" => "__builtin_lsx_vhsubw_h_b", + "llvm.loongarch.lsx.vhsubw.hu.bu" => "__builtin_lsx_vhsubw_hu_bu", + "llvm.loongarch.lsx.vhsubw.q.d" => "__builtin_lsx_vhsubw_q_d", + "llvm.loongarch.lsx.vhsubw.qu.du" => "__builtin_lsx_vhsubw_qu_du", + "llvm.loongarch.lsx.vhsubw.w.h" => "__builtin_lsx_vhsubw_w_h", + "llvm.loongarch.lsx.vhsubw.wu.hu" => "__builtin_lsx_vhsubw_wu_hu", + "llvm.loongarch.lsx.vilvh.b" => "__builtin_lsx_vilvh_b", + "llvm.loongarch.lsx.vilvh.d" => "__builtin_lsx_vilvh_d", + "llvm.loongarch.lsx.vilvh.h" => "__builtin_lsx_vilvh_h", + "llvm.loongarch.lsx.vilvh.w" => "__builtin_lsx_vilvh_w", + "llvm.loongarch.lsx.vilvl.b" => "__builtin_lsx_vilvl_b", + "llvm.loongarch.lsx.vilvl.d" => "__builtin_lsx_vilvl_d", + "llvm.loongarch.lsx.vilvl.h" => "__builtin_lsx_vilvl_h", + "llvm.loongarch.lsx.vilvl.w" => "__builtin_lsx_vilvl_w", + "llvm.loongarch.lsx.vinsgr2vr.b" => "__builtin_lsx_vinsgr2vr_b", + "llvm.loongarch.lsx.vinsgr2vr.d" => "__builtin_lsx_vinsgr2vr_d", + "llvm.loongarch.lsx.vinsgr2vr.h" => "__builtin_lsx_vinsgr2vr_h", + "llvm.loongarch.lsx.vinsgr2vr.w" => "__builtin_lsx_vinsgr2vr_w", + "llvm.loongarch.lsx.vld" => "__builtin_lsx_vld", + "llvm.loongarch.lsx.vldi" => "__builtin_lsx_vldi", + "llvm.loongarch.lsx.vldrepl.b" => "__builtin_lsx_vldrepl_b", + "llvm.loongarch.lsx.vldrepl.d" => "__builtin_lsx_vldrepl_d", + "llvm.loongarch.lsx.vldrepl.h" => "__builtin_lsx_vldrepl_h", + "llvm.loongarch.lsx.vldrepl.w" => "__builtin_lsx_vldrepl_w", + "llvm.loongarch.lsx.vldx" => "__builtin_lsx_vldx", + "llvm.loongarch.lsx.vmadd.b" => "__builtin_lsx_vmadd_b", + "llvm.loongarch.lsx.vmadd.d" => "__builtin_lsx_vmadd_d", + "llvm.loongarch.lsx.vmadd.h" => "__builtin_lsx_vmadd_h", + "llvm.loongarch.lsx.vmadd.w" => "__builtin_lsx_vmadd_w", + "llvm.loongarch.lsx.vmaddwev.d.w" => "__builtin_lsx_vmaddwev_d_w", + "llvm.loongarch.lsx.vmaddwev.d.wu" => "__builtin_lsx_vmaddwev_d_wu", + "llvm.loongarch.lsx.vmaddwev.d.wu.w" => "__builtin_lsx_vmaddwev_d_wu_w", + "llvm.loongarch.lsx.vmaddwev.h.b" => "__builtin_lsx_vmaddwev_h_b", + "llvm.loongarch.lsx.vmaddwev.h.bu" => "__builtin_lsx_vmaddwev_h_bu", + "llvm.loongarch.lsx.vmaddwev.h.bu.b" => "__builtin_lsx_vmaddwev_h_bu_b", + "llvm.loongarch.lsx.vmaddwev.q.d" => "__builtin_lsx_vmaddwev_q_d", + "llvm.loongarch.lsx.vmaddwev.q.du" => "__builtin_lsx_vmaddwev_q_du", + "llvm.loongarch.lsx.vmaddwev.q.du.d" => "__builtin_lsx_vmaddwev_q_du_d", + "llvm.loongarch.lsx.vmaddwev.w.h" => "__builtin_lsx_vmaddwev_w_h", + "llvm.loongarch.lsx.vmaddwev.w.hu" => "__builtin_lsx_vmaddwev_w_hu", + "llvm.loongarch.lsx.vmaddwev.w.hu.h" => "__builtin_lsx_vmaddwev_w_hu_h", + "llvm.loongarch.lsx.vmaddwod.d.w" => "__builtin_lsx_vmaddwod_d_w", + "llvm.loongarch.lsx.vmaddwod.d.wu" => "__builtin_lsx_vmaddwod_d_wu", + "llvm.loongarch.lsx.vmaddwod.d.wu.w" => "__builtin_lsx_vmaddwod_d_wu_w", + "llvm.loongarch.lsx.vmaddwod.h.b" => "__builtin_lsx_vmaddwod_h_b", + "llvm.loongarch.lsx.vmaddwod.h.bu" => "__builtin_lsx_vmaddwod_h_bu", + "llvm.loongarch.lsx.vmaddwod.h.bu.b" => "__builtin_lsx_vmaddwod_h_bu_b", + "llvm.loongarch.lsx.vmaddwod.q.d" => "__builtin_lsx_vmaddwod_q_d", + "llvm.loongarch.lsx.vmaddwod.q.du" => "__builtin_lsx_vmaddwod_q_du", + "llvm.loongarch.lsx.vmaddwod.q.du.d" => "__builtin_lsx_vmaddwod_q_du_d", + "llvm.loongarch.lsx.vmaddwod.w.h" => "__builtin_lsx_vmaddwod_w_h", + "llvm.loongarch.lsx.vmaddwod.w.hu" => "__builtin_lsx_vmaddwod_w_hu", + "llvm.loongarch.lsx.vmaddwod.w.hu.h" => "__builtin_lsx_vmaddwod_w_hu_h", + "llvm.loongarch.lsx.vmax.b" => "__builtin_lsx_vmax_b", + "llvm.loongarch.lsx.vmax.bu" => "__builtin_lsx_vmax_bu", + "llvm.loongarch.lsx.vmax.d" => "__builtin_lsx_vmax_d", + "llvm.loongarch.lsx.vmax.du" => "__builtin_lsx_vmax_du", + "llvm.loongarch.lsx.vmax.h" => "__builtin_lsx_vmax_h", + "llvm.loongarch.lsx.vmax.hu" => "__builtin_lsx_vmax_hu", + "llvm.loongarch.lsx.vmax.w" => "__builtin_lsx_vmax_w", + "llvm.loongarch.lsx.vmax.wu" => "__builtin_lsx_vmax_wu", + "llvm.loongarch.lsx.vmaxi.b" => "__builtin_lsx_vmaxi_b", + "llvm.loongarch.lsx.vmaxi.bu" => "__builtin_lsx_vmaxi_bu", + "llvm.loongarch.lsx.vmaxi.d" => "__builtin_lsx_vmaxi_d", + "llvm.loongarch.lsx.vmaxi.du" => "__builtin_lsx_vmaxi_du", + "llvm.loongarch.lsx.vmaxi.h" => "__builtin_lsx_vmaxi_h", + "llvm.loongarch.lsx.vmaxi.hu" => "__builtin_lsx_vmaxi_hu", + "llvm.loongarch.lsx.vmaxi.w" => "__builtin_lsx_vmaxi_w", + "llvm.loongarch.lsx.vmaxi.wu" => "__builtin_lsx_vmaxi_wu", + "llvm.loongarch.lsx.vmin.b" => "__builtin_lsx_vmin_b", + "llvm.loongarch.lsx.vmin.bu" => "__builtin_lsx_vmin_bu", + "llvm.loongarch.lsx.vmin.d" => "__builtin_lsx_vmin_d", + "llvm.loongarch.lsx.vmin.du" => "__builtin_lsx_vmin_du", + "llvm.loongarch.lsx.vmin.h" => "__builtin_lsx_vmin_h", + "llvm.loongarch.lsx.vmin.hu" => "__builtin_lsx_vmin_hu", + "llvm.loongarch.lsx.vmin.w" => "__builtin_lsx_vmin_w", + "llvm.loongarch.lsx.vmin.wu" => "__builtin_lsx_vmin_wu", + "llvm.loongarch.lsx.vmini.b" => "__builtin_lsx_vmini_b", + "llvm.loongarch.lsx.vmini.bu" => "__builtin_lsx_vmini_bu", + "llvm.loongarch.lsx.vmini.d" => "__builtin_lsx_vmini_d", + "llvm.loongarch.lsx.vmini.du" => "__builtin_lsx_vmini_du", + "llvm.loongarch.lsx.vmini.h" => "__builtin_lsx_vmini_h", + "llvm.loongarch.lsx.vmini.hu" => "__builtin_lsx_vmini_hu", + "llvm.loongarch.lsx.vmini.w" => "__builtin_lsx_vmini_w", + "llvm.loongarch.lsx.vmini.wu" => "__builtin_lsx_vmini_wu", + "llvm.loongarch.lsx.vmod.b" => "__builtin_lsx_vmod_b", + "llvm.loongarch.lsx.vmod.bu" => "__builtin_lsx_vmod_bu", + "llvm.loongarch.lsx.vmod.d" => "__builtin_lsx_vmod_d", + "llvm.loongarch.lsx.vmod.du" => "__builtin_lsx_vmod_du", + "llvm.loongarch.lsx.vmod.h" => "__builtin_lsx_vmod_h", + "llvm.loongarch.lsx.vmod.hu" => "__builtin_lsx_vmod_hu", + "llvm.loongarch.lsx.vmod.w" => "__builtin_lsx_vmod_w", + "llvm.loongarch.lsx.vmod.wu" => "__builtin_lsx_vmod_wu", + "llvm.loongarch.lsx.vmskgez.b" => "__builtin_lsx_vmskgez_b", + "llvm.loongarch.lsx.vmskltz.b" => "__builtin_lsx_vmskltz_b", + "llvm.loongarch.lsx.vmskltz.d" => "__builtin_lsx_vmskltz_d", + "llvm.loongarch.lsx.vmskltz.h" => "__builtin_lsx_vmskltz_h", + "llvm.loongarch.lsx.vmskltz.w" => "__builtin_lsx_vmskltz_w", + "llvm.loongarch.lsx.vmsknz.b" => "__builtin_lsx_vmsknz_b", + "llvm.loongarch.lsx.vmsub.b" => "__builtin_lsx_vmsub_b", + "llvm.loongarch.lsx.vmsub.d" => "__builtin_lsx_vmsub_d", + "llvm.loongarch.lsx.vmsub.h" => "__builtin_lsx_vmsub_h", + "llvm.loongarch.lsx.vmsub.w" => "__builtin_lsx_vmsub_w", + "llvm.loongarch.lsx.vmuh.b" => "__builtin_lsx_vmuh_b", + "llvm.loongarch.lsx.vmuh.bu" => "__builtin_lsx_vmuh_bu", + "llvm.loongarch.lsx.vmuh.d" => "__builtin_lsx_vmuh_d", + "llvm.loongarch.lsx.vmuh.du" => "__builtin_lsx_vmuh_du", + "llvm.loongarch.lsx.vmuh.h" => "__builtin_lsx_vmuh_h", + "llvm.loongarch.lsx.vmuh.hu" => "__builtin_lsx_vmuh_hu", + "llvm.loongarch.lsx.vmuh.w" => "__builtin_lsx_vmuh_w", + "llvm.loongarch.lsx.vmuh.wu" => "__builtin_lsx_vmuh_wu", + "llvm.loongarch.lsx.vmul.b" => "__builtin_lsx_vmul_b", + "llvm.loongarch.lsx.vmul.d" => "__builtin_lsx_vmul_d", + "llvm.loongarch.lsx.vmul.h" => "__builtin_lsx_vmul_h", + "llvm.loongarch.lsx.vmul.w" => "__builtin_lsx_vmul_w", + "llvm.loongarch.lsx.vmulwev.d.w" => "__builtin_lsx_vmulwev_d_w", + "llvm.loongarch.lsx.vmulwev.d.wu" => "__builtin_lsx_vmulwev_d_wu", + "llvm.loongarch.lsx.vmulwev.d.wu.w" => "__builtin_lsx_vmulwev_d_wu_w", + "llvm.loongarch.lsx.vmulwev.h.b" => "__builtin_lsx_vmulwev_h_b", + "llvm.loongarch.lsx.vmulwev.h.bu" => "__builtin_lsx_vmulwev_h_bu", + "llvm.loongarch.lsx.vmulwev.h.bu.b" => "__builtin_lsx_vmulwev_h_bu_b", + "llvm.loongarch.lsx.vmulwev.q.d" => "__builtin_lsx_vmulwev_q_d", + "llvm.loongarch.lsx.vmulwev.q.du" => "__builtin_lsx_vmulwev_q_du", + "llvm.loongarch.lsx.vmulwev.q.du.d" => "__builtin_lsx_vmulwev_q_du_d", + "llvm.loongarch.lsx.vmulwev.w.h" => "__builtin_lsx_vmulwev_w_h", + "llvm.loongarch.lsx.vmulwev.w.hu" => "__builtin_lsx_vmulwev_w_hu", + "llvm.loongarch.lsx.vmulwev.w.hu.h" => "__builtin_lsx_vmulwev_w_hu_h", + "llvm.loongarch.lsx.vmulwod.d.w" => "__builtin_lsx_vmulwod_d_w", + "llvm.loongarch.lsx.vmulwod.d.wu" => "__builtin_lsx_vmulwod_d_wu", + "llvm.loongarch.lsx.vmulwod.d.wu.w" => "__builtin_lsx_vmulwod_d_wu_w", + "llvm.loongarch.lsx.vmulwod.h.b" => "__builtin_lsx_vmulwod_h_b", + "llvm.loongarch.lsx.vmulwod.h.bu" => "__builtin_lsx_vmulwod_h_bu", + "llvm.loongarch.lsx.vmulwod.h.bu.b" => "__builtin_lsx_vmulwod_h_bu_b", + "llvm.loongarch.lsx.vmulwod.q.d" => "__builtin_lsx_vmulwod_q_d", + "llvm.loongarch.lsx.vmulwod.q.du" => "__builtin_lsx_vmulwod_q_du", + "llvm.loongarch.lsx.vmulwod.q.du.d" => "__builtin_lsx_vmulwod_q_du_d", + "llvm.loongarch.lsx.vmulwod.w.h" => "__builtin_lsx_vmulwod_w_h", + "llvm.loongarch.lsx.vmulwod.w.hu" => "__builtin_lsx_vmulwod_w_hu", + "llvm.loongarch.lsx.vmulwod.w.hu.h" => "__builtin_lsx_vmulwod_w_hu_h", + "llvm.loongarch.lsx.vneg.b" => "__builtin_lsx_vneg_b", + "llvm.loongarch.lsx.vneg.d" => "__builtin_lsx_vneg_d", + "llvm.loongarch.lsx.vneg.h" => "__builtin_lsx_vneg_h", + "llvm.loongarch.lsx.vneg.w" => "__builtin_lsx_vneg_w", + "llvm.loongarch.lsx.vnor.v" => "__builtin_lsx_vnor_v", + "llvm.loongarch.lsx.vnori.b" => "__builtin_lsx_vnori_b", + "llvm.loongarch.lsx.vor.v" => "__builtin_lsx_vor_v", + "llvm.loongarch.lsx.vori.b" => "__builtin_lsx_vori_b", + "llvm.loongarch.lsx.vorn.v" => "__builtin_lsx_vorn_v", + "llvm.loongarch.lsx.vpackev.b" => "__builtin_lsx_vpackev_b", + "llvm.loongarch.lsx.vpackev.d" => "__builtin_lsx_vpackev_d", + "llvm.loongarch.lsx.vpackev.h" => "__builtin_lsx_vpackev_h", + "llvm.loongarch.lsx.vpackev.w" => "__builtin_lsx_vpackev_w", + "llvm.loongarch.lsx.vpackod.b" => "__builtin_lsx_vpackod_b", + "llvm.loongarch.lsx.vpackod.d" => "__builtin_lsx_vpackod_d", + "llvm.loongarch.lsx.vpackod.h" => "__builtin_lsx_vpackod_h", + "llvm.loongarch.lsx.vpackod.w" => "__builtin_lsx_vpackod_w", + "llvm.loongarch.lsx.vpcnt.b" => "__builtin_lsx_vpcnt_b", + "llvm.loongarch.lsx.vpcnt.d" => "__builtin_lsx_vpcnt_d", + "llvm.loongarch.lsx.vpcnt.h" => "__builtin_lsx_vpcnt_h", + "llvm.loongarch.lsx.vpcnt.w" => "__builtin_lsx_vpcnt_w", + "llvm.loongarch.lsx.vpermi.w" => "__builtin_lsx_vpermi_w", + "llvm.loongarch.lsx.vpickev.b" => "__builtin_lsx_vpickev_b", + "llvm.loongarch.lsx.vpickev.d" => "__builtin_lsx_vpickev_d", + "llvm.loongarch.lsx.vpickev.h" => "__builtin_lsx_vpickev_h", + "llvm.loongarch.lsx.vpickev.w" => "__builtin_lsx_vpickev_w", + "llvm.loongarch.lsx.vpickod.b" => "__builtin_lsx_vpickod_b", + "llvm.loongarch.lsx.vpickod.d" => "__builtin_lsx_vpickod_d", + "llvm.loongarch.lsx.vpickod.h" => "__builtin_lsx_vpickod_h", + "llvm.loongarch.lsx.vpickod.w" => "__builtin_lsx_vpickod_w", + "llvm.loongarch.lsx.vpickve2gr.b" => "__builtin_lsx_vpickve2gr_b", + "llvm.loongarch.lsx.vpickve2gr.bu" => "__builtin_lsx_vpickve2gr_bu", + "llvm.loongarch.lsx.vpickve2gr.d" => "__builtin_lsx_vpickve2gr_d", + "llvm.loongarch.lsx.vpickve2gr.du" => "__builtin_lsx_vpickve2gr_du", + "llvm.loongarch.lsx.vpickve2gr.h" => "__builtin_lsx_vpickve2gr_h", + "llvm.loongarch.lsx.vpickve2gr.hu" => "__builtin_lsx_vpickve2gr_hu", + "llvm.loongarch.lsx.vpickve2gr.w" => "__builtin_lsx_vpickve2gr_w", + "llvm.loongarch.lsx.vpickve2gr.wu" => "__builtin_lsx_vpickve2gr_wu", + "llvm.loongarch.lsx.vreplgr2vr.b" => "__builtin_lsx_vreplgr2vr_b", + "llvm.loongarch.lsx.vreplgr2vr.d" => "__builtin_lsx_vreplgr2vr_d", + "llvm.loongarch.lsx.vreplgr2vr.h" => "__builtin_lsx_vreplgr2vr_h", + "llvm.loongarch.lsx.vreplgr2vr.w" => "__builtin_lsx_vreplgr2vr_w", + "llvm.loongarch.lsx.vrepli.b" => "__builtin_lsx_vrepli_b", + "llvm.loongarch.lsx.vrepli.d" => "__builtin_lsx_vrepli_d", + "llvm.loongarch.lsx.vrepli.h" => "__builtin_lsx_vrepli_h", + "llvm.loongarch.lsx.vrepli.w" => "__builtin_lsx_vrepli_w", + "llvm.loongarch.lsx.vreplve.b" => "__builtin_lsx_vreplve_b", + "llvm.loongarch.lsx.vreplve.d" => "__builtin_lsx_vreplve_d", + "llvm.loongarch.lsx.vreplve.h" => "__builtin_lsx_vreplve_h", + "llvm.loongarch.lsx.vreplve.w" => "__builtin_lsx_vreplve_w", + "llvm.loongarch.lsx.vreplvei.b" => "__builtin_lsx_vreplvei_b", + "llvm.loongarch.lsx.vreplvei.d" => "__builtin_lsx_vreplvei_d", + "llvm.loongarch.lsx.vreplvei.h" => "__builtin_lsx_vreplvei_h", + "llvm.loongarch.lsx.vreplvei.w" => "__builtin_lsx_vreplvei_w", + "llvm.loongarch.lsx.vrotr.b" => "__builtin_lsx_vrotr_b", + "llvm.loongarch.lsx.vrotr.d" => "__builtin_lsx_vrotr_d", + "llvm.loongarch.lsx.vrotr.h" => "__builtin_lsx_vrotr_h", + "llvm.loongarch.lsx.vrotr.w" => "__builtin_lsx_vrotr_w", + "llvm.loongarch.lsx.vrotri.b" => "__builtin_lsx_vrotri_b", + "llvm.loongarch.lsx.vrotri.d" => "__builtin_lsx_vrotri_d", + "llvm.loongarch.lsx.vrotri.h" => "__builtin_lsx_vrotri_h", + "llvm.loongarch.lsx.vrotri.w" => "__builtin_lsx_vrotri_w", + "llvm.loongarch.lsx.vsadd.b" => "__builtin_lsx_vsadd_b", + "llvm.loongarch.lsx.vsadd.bu" => "__builtin_lsx_vsadd_bu", + "llvm.loongarch.lsx.vsadd.d" => "__builtin_lsx_vsadd_d", + "llvm.loongarch.lsx.vsadd.du" => "__builtin_lsx_vsadd_du", + "llvm.loongarch.lsx.vsadd.h" => "__builtin_lsx_vsadd_h", + "llvm.loongarch.lsx.vsadd.hu" => "__builtin_lsx_vsadd_hu", + "llvm.loongarch.lsx.vsadd.w" => "__builtin_lsx_vsadd_w", + "llvm.loongarch.lsx.vsadd.wu" => "__builtin_lsx_vsadd_wu", + "llvm.loongarch.lsx.vsat.b" => "__builtin_lsx_vsat_b", + "llvm.loongarch.lsx.vsat.bu" => "__builtin_lsx_vsat_bu", + "llvm.loongarch.lsx.vsat.d" => "__builtin_lsx_vsat_d", + "llvm.loongarch.lsx.vsat.du" => "__builtin_lsx_vsat_du", + "llvm.loongarch.lsx.vsat.h" => "__builtin_lsx_vsat_h", + "llvm.loongarch.lsx.vsat.hu" => "__builtin_lsx_vsat_hu", + "llvm.loongarch.lsx.vsat.w" => "__builtin_lsx_vsat_w", + "llvm.loongarch.lsx.vsat.wu" => "__builtin_lsx_vsat_wu", + "llvm.loongarch.lsx.vseq.b" => "__builtin_lsx_vseq_b", + "llvm.loongarch.lsx.vseq.d" => "__builtin_lsx_vseq_d", + "llvm.loongarch.lsx.vseq.h" => "__builtin_lsx_vseq_h", + "llvm.loongarch.lsx.vseq.w" => "__builtin_lsx_vseq_w", + "llvm.loongarch.lsx.vseqi.b" => "__builtin_lsx_vseqi_b", + "llvm.loongarch.lsx.vseqi.d" => "__builtin_lsx_vseqi_d", + "llvm.loongarch.lsx.vseqi.h" => "__builtin_lsx_vseqi_h", + "llvm.loongarch.lsx.vseqi.w" => "__builtin_lsx_vseqi_w", + "llvm.loongarch.lsx.vshuf.b" => "__builtin_lsx_vshuf_b", + "llvm.loongarch.lsx.vshuf.d" => "__builtin_lsx_vshuf_d", + "llvm.loongarch.lsx.vshuf.h" => "__builtin_lsx_vshuf_h", + "llvm.loongarch.lsx.vshuf.w" => "__builtin_lsx_vshuf_w", + "llvm.loongarch.lsx.vshuf4i.b" => "__builtin_lsx_vshuf4i_b", + "llvm.loongarch.lsx.vshuf4i.d" => "__builtin_lsx_vshuf4i_d", + "llvm.loongarch.lsx.vshuf4i.h" => "__builtin_lsx_vshuf4i_h", + "llvm.loongarch.lsx.vshuf4i.w" => "__builtin_lsx_vshuf4i_w", + "llvm.loongarch.lsx.vsigncov.b" => "__builtin_lsx_vsigncov_b", + "llvm.loongarch.lsx.vsigncov.d" => "__builtin_lsx_vsigncov_d", + "llvm.loongarch.lsx.vsigncov.h" => "__builtin_lsx_vsigncov_h", + "llvm.loongarch.lsx.vsigncov.w" => "__builtin_lsx_vsigncov_w", + "llvm.loongarch.lsx.vsle.b" => "__builtin_lsx_vsle_b", + "llvm.loongarch.lsx.vsle.bu" => "__builtin_lsx_vsle_bu", + "llvm.loongarch.lsx.vsle.d" => "__builtin_lsx_vsle_d", + "llvm.loongarch.lsx.vsle.du" => "__builtin_lsx_vsle_du", + "llvm.loongarch.lsx.vsle.h" => "__builtin_lsx_vsle_h", + "llvm.loongarch.lsx.vsle.hu" => "__builtin_lsx_vsle_hu", + "llvm.loongarch.lsx.vsle.w" => "__builtin_lsx_vsle_w", + "llvm.loongarch.lsx.vsle.wu" => "__builtin_lsx_vsle_wu", + "llvm.loongarch.lsx.vslei.b" => "__builtin_lsx_vslei_b", + "llvm.loongarch.lsx.vslei.bu" => "__builtin_lsx_vslei_bu", + "llvm.loongarch.lsx.vslei.d" => "__builtin_lsx_vslei_d", + "llvm.loongarch.lsx.vslei.du" => "__builtin_lsx_vslei_du", + "llvm.loongarch.lsx.vslei.h" => "__builtin_lsx_vslei_h", + "llvm.loongarch.lsx.vslei.hu" => "__builtin_lsx_vslei_hu", + "llvm.loongarch.lsx.vslei.w" => "__builtin_lsx_vslei_w", + "llvm.loongarch.lsx.vslei.wu" => "__builtin_lsx_vslei_wu", + "llvm.loongarch.lsx.vsll.b" => "__builtin_lsx_vsll_b", + "llvm.loongarch.lsx.vsll.d" => "__builtin_lsx_vsll_d", + "llvm.loongarch.lsx.vsll.h" => "__builtin_lsx_vsll_h", + "llvm.loongarch.lsx.vsll.w" => "__builtin_lsx_vsll_w", + "llvm.loongarch.lsx.vslli.b" => "__builtin_lsx_vslli_b", + "llvm.loongarch.lsx.vslli.d" => "__builtin_lsx_vslli_d", + "llvm.loongarch.lsx.vslli.h" => "__builtin_lsx_vslli_h", + "llvm.loongarch.lsx.vslli.w" => "__builtin_lsx_vslli_w", + "llvm.loongarch.lsx.vsllwil.d.w" => "__builtin_lsx_vsllwil_d_w", + "llvm.loongarch.lsx.vsllwil.du.wu" => "__builtin_lsx_vsllwil_du_wu", + "llvm.loongarch.lsx.vsllwil.h.b" => "__builtin_lsx_vsllwil_h_b", + "llvm.loongarch.lsx.vsllwil.hu.bu" => "__builtin_lsx_vsllwil_hu_bu", + "llvm.loongarch.lsx.vsllwil.w.h" => "__builtin_lsx_vsllwil_w_h", + "llvm.loongarch.lsx.vsllwil.wu.hu" => "__builtin_lsx_vsllwil_wu_hu", + "llvm.loongarch.lsx.vslt.b" => "__builtin_lsx_vslt_b", + "llvm.loongarch.lsx.vslt.bu" => "__builtin_lsx_vslt_bu", + "llvm.loongarch.lsx.vslt.d" => "__builtin_lsx_vslt_d", + "llvm.loongarch.lsx.vslt.du" => "__builtin_lsx_vslt_du", + "llvm.loongarch.lsx.vslt.h" => "__builtin_lsx_vslt_h", + "llvm.loongarch.lsx.vslt.hu" => "__builtin_lsx_vslt_hu", + "llvm.loongarch.lsx.vslt.w" => "__builtin_lsx_vslt_w", + "llvm.loongarch.lsx.vslt.wu" => "__builtin_lsx_vslt_wu", + "llvm.loongarch.lsx.vslti.b" => "__builtin_lsx_vslti_b", + "llvm.loongarch.lsx.vslti.bu" => "__builtin_lsx_vslti_bu", + "llvm.loongarch.lsx.vslti.d" => "__builtin_lsx_vslti_d", + "llvm.loongarch.lsx.vslti.du" => "__builtin_lsx_vslti_du", + "llvm.loongarch.lsx.vslti.h" => "__builtin_lsx_vslti_h", + "llvm.loongarch.lsx.vslti.hu" => "__builtin_lsx_vslti_hu", + "llvm.loongarch.lsx.vslti.w" => "__builtin_lsx_vslti_w", + "llvm.loongarch.lsx.vslti.wu" => "__builtin_lsx_vslti_wu", + "llvm.loongarch.lsx.vsra.b" => "__builtin_lsx_vsra_b", + "llvm.loongarch.lsx.vsra.d" => "__builtin_lsx_vsra_d", + "llvm.loongarch.lsx.vsra.h" => "__builtin_lsx_vsra_h", + "llvm.loongarch.lsx.vsra.w" => "__builtin_lsx_vsra_w", + "llvm.loongarch.lsx.vsrai.b" => "__builtin_lsx_vsrai_b", + "llvm.loongarch.lsx.vsrai.d" => "__builtin_lsx_vsrai_d", + "llvm.loongarch.lsx.vsrai.h" => "__builtin_lsx_vsrai_h", + "llvm.loongarch.lsx.vsrai.w" => "__builtin_lsx_vsrai_w", + "llvm.loongarch.lsx.vsran.b.h" => "__builtin_lsx_vsran_b_h", + "llvm.loongarch.lsx.vsran.h.w" => "__builtin_lsx_vsran_h_w", + "llvm.loongarch.lsx.vsran.w.d" => "__builtin_lsx_vsran_w_d", + "llvm.loongarch.lsx.vsrani.b.h" => "__builtin_lsx_vsrani_b_h", + "llvm.loongarch.lsx.vsrani.d.q" => "__builtin_lsx_vsrani_d_q", + "llvm.loongarch.lsx.vsrani.h.w" => "__builtin_lsx_vsrani_h_w", + "llvm.loongarch.lsx.vsrani.w.d" => "__builtin_lsx_vsrani_w_d", + "llvm.loongarch.lsx.vsrar.b" => "__builtin_lsx_vsrar_b", + "llvm.loongarch.lsx.vsrar.d" => "__builtin_lsx_vsrar_d", + "llvm.loongarch.lsx.vsrar.h" => "__builtin_lsx_vsrar_h", + "llvm.loongarch.lsx.vsrar.w" => "__builtin_lsx_vsrar_w", + "llvm.loongarch.lsx.vsrari.b" => "__builtin_lsx_vsrari_b", + "llvm.loongarch.lsx.vsrari.d" => "__builtin_lsx_vsrari_d", + "llvm.loongarch.lsx.vsrari.h" => "__builtin_lsx_vsrari_h", + "llvm.loongarch.lsx.vsrari.w" => "__builtin_lsx_vsrari_w", + "llvm.loongarch.lsx.vsrarn.b.h" => "__builtin_lsx_vsrarn_b_h", + "llvm.loongarch.lsx.vsrarn.h.w" => "__builtin_lsx_vsrarn_h_w", + "llvm.loongarch.lsx.vsrarn.w.d" => "__builtin_lsx_vsrarn_w_d", + "llvm.loongarch.lsx.vsrarni.b.h" => "__builtin_lsx_vsrarni_b_h", + "llvm.loongarch.lsx.vsrarni.d.q" => "__builtin_lsx_vsrarni_d_q", + "llvm.loongarch.lsx.vsrarni.h.w" => "__builtin_lsx_vsrarni_h_w", + "llvm.loongarch.lsx.vsrarni.w.d" => "__builtin_lsx_vsrarni_w_d", + "llvm.loongarch.lsx.vsrl.b" => "__builtin_lsx_vsrl_b", + "llvm.loongarch.lsx.vsrl.d" => "__builtin_lsx_vsrl_d", + "llvm.loongarch.lsx.vsrl.h" => "__builtin_lsx_vsrl_h", + "llvm.loongarch.lsx.vsrl.w" => "__builtin_lsx_vsrl_w", + "llvm.loongarch.lsx.vsrli.b" => "__builtin_lsx_vsrli_b", + "llvm.loongarch.lsx.vsrli.d" => "__builtin_lsx_vsrli_d", + "llvm.loongarch.lsx.vsrli.h" => "__builtin_lsx_vsrli_h", + "llvm.loongarch.lsx.vsrli.w" => "__builtin_lsx_vsrli_w", + "llvm.loongarch.lsx.vsrln.b.h" => "__builtin_lsx_vsrln_b_h", + "llvm.loongarch.lsx.vsrln.h.w" => "__builtin_lsx_vsrln_h_w", + "llvm.loongarch.lsx.vsrln.w.d" => "__builtin_lsx_vsrln_w_d", + "llvm.loongarch.lsx.vsrlni.b.h" => "__builtin_lsx_vsrlni_b_h", + "llvm.loongarch.lsx.vsrlni.d.q" => "__builtin_lsx_vsrlni_d_q", + "llvm.loongarch.lsx.vsrlni.h.w" => "__builtin_lsx_vsrlni_h_w", + "llvm.loongarch.lsx.vsrlni.w.d" => "__builtin_lsx_vsrlni_w_d", + "llvm.loongarch.lsx.vsrlr.b" => "__builtin_lsx_vsrlr_b", + "llvm.loongarch.lsx.vsrlr.d" => "__builtin_lsx_vsrlr_d", + "llvm.loongarch.lsx.vsrlr.h" => "__builtin_lsx_vsrlr_h", + "llvm.loongarch.lsx.vsrlr.w" => "__builtin_lsx_vsrlr_w", + "llvm.loongarch.lsx.vsrlri.b" => "__builtin_lsx_vsrlri_b", + "llvm.loongarch.lsx.vsrlri.d" => "__builtin_lsx_vsrlri_d", + "llvm.loongarch.lsx.vsrlri.h" => "__builtin_lsx_vsrlri_h", + "llvm.loongarch.lsx.vsrlri.w" => "__builtin_lsx_vsrlri_w", + "llvm.loongarch.lsx.vsrlrn.b.h" => "__builtin_lsx_vsrlrn_b_h", + "llvm.loongarch.lsx.vsrlrn.h.w" => "__builtin_lsx_vsrlrn_h_w", + "llvm.loongarch.lsx.vsrlrn.w.d" => "__builtin_lsx_vsrlrn_w_d", + "llvm.loongarch.lsx.vsrlrni.b.h" => "__builtin_lsx_vsrlrni_b_h", + "llvm.loongarch.lsx.vsrlrni.d.q" => "__builtin_lsx_vsrlrni_d_q", + "llvm.loongarch.lsx.vsrlrni.h.w" => "__builtin_lsx_vsrlrni_h_w", + "llvm.loongarch.lsx.vsrlrni.w.d" => "__builtin_lsx_vsrlrni_w_d", + "llvm.loongarch.lsx.vssran.b.h" => "__builtin_lsx_vssran_b_h", + "llvm.loongarch.lsx.vssran.bu.h" => "__builtin_lsx_vssran_bu_h", + "llvm.loongarch.lsx.vssran.h.w" => "__builtin_lsx_vssran_h_w", + "llvm.loongarch.lsx.vssran.hu.w" => "__builtin_lsx_vssran_hu_w", + "llvm.loongarch.lsx.vssran.w.d" => "__builtin_lsx_vssran_w_d", + "llvm.loongarch.lsx.vssran.wu.d" => "__builtin_lsx_vssran_wu_d", + "llvm.loongarch.lsx.vssrani.b.h" => "__builtin_lsx_vssrani_b_h", + "llvm.loongarch.lsx.vssrani.bu.h" => "__builtin_lsx_vssrani_bu_h", + "llvm.loongarch.lsx.vssrani.d.q" => "__builtin_lsx_vssrani_d_q", + "llvm.loongarch.lsx.vssrani.du.q" => "__builtin_lsx_vssrani_du_q", + "llvm.loongarch.lsx.vssrani.h.w" => "__builtin_lsx_vssrani_h_w", + "llvm.loongarch.lsx.vssrani.hu.w" => "__builtin_lsx_vssrani_hu_w", + "llvm.loongarch.lsx.vssrani.w.d" => "__builtin_lsx_vssrani_w_d", + "llvm.loongarch.lsx.vssrani.wu.d" => "__builtin_lsx_vssrani_wu_d", + "llvm.loongarch.lsx.vssrarn.b.h" => "__builtin_lsx_vssrarn_b_h", + "llvm.loongarch.lsx.vssrarn.bu.h" => "__builtin_lsx_vssrarn_bu_h", + "llvm.loongarch.lsx.vssrarn.h.w" => "__builtin_lsx_vssrarn_h_w", + "llvm.loongarch.lsx.vssrarn.hu.w" => "__builtin_lsx_vssrarn_hu_w", + "llvm.loongarch.lsx.vssrarn.w.d" => "__builtin_lsx_vssrarn_w_d", + "llvm.loongarch.lsx.vssrarn.wu.d" => "__builtin_lsx_vssrarn_wu_d", + "llvm.loongarch.lsx.vssrarni.b.h" => "__builtin_lsx_vssrarni_b_h", + "llvm.loongarch.lsx.vssrarni.bu.h" => "__builtin_lsx_vssrarni_bu_h", + "llvm.loongarch.lsx.vssrarni.d.q" => "__builtin_lsx_vssrarni_d_q", + "llvm.loongarch.lsx.vssrarni.du.q" => "__builtin_lsx_vssrarni_du_q", + "llvm.loongarch.lsx.vssrarni.h.w" => "__builtin_lsx_vssrarni_h_w", + "llvm.loongarch.lsx.vssrarni.hu.w" => "__builtin_lsx_vssrarni_hu_w", + "llvm.loongarch.lsx.vssrarni.w.d" => "__builtin_lsx_vssrarni_w_d", + "llvm.loongarch.lsx.vssrarni.wu.d" => "__builtin_lsx_vssrarni_wu_d", + "llvm.loongarch.lsx.vssrln.b.h" => "__builtin_lsx_vssrln_b_h", + "llvm.loongarch.lsx.vssrln.bu.h" => "__builtin_lsx_vssrln_bu_h", + "llvm.loongarch.lsx.vssrln.h.w" => "__builtin_lsx_vssrln_h_w", + "llvm.loongarch.lsx.vssrln.hu.w" => "__builtin_lsx_vssrln_hu_w", + "llvm.loongarch.lsx.vssrln.w.d" => "__builtin_lsx_vssrln_w_d", + "llvm.loongarch.lsx.vssrln.wu.d" => "__builtin_lsx_vssrln_wu_d", + "llvm.loongarch.lsx.vssrlni.b.h" => "__builtin_lsx_vssrlni_b_h", + "llvm.loongarch.lsx.vssrlni.bu.h" => "__builtin_lsx_vssrlni_bu_h", + "llvm.loongarch.lsx.vssrlni.d.q" => "__builtin_lsx_vssrlni_d_q", + "llvm.loongarch.lsx.vssrlni.du.q" => "__builtin_lsx_vssrlni_du_q", + "llvm.loongarch.lsx.vssrlni.h.w" => "__builtin_lsx_vssrlni_h_w", + "llvm.loongarch.lsx.vssrlni.hu.w" => "__builtin_lsx_vssrlni_hu_w", + "llvm.loongarch.lsx.vssrlni.w.d" => "__builtin_lsx_vssrlni_w_d", + "llvm.loongarch.lsx.vssrlni.wu.d" => "__builtin_lsx_vssrlni_wu_d", + "llvm.loongarch.lsx.vssrlrn.b.h" => "__builtin_lsx_vssrlrn_b_h", + "llvm.loongarch.lsx.vssrlrn.bu.h" => "__builtin_lsx_vssrlrn_bu_h", + "llvm.loongarch.lsx.vssrlrn.h.w" => "__builtin_lsx_vssrlrn_h_w", + "llvm.loongarch.lsx.vssrlrn.hu.w" => "__builtin_lsx_vssrlrn_hu_w", + "llvm.loongarch.lsx.vssrlrn.w.d" => "__builtin_lsx_vssrlrn_w_d", + "llvm.loongarch.lsx.vssrlrn.wu.d" => "__builtin_lsx_vssrlrn_wu_d", + "llvm.loongarch.lsx.vssrlrni.b.h" => "__builtin_lsx_vssrlrni_b_h", + "llvm.loongarch.lsx.vssrlrni.bu.h" => "__builtin_lsx_vssrlrni_bu_h", + "llvm.loongarch.lsx.vssrlrni.d.q" => "__builtin_lsx_vssrlrni_d_q", + "llvm.loongarch.lsx.vssrlrni.du.q" => "__builtin_lsx_vssrlrni_du_q", + "llvm.loongarch.lsx.vssrlrni.h.w" => "__builtin_lsx_vssrlrni_h_w", + "llvm.loongarch.lsx.vssrlrni.hu.w" => "__builtin_lsx_vssrlrni_hu_w", + "llvm.loongarch.lsx.vssrlrni.w.d" => "__builtin_lsx_vssrlrni_w_d", + "llvm.loongarch.lsx.vssrlrni.wu.d" => "__builtin_lsx_vssrlrni_wu_d", + "llvm.loongarch.lsx.vssub.b" => "__builtin_lsx_vssub_b", + "llvm.loongarch.lsx.vssub.bu" => "__builtin_lsx_vssub_bu", + "llvm.loongarch.lsx.vssub.d" => "__builtin_lsx_vssub_d", + "llvm.loongarch.lsx.vssub.du" => "__builtin_lsx_vssub_du", + "llvm.loongarch.lsx.vssub.h" => "__builtin_lsx_vssub_h", + "llvm.loongarch.lsx.vssub.hu" => "__builtin_lsx_vssub_hu", + "llvm.loongarch.lsx.vssub.w" => "__builtin_lsx_vssub_w", + "llvm.loongarch.lsx.vssub.wu" => "__builtin_lsx_vssub_wu", + "llvm.loongarch.lsx.vst" => "__builtin_lsx_vst", + "llvm.loongarch.lsx.vstelm.b" => "__builtin_lsx_vstelm_b", + "llvm.loongarch.lsx.vstelm.d" => "__builtin_lsx_vstelm_d", + "llvm.loongarch.lsx.vstelm.h" => "__builtin_lsx_vstelm_h", + "llvm.loongarch.lsx.vstelm.w" => "__builtin_lsx_vstelm_w", + "llvm.loongarch.lsx.vstx" => "__builtin_lsx_vstx", + "llvm.loongarch.lsx.vsub.b" => "__builtin_lsx_vsub_b", + "llvm.loongarch.lsx.vsub.d" => "__builtin_lsx_vsub_d", + "llvm.loongarch.lsx.vsub.h" => "__builtin_lsx_vsub_h", + "llvm.loongarch.lsx.vsub.q" => "__builtin_lsx_vsub_q", + "llvm.loongarch.lsx.vsub.w" => "__builtin_lsx_vsub_w", + "llvm.loongarch.lsx.vsubi.bu" => "__builtin_lsx_vsubi_bu", + "llvm.loongarch.lsx.vsubi.du" => "__builtin_lsx_vsubi_du", + "llvm.loongarch.lsx.vsubi.hu" => "__builtin_lsx_vsubi_hu", + "llvm.loongarch.lsx.vsubi.wu" => "__builtin_lsx_vsubi_wu", + "llvm.loongarch.lsx.vsubwev.d.w" => "__builtin_lsx_vsubwev_d_w", + "llvm.loongarch.lsx.vsubwev.d.wu" => "__builtin_lsx_vsubwev_d_wu", + "llvm.loongarch.lsx.vsubwev.h.b" => "__builtin_lsx_vsubwev_h_b", + "llvm.loongarch.lsx.vsubwev.h.bu" => "__builtin_lsx_vsubwev_h_bu", + "llvm.loongarch.lsx.vsubwev.q.d" => "__builtin_lsx_vsubwev_q_d", + "llvm.loongarch.lsx.vsubwev.q.du" => "__builtin_lsx_vsubwev_q_du", + "llvm.loongarch.lsx.vsubwev.w.h" => "__builtin_lsx_vsubwev_w_h", + "llvm.loongarch.lsx.vsubwev.w.hu" => "__builtin_lsx_vsubwev_w_hu", + "llvm.loongarch.lsx.vsubwod.d.w" => "__builtin_lsx_vsubwod_d_w", + "llvm.loongarch.lsx.vsubwod.d.wu" => "__builtin_lsx_vsubwod_d_wu", + "llvm.loongarch.lsx.vsubwod.h.b" => "__builtin_lsx_vsubwod_h_b", + "llvm.loongarch.lsx.vsubwod.h.bu" => "__builtin_lsx_vsubwod_h_bu", + "llvm.loongarch.lsx.vsubwod.q.d" => "__builtin_lsx_vsubwod_q_d", + "llvm.loongarch.lsx.vsubwod.q.du" => "__builtin_lsx_vsubwod_q_du", + "llvm.loongarch.lsx.vsubwod.w.h" => "__builtin_lsx_vsubwod_w_h", + "llvm.loongarch.lsx.vsubwod.w.hu" => "__builtin_lsx_vsubwod_w_hu", + "llvm.loongarch.lsx.vxor.v" => "__builtin_lsx_vxor_v", + "llvm.loongarch.lsx.vxori.b" => "__builtin_lsx_vxori_b", "llvm.loongarch.movfcsr2gr" => "__builtin_loongarch_movfcsr2gr", "llvm.loongarch.movgr2fcsr" => "__builtin_loongarch_movgr2fcsr", "llvm.loongarch.syscall" => "__builtin_loongarch_syscall", @@ -4033,6 +5485,7 @@ match name { "llvm.ppc.maddhd" => "__builtin_ppc_maddhd", "llvm.ppc.maddhdu" => "__builtin_ppc_maddhdu", "llvm.ppc.maddld" => "__builtin_ppc_maddld", + "llvm.ppc.mffsl" => "__builtin_ppc_mffsl", "llvm.ppc.mfmsr" => "__builtin_ppc_mfmsr", "llvm.ppc.mftbu" => "__builtin_ppc_mftbu", "llvm.ppc.mtfsb0" => "__builtin_ppc_mtfsb0", @@ -7970,6 +9423,8 @@ match name { "llvm.x86.tpause" => "__builtin_ia32_tpause", "llvm.x86.umonitor" => "__builtin_ia32_umonitor", "llvm.x86.umwait" => "__builtin_ia32_umwait", + "llvm.x86.urdmsr" => "__builtin_ia32_urdmsr", + "llvm.x86.uwrmsr" => "__builtin_ia32_uwrmsr", "llvm.x86.vbcstnebf162ps128" => "__builtin_ia32_vbcstnebf162ps128", "llvm.x86.vbcstnebf162ps256" => "__builtin_ia32_vbcstnebf162ps256", "llvm.x86.vbcstnesh2ps128" => "__builtin_ia32_vbcstnesh2ps128", diff --git a/compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs b/compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs index 5996623bdc5..35eb4a11005 100644 --- a/compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs +++ b/compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs @@ -432,15 +432,21 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool { #[cfg(not(feature="master"))] pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> { - match name { - "llvm.x86.xgetbv" | "llvm.x86.sse2.pause" => { - let gcc_name = "__builtin_trap"; - let func = cx.context.get_builtin_function(gcc_name); - cx.functions.borrow_mut().insert(gcc_name.to_string(), func); - return func; - }, - _ => unimplemented!("unsupported LLVM intrinsic {}", name), - } + let gcc_name = + match name { + "llvm.x86.sse2.pause" => { + // NOTE: pause is only a hint, so we use a dummy built-in because target built-ins + // are not supported in libgccjit 12. + "__builtin_inff" + }, + "llvm.x86.xgetbv" => { + "__builtin_trap" + }, + _ => unimplemented!("unsupported LLVM intrinsic {}", name), + }; + let func = cx.context.get_builtin_function(gcc_name); + cx.functions.borrow_mut().insert(gcc_name.to_string(), func); + return func; } #[cfg(feature="master")] diff --git a/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs b/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs index 9caed459a29..ba1cae03f3e 100644 --- a/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs +++ b/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs @@ -4,7 +4,9 @@ mod simd; #[cfg(feature="master")] use std::iter; -use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType}; +#[cfg(feature="master")] +use gccjit::FunctionType; +use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp}; use rustc_codegen_ssa::MemFlags; use rustc_codegen_ssa::base::wants_msvc_seh; use rustc_codegen_ssa::common::IntPredicate; @@ -143,11 +145,15 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> { sym::volatile_load | sym::unaligned_volatile_load => { let tp_ty = fn_args.type_at(0); - let mut ptr = args[0].immediate(); - if let PassMode::Cast { cast: ty, .. } = &fn_abi.ret.mode { - ptr = self.pointercast(ptr, self.type_ptr_to(ty.gcc_type(self))); - } - let load = self.volatile_load(ptr.get_type(), ptr); + let ptr = args[0].immediate(); + let load = + if let PassMode::Cast { cast: ty, pad_i32: _ } = &fn_abi.ret.mode { + let gcc_ty = ty.gcc_type(self); + self.volatile_load(gcc_ty, ptr) + } + else { + self.volatile_load(self.layout_of(tp_ty).gcc_type(self), ptr) + }; // TODO(antoyo): set alignment. self.to_immediate(load, self.layout_of(tp_ty)) } @@ -819,75 +825,58 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { value }; - if value_type.is_u128(&self.cx) { - // TODO(antoyo): implement in the normal algorithm below to have a more efficient - // implementation (that does not require a call to __popcountdi2). - let popcount = self.context.get_builtin_function("__builtin_popcountll"); + // only break apart 128-bit ints if they're not natively supported + // TODO(antoyo): remove this if/when native 128-bit integers land in libgccjit + if value_type.is_u128(&self.cx) && !self.cx.supports_128bit_integers { let sixty_four = self.gcc_int(value_type, 64); let right_shift = self.gcc_lshr(value, sixty_four); let high = self.gcc_int_cast(right_shift, self.cx.ulonglong_type); - let high = self.context.new_call(None, popcount, &[high]); + let high = self.pop_count(high); let low = self.gcc_int_cast(value, self.cx.ulonglong_type); - let low = self.context.new_call(None, popcount, &[low]); + let low = self.pop_count(low); let res = high + low; return self.gcc_int_cast(res, result_type); } - // First step. - let mask = self.context.new_rvalue_from_long(value_type, 0x5555555555555555); - let left = value & mask; - let shifted = value >> self.context.new_rvalue_from_int(value_type, 1); - let right = shifted & mask; - let value = left + right; - - // Second step. - let mask = self.context.new_rvalue_from_long(value_type, 0x3333333333333333); - let left = value & mask; - let shifted = value >> self.context.new_rvalue_from_int(value_type, 2); - let right = shifted & mask; - let value = left + right; - - // Third step. - let mask = self.context.new_rvalue_from_long(value_type, 0x0F0F0F0F0F0F0F0F); - let left = value & mask; - let shifted = value >> self.context.new_rvalue_from_int(value_type, 4); - let right = shifted & mask; - let value = left + right; - - if value_type.is_u8(&self.cx) { - return self.context.new_cast(None, value, result_type); - } - - // Fourth step. - let mask = self.context.new_rvalue_from_long(value_type, 0x00FF00FF00FF00FF); - let left = value & mask; - let shifted = value >> self.context.new_rvalue_from_int(value_type, 8); - let right = shifted & mask; - let value = left + right; - - if value_type.is_u16(&self.cx) { - return self.context.new_cast(None, value, result_type); - } - - // Fifth step. - let mask = self.context.new_rvalue_from_long(value_type, 0x0000FFFF0000FFFF); - let left = value & mask; - let shifted = value >> self.context.new_rvalue_from_int(value_type, 16); - let right = shifted & mask; - let value = left + right; - - if value_type.is_u32(&self.cx) { - return self.context.new_cast(None, value, result_type); - } - - // Sixth step. - let mask = self.context.new_rvalue_from_long(value_type, 0x00000000FFFFFFFF); - let left = value & mask; - let shifted = value >> self.context.new_rvalue_from_int(value_type, 32); - let right = shifted & mask; - let value = left + right; - - self.context.new_cast(None, value, result_type) + // Use Wenger's algorithm for population count, gcc's seems to play better with it + // for (int counter = 0; value != 0; counter++) { + // value &= value - 1; + // } + let func = self.current_func.borrow().expect("func"); + let loop_head = func.new_block("head"); + let loop_body = func.new_block("body"); + let loop_tail = func.new_block("tail"); + + let counter_type = self.int_type; + let counter = self.current_func().new_local(None, counter_type, "popcount_counter"); + let val = self.current_func().new_local(None, value_type, "popcount_value"); + let zero = self.gcc_zero(counter_type); + self.llbb().add_assignment(None, counter, zero); + self.llbb().add_assignment(None, val, value); + self.br(loop_head); + + // check if value isn't zero + self.switch_to_block(loop_head); + let zero = self.gcc_zero(value_type); + let cond = self.gcc_icmp(IntPredicate::IntNE, val.to_rvalue(), zero); + self.cond_br(cond, loop_body, loop_tail); + + // val &= val - 1; + self.switch_to_block(loop_body); + let one = self.gcc_int(value_type, 1); + let sub = self.gcc_sub(val.to_rvalue(), one); + let op = self.gcc_and(val.to_rvalue(), sub); + loop_body.add_assignment(None, val, op); + + // counter += 1 + let one = self.gcc_int(counter_type, 1); + let op = self.gcc_add(counter.to_rvalue(), one); + loop_body.add_assignment(None, counter, op); + self.br(loop_head); + + // end of loop + self.switch_to_block(loop_tail); + self.gcc_int_cast(counter.to_rvalue(), result_type) } // Algorithm from: https://blog.regehr.org/archives/1063 @@ -947,15 +936,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { 128 => "__rust_i128_addo", _ => unreachable!(), }; - let param_a = self.context.new_parameter(None, result_type, "a"); - let param_b = self.context.new_parameter(None, result_type, "b"); - let result_field = self.context.new_field(None, result_type, "result"); - let overflow_field = self.context.new_field(None, self.bool_type, "overflow"); - let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]); - let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false); - let result = self.context.new_call(None, func, &[lhs, rhs]); - let overflow = result.access_field(None, overflow_field); - let int_result = result.access_field(None, result_field); + let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs); self.llbb().add_assignment(None, res, int_result); overflow }; @@ -1017,15 +998,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> { 128 => "__rust_i128_subo", _ => unreachable!(), }; - let param_a = self.context.new_parameter(None, result_type, "a"); - let param_b = self.context.new_parameter(None, result_type, "b"); - let result_field = self.context.new_field(None, result_type, "result"); - let overflow_field = self.context.new_field(None, self.bool_type, "overflow"); - let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]); - let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false); - let result = self.context.new_call(None, func, &[lhs, rhs]); - let overflow = result.access_field(None, overflow_field); - let int_result = result.access_field(None, result_field); + let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs); self.llbb().add_assignment(None, res, int_result); overflow }; @@ -1197,7 +1170,7 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut #[cfg(feature="master")] fn gen_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, name: &str, rust_fn_sig: ty::PolyFnSig<'tcx>, codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>)) -> (Type<'gcc>, Function<'gcc>) { let fn_abi = cx.fn_abi_of_fn_ptr(rust_fn_sig, ty::List::empty()); - let (typ, _, _, _) = fn_abi.gcc_type(cx); + let return_type = fn_abi.gcc_type(cx).return_type; // FIXME(eddyb) find a nicer way to do this. cx.linkage.set(FunctionType::Internal); let func = cx.declare_fn(name, fn_abi); @@ -1207,5 +1180,5 @@ fn gen_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, name: &str, rust_fn_sig let block = Builder::append_block(cx, func_val, "entry-block"); let bx = Builder::build(cx, block); codegen(bx); - (typ, func) + (return_type, func) } diff --git a/compiler/rustc_codegen_gcc/src/lib.rs b/compiler/rustc_codegen_gcc/src/lib.rs index 6aa5b6bd1ff..a530fc994a2 100644 --- a/compiler/rustc_codegen_gcc/src/lib.rs +++ b/compiler/rustc_codegen_gcc/src/lib.rs @@ -12,6 +12,7 @@ * TODO(antoyo): remove the patches. */ +#![cfg_attr(not(bootstrap), allow(internal_features))] #![cfg_attr(not(bootstrap), doc(rust_logo))] #![cfg_attr(not(bootstrap), feature(rustdoc_internals))] #![feature( @@ -251,8 +252,9 @@ impl ExtraBackendMethods for GccCodegenBackend { temp_dir: None, }; - // TODO(antoyo): only set for x86. - mods.context.add_command_line_option("-masm=intel"); + if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" { + mods.context.add_command_line_option("-masm=intel"); + } unsafe { allocator::codegen(tcx, &mut mods, module_name, kind, alloc_error_handler_kind); } mods } diff --git a/compiler/rustc_codegen_gcc/src/type_.rs b/compiler/rustc_codegen_gcc/src/type_.rs index 31899740514..7a89fe81d38 100644 --- a/compiler/rustc_codegen_gcc/src/type_.rs +++ b/compiler/rustc_codegen_gcc/src/type_.rs @@ -119,11 +119,11 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> { } fn type_f32(&self) -> Type<'gcc> { - self.context.new_type::<f32>() + self.float_type } fn type_f64(&self) -> Type<'gcc> { - self.context.new_type::<f64>() + self.double_type } fn type_func(&self, params: &[Type<'gcc>], return_type: Type<'gcc>) -> Type<'gcc> { @@ -216,17 +216,17 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> { value.get_type() } - fn type_array(&self, ty: Type<'gcc>, len: u64) -> Type<'gcc> { - // TODO: remove this as well? - /*if let Some(struct_type) = ty.is_struct() { + #[cfg_attr(feature="master", allow(unused_mut))] + fn type_array(&self, ty: Type<'gcc>, mut len: u64) -> Type<'gcc> { + #[cfg(not(feature="master"))] + if let Some(struct_type) = ty.is_struct() { if struct_type.get_field_count() == 0 { // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a // size of usize::MAX in test_binary_search, we workaround this by setting the size to // zero for ZSTs. - // FIXME(antoyo): fix gccjit API. len = 0; } - }*/ + } self.context.new_array_type(None, ty, len) } diff --git a/compiler/rustc_codegen_gcc/src/type_of.rs b/compiler/rustc_codegen_gcc/src/type_of.rs index 357ce622659..479a814788a 100644 --- a/compiler/rustc_codegen_gcc/src/type_of.rs +++ b/compiler/rustc_codegen_gcc/src/type_of.rs @@ -9,7 +9,7 @@ use rustc_middle::ty::print::with_no_trimmed_paths; use rustc_target::abi::{self, Abi, Align, F32, F64, FieldsShape, Int, Integer, Pointer, PointeeInfo, Size, TyAbiInterface, Variants}; use rustc_target::abi::call::{CastTarget, FnAbi, Reg}; -use crate::abi::{FnAbiGccExt, GccType}; +use crate::abi::{FnAbiGcc, FnAbiGccExt, GccType}; use crate::context::CodegenCx; use crate::type_::struct_fields; @@ -372,7 +372,13 @@ impl<'gcc, 'tcx> LayoutTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> { } fn fn_decl_backend_type(&self, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Type<'gcc> { - let (return_type, param_types, variadic, _) = fn_abi.gcc_type(self); - self.context.new_function_pointer_type(None, return_type, ¶m_types, variadic) + // FIXME(antoyo): Should we do something with `FnAbiGcc::fn_attributes`? + let FnAbiGcc { + return_type, + arguments_type, + is_c_variadic, + .. + } = fn_abi.gcc_type(self); + self.context.new_function_pointer_type(None, return_type, &arguments_type, is_c_variadic) } } | 
