diff options
Diffstat (limited to 'compiler/rustc_hir_analysis/src')
| -rw-r--r-- | compiler/rustc_hir_analysis/src/astconv/mod.rs | 5 | ||||
| -rw-r--r-- | compiler/rustc_hir_analysis/src/check/intrinsic.rs | 74 |
2 files changed, 74 insertions, 5 deletions
diff --git a/compiler/rustc_hir_analysis/src/astconv/mod.rs b/compiler/rustc_hir_analysis/src/astconv/mod.rs index 218891a7c67..b8cf72c2c73 100644 --- a/compiler/rustc_hir_analysis/src/astconv/mod.rs +++ b/compiler/rustc_hir_analysis/src/astconv/mod.rs @@ -860,10 +860,7 @@ impl<'o, 'tcx> dyn AstConv<'tcx> + 'o { traits with associated type `{name}`, you could use the \ fully-qualified path", ), - traits - .iter() - .map(|trait_str| format!("<Example as {trait_str}>::{name}")) - .collect::<Vec<_>>(), + traits.iter().map(|trait_str| format!("<Example as {trait_str}>::{name}")), Applicability::HasPlaceholders, ); } diff --git a/compiler/rustc_hir_analysis/src/check/intrinsic.rs b/compiler/rustc_hir_analysis/src/check/intrinsic.rs index 6e9b4236e20..9d8eb6ad60b 100644 --- a/compiler/rustc_hir_analysis/src/check/intrinsic.rs +++ b/compiler/rustc_hir_analysis/src/check/intrinsic.rs @@ -112,11 +112,15 @@ pub fn intrinsic_operation_unsafety(tcx: TyCtxt<'_>, intrinsic_id: LocalDefId) - | sym::likely | sym::unlikely | sym::ptr_guaranteed_cmp + | sym::minnumf16 | sym::minnumf32 | sym::minnumf64 + | sym::minnumf128 + | sym::maxnumf16 | sym::maxnumf32 - | sym::rustc_peek | sym::maxnumf64 + | sym::maxnumf128 + | sym::rustc_peek | sym::type_name | sym::forget | sym::black_box @@ -302,50 +306,118 @@ pub fn check_intrinsic_type( ], Ty::new_unit(tcx), ), + + sym::sqrtf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::sqrtf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::sqrtf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::sqrtf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::powif16 => (0, 0, vec![tcx.types.f16, tcx.types.i32], tcx.types.f16), sym::powif32 => (0, 0, vec![tcx.types.f32, tcx.types.i32], tcx.types.f32), sym::powif64 => (0, 0, vec![tcx.types.f64, tcx.types.i32], tcx.types.f64), + sym::powif128 => (0, 0, vec![tcx.types.f128, tcx.types.i32], tcx.types.f128), + + sym::sinf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::sinf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::sinf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::sinf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::cosf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::cosf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::cosf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::cosf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::powf16 => (0, 0, vec![tcx.types.f16, tcx.types.f16], tcx.types.f16), sym::powf32 => (0, 0, vec![tcx.types.f32, tcx.types.f32], tcx.types.f32), sym::powf64 => (0, 0, vec![tcx.types.f64, tcx.types.f64], tcx.types.f64), + sym::powf128 => (0, 0, vec![tcx.types.f128, tcx.types.f128], tcx.types.f128), + + sym::expf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::expf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::expf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::expf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::exp2f16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::exp2f32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::exp2f64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::exp2f128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::logf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::logf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::logf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::logf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::log10f16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::log10f32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::log10f64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::log10f128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::log2f16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::log2f32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::log2f64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::log2f128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::fmaf16 => (0, 0, vec![tcx.types.f16, tcx.types.f16, tcx.types.f16], tcx.types.f16), sym::fmaf32 => (0, 0, vec![tcx.types.f32, tcx.types.f32, tcx.types.f32], tcx.types.f32), sym::fmaf64 => (0, 0, vec![tcx.types.f64, tcx.types.f64, tcx.types.f64], tcx.types.f64), + sym::fmaf128 => { + (0, 0, vec![tcx.types.f128, tcx.types.f128, tcx.types.f128], tcx.types.f128) + } + + sym::fabsf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::fabsf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::fabsf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::fabsf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::minnumf16 => (0, 0, vec![tcx.types.f16, tcx.types.f16], tcx.types.f16), sym::minnumf32 => (0, 0, vec![tcx.types.f32, tcx.types.f32], tcx.types.f32), sym::minnumf64 => (0, 0, vec![tcx.types.f64, tcx.types.f64], tcx.types.f64), + sym::minnumf128 => (0, 0, vec![tcx.types.f128, tcx.types.f128], tcx.types.f128), + + sym::maxnumf16 => (0, 0, vec![tcx.types.f16, tcx.types.f16], tcx.types.f16), sym::maxnumf32 => (0, 0, vec![tcx.types.f32, tcx.types.f32], tcx.types.f32), sym::maxnumf64 => (0, 0, vec![tcx.types.f64, tcx.types.f64], tcx.types.f64), + sym::maxnumf128 => (0, 0, vec![tcx.types.f128, tcx.types.f128], tcx.types.f128), + + sym::copysignf16 => (0, 0, vec![tcx.types.f16, tcx.types.f16], tcx.types.f16), sym::copysignf32 => (0, 0, vec![tcx.types.f32, tcx.types.f32], tcx.types.f32), sym::copysignf64 => (0, 0, vec![tcx.types.f64, tcx.types.f64], tcx.types.f64), + sym::copysignf128 => (0, 0, vec![tcx.types.f128, tcx.types.f128], tcx.types.f128), + + sym::floorf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::floorf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::floorf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::floorf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::ceilf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::ceilf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::ceilf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::ceilf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::truncf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::truncf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::truncf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::truncf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::rintf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::rintf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::rintf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::rintf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::nearbyintf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::nearbyintf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::nearbyintf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::nearbyintf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::roundf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::roundf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::roundf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::roundf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), + + sym::roundevenf16 => (0, 0, vec![tcx.types.f16], tcx.types.f16), sym::roundevenf32 => (0, 0, vec![tcx.types.f32], tcx.types.f32), sym::roundevenf64 => (0, 0, vec![tcx.types.f64], tcx.types.f64), + sym::roundevenf128 => (0, 0, vec![tcx.types.f128], tcx.types.f128), sym::volatile_load | sym::unaligned_volatile_load => { (1, 0, vec![Ty::new_imm_ptr(tcx, param(0))], param(0)) |