diff options
Diffstat (limited to 'compiler/rustc_target/src')
| -rw-r--r-- | compiler/rustc_target/src/abi/call/loongarch.rs | 4 | ||||
| -rw-r--r-- | compiler/rustc_target/src/abi/call/mod.rs | 15 | ||||
| -rw-r--r-- | compiler/rustc_target/src/abi/call/riscv.rs | 4 | ||||
| -rw-r--r-- | compiler/rustc_target/src/abi/mod.rs | 5 | ||||
| -rw-r--r-- | compiler/rustc_target/src/asm/aarch64.rs | 2 | ||||
| -rw-r--r-- | compiler/rustc_target/src/asm/arm.rs | 2 | ||||
| -rw-r--r-- | compiler/rustc_target/src/asm/mod.rs | 14 | ||||
| -rw-r--r-- | compiler/rustc_target/src/asm/x86.rs | 30 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/aarch64_fuchsia.rs | 16 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/aarch64_unknown_fuchsia.rs | 17 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/apple_base.rs | 10 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/armv7_sony_vita_newlibeabihf.rs | 40 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/bpf_base.rs | 6 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/mod.rs | 24 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/solid_base.rs | 2 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/x86_64_fuchsia.rs | 19 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/x86_64_unknown_fuchsia.rs | 18 |
17 files changed, 138 insertions, 90 deletions
diff --git a/compiler/rustc_target/src/abi/call/loongarch.rs b/compiler/rustc_target/src/abi/call/loongarch.rs index d29b479de5d..4a2d39cc700 100644 --- a/compiler/rustc_target/src/abi/call/loongarch.rs +++ b/compiler/rustc_target/src/abi/call/loongarch.rs @@ -19,7 +19,7 @@ enum FloatConv { #[derive(Copy, Clone)] struct CannotUseFpConv; -fn is_loongarch_aggregate<'a, Ty>(arg: &ArgAbi<'a, Ty>) -> bool { +fn is_loongarch_aggregate<Ty>(arg: &ArgAbi<'_, Ty>) -> bool { match arg.layout.abi { Abi::Vector { .. } => true, _ => arg.layout.is_aggregate(), @@ -290,7 +290,7 @@ fn classify_arg<'a, Ty, C>( } } -fn extend_integer_width<'a, Ty>(arg: &mut ArgAbi<'a, Ty>, xlen: u64) { +fn extend_integer_width<Ty>(arg: &mut ArgAbi<'_, Ty>, xlen: u64) { if let Abi::Scalar(scalar) = arg.layout.abi { if let abi::Int(i, _) = scalar.primitive() { // 32-bit integers are always sign-extended diff --git a/compiler/rustc_target/src/abi/call/mod.rs b/compiler/rustc_target/src/abi/call/mod.rs index a5ffaebea0b..3b8c867d35b 100644 --- a/compiler/rustc_target/src/abi/call/mod.rs +++ b/compiler/rustc_target/src/abi/call/mod.rs @@ -71,12 +71,7 @@ mod attr_impl { const NonNull = 1 << 3; const ReadOnly = 1 << 4; const InReg = 1 << 5; - // Due to past miscompiles in LLVM, we use a separate attribute for - // &mut arguments, so that the codegen backend can decide whether - // or not to actually emit the attribute. It can also be controlled - // with the `-Zmutable-noalias` debugging option. - const NoAliasMutRef = 1 << 6; - const NoUndef = 1 << 7; + const NoUndef = 1 << 6; } } } @@ -177,12 +172,12 @@ impl Reg { 17..=32 => dl.i32_align.abi, 33..=64 => dl.i64_align.abi, 65..=128 => dl.i128_align.abi, - _ => panic!("unsupported integer: {:?}", self), + _ => panic!("unsupported integer: {self:?}"), }, RegKind::Float => match self.size.bits() { 32 => dl.f32_align.abi, 64 => dl.f64_align.abi, - _ => panic!("unsupported float: {:?}", self), + _ => panic!("unsupported float: {self:?}"), }, RegKind::Vector => dl.vector_align(self.size).abi, } @@ -642,7 +637,7 @@ impl fmt::Display for AdjustForForeignAbiError { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { match self { Self::Unsupported { arch, abi } => { - write!(f, "target architecture {:?} does not support `extern {}` ABI", arch, abi) + write!(f, "target architecture {arch:?} does not support `extern {abi}` ABI") } } } @@ -760,7 +755,7 @@ impl FromStr for Conv { "AmdGpuKernel" => Ok(Conv::AmdGpuKernel), "AvrInterrupt" => Ok(Conv::AvrInterrupt), "AvrNonBlockingInterrupt" => Ok(Conv::AvrNonBlockingInterrupt), - _ => Err(format!("'{}' is not a valid value for entry function call convetion.", s)), + _ => Err(format!("'{s}' is not a valid value for entry function call convetion.")), } } } diff --git a/compiler/rustc_target/src/abi/call/riscv.rs b/compiler/rustc_target/src/abi/call/riscv.rs index 1cb360f834e..34280d38e34 100644 --- a/compiler/rustc_target/src/abi/call/riscv.rs +++ b/compiler/rustc_target/src/abi/call/riscv.rs @@ -25,7 +25,7 @@ enum FloatConv { #[derive(Copy, Clone)] struct CannotUseFpConv; -fn is_riscv_aggregate<'a, Ty>(arg: &ArgAbi<'a, Ty>) -> bool { +fn is_riscv_aggregate<Ty>(arg: &ArgAbi<'_, Ty>) -> bool { match arg.layout.abi { Abi::Vector { .. } => true, _ => arg.layout.is_aggregate(), @@ -296,7 +296,7 @@ fn classify_arg<'a, Ty, C>( } } -fn extend_integer_width<'a, Ty>(arg: &mut ArgAbi<'a, Ty>, xlen: u64) { +fn extend_integer_width<Ty>(arg: &mut ArgAbi<'_, Ty>, xlen: u64) { if let Abi::Scalar(scalar) = arg.layout.abi { if let abi::Int(i, _) = scalar.primitive() { // 32-bit integers are always sign-extended diff --git a/compiler/rustc_target/src/abi/mod.rs b/compiler/rustc_target/src/abi/mod.rs index 53c9878ab87..88a0a1f8ecf 100644 --- a/compiler/rustc_target/src/abi/mod.rs +++ b/compiler/rustc_target/src/abi/mod.rs @@ -20,9 +20,8 @@ impl ToJson for Endian { } rustc_index::newtype_index! { - pub struct VariantIdx { - derive [HashStable_Generic] - } + #[derive(HashStable_Generic)] + pub struct VariantIdx {} } #[derive(Copy, Clone, PartialEq, Eq, Hash, HashStable_Generic)] diff --git a/compiler/rustc_target/src/asm/aarch64.rs b/compiler/rustc_target/src/asm/aarch64.rs index 62a0f9fb034..28493c7700f 100644 --- a/compiler/rustc_target/src/asm/aarch64.rs +++ b/compiler/rustc_target/src/asm/aarch64.rs @@ -195,6 +195,6 @@ impl AArch64InlineAsmReg { (modifier.unwrap_or('v'), self as u32 - Self::v0 as u32) }; assert!(index < 32); - write!(out, "{}{}", prefix, index) + write!(out, "{prefix}{index}") } } diff --git a/compiler/rustc_target/src/asm/arm.rs b/compiler/rustc_target/src/asm/arm.rs index 0db3eb6fcac..ec7429a3065 100644 --- a/compiler/rustc_target/src/asm/arm.rs +++ b/compiler/rustc_target/src/asm/arm.rs @@ -249,7 +249,7 @@ impl ArmInlineAsmReg { let index = self as u32 - Self::q0 as u32; assert!(index < 16); let index = index * 2 + (modifier == 'f') as u32; - write!(out, "d{}", index) + write!(out, "d{index}") } else { out.write_str(self.name()) } diff --git a/compiler/rustc_target/src/asm/mod.rs b/compiler/rustc_target/src/asm/mod.rs index 65d2cd64bf6..7f01f33d39c 100644 --- a/compiler/rustc_target/src/asm/mod.rs +++ b/compiler/rustc_target/src/asm/mod.rs @@ -679,13 +679,13 @@ impl fmt::Display for InlineAsmType { Self::I128 => f.write_str("i128"), Self::F32 => f.write_str("f32"), Self::F64 => f.write_str("f64"), - Self::VecI8(n) => write!(f, "i8x{}", n), - Self::VecI16(n) => write!(f, "i16x{}", n), - Self::VecI32(n) => write!(f, "i32x{}", n), - Self::VecI64(n) => write!(f, "i64x{}", n), - Self::VecI128(n) => write!(f, "i128x{}", n), - Self::VecF32(n) => write!(f, "f32x{}", n), - Self::VecF64(n) => write!(f, "f64x{}", n), + Self::VecI8(n) => write!(f, "i8x{n}"), + Self::VecI16(n) => write!(f, "i16x{n}"), + Self::VecI32(n) => write!(f, "i32x{n}"), + Self::VecI64(n) => write!(f, "i64x{n}"), + Self::VecI128(n) => write!(f, "i128x{n}"), + Self::VecF32(n) => write!(f, "f32x{n}"), + Self::VecF64(n) => write!(f, "f64x{n}"), } } } diff --git a/compiler/rustc_target/src/asm/x86.rs b/compiler/rustc_target/src/asm/x86.rs index 238c365093f..5eae07f141f 100644 --- a/compiler/rustc_target/src/asm/x86.rs +++ b/compiler/rustc_target/src/asm/x86.rs @@ -357,28 +357,28 @@ impl X86InlineAsmReg { if self as u32 <= Self::dx as u32 { let root = ['a', 'b', 'c', 'd'][self as usize - Self::ax as usize]; match modifier.unwrap_or(reg_default_modifier) { - 'l' => write!(out, "{}l", root), - 'h' => write!(out, "{}h", root), - 'x' => write!(out, "{}x", root), - 'e' => write!(out, "e{}x", root), - 'r' => write!(out, "r{}x", root), + 'l' => write!(out, "{root}l"), + 'h' => write!(out, "{root}h"), + 'x' => write!(out, "{root}x"), + 'e' => write!(out, "e{root}x"), + 'r' => write!(out, "r{root}x"), _ => unreachable!(), } } else if self as u32 <= Self::di as u32 { let root = self.name(); match modifier.unwrap_or(reg_default_modifier) { - 'l' => write!(out, "{}l", root), - 'x' => write!(out, "{}", root), - 'e' => write!(out, "e{}", root), - 'r' => write!(out, "r{}", root), + 'l' => write!(out, "{root}l"), + 'x' => write!(out, "{root}"), + 'e' => write!(out, "e{root}"), + 'r' => write!(out, "r{root}"), _ => unreachable!(), } } else if self as u32 <= Self::r15 as u32 { let root = self.name(); match modifier.unwrap_or(reg_default_modifier) { - 'l' => write!(out, "{}b", root), - 'x' => write!(out, "{}w", root), - 'e' => write!(out, "{}d", root), + 'l' => write!(out, "{root}b"), + 'x' => write!(out, "{root}w"), + 'e' => write!(out, "{root}d"), 'r' => out.write_str(root), _ => unreachable!(), } @@ -387,15 +387,15 @@ impl X86InlineAsmReg { } else if self as u32 <= Self::xmm15 as u32 { let prefix = modifier.unwrap_or('x'); let index = self as u32 - Self::xmm0 as u32; - write!(out, "{}{}", prefix, index) + write!(out, "{prefix}{index}") } else if self as u32 <= Self::ymm15 as u32 { let prefix = modifier.unwrap_or('y'); let index = self as u32 - Self::ymm0 as u32; - write!(out, "{}{}", prefix, index) + write!(out, "{prefix}{index}") } else if self as u32 <= Self::zmm31 as u32 { let prefix = modifier.unwrap_or('z'); let index = self as u32 - Self::zmm0 as u32; - write!(out, "{}{}", prefix, index) + write!(out, "{prefix}{index}") } else { out.write_str(self.name()) } diff --git a/compiler/rustc_target/src/spec/aarch64_fuchsia.rs b/compiler/rustc_target/src/spec/aarch64_fuchsia.rs index 4634433c4a9..ddecbb1a8c4 100644 --- a/compiler/rustc_target/src/spec/aarch64_fuchsia.rs +++ b/compiler/rustc_target/src/spec/aarch64_fuchsia.rs @@ -1,15 +1 @@ -use crate::spec::{SanitizerSet, Target, TargetOptions}; - -pub fn target() -> Target { - Target { - llvm_target: "aarch64-fuchsia".into(), - pointer_width: 64, - data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), - arch: "aarch64".into(), - options: TargetOptions { - max_atomic_width: Some(128), - supported_sanitizers: SanitizerSet::ADDRESS | SanitizerSet::CFI, - ..super::fuchsia_base::opts() - }, - } -} +pub use crate::spec::aarch64_unknown_fuchsia::target; diff --git a/compiler/rustc_target/src/spec/aarch64_unknown_fuchsia.rs b/compiler/rustc_target/src/spec/aarch64_unknown_fuchsia.rs new file mode 100644 index 00000000000..ef2ab304f9e --- /dev/null +++ b/compiler/rustc_target/src/spec/aarch64_unknown_fuchsia.rs @@ -0,0 +1,17 @@ +use crate::spec::{SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-fuchsia".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + max_atomic_width: Some(128), + supported_sanitizers: SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::SHADOWCALLSTACK, + ..super::fuchsia_base::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/apple_base.rs b/compiler/rustc_target/src/spec/apple_base.rs index 44644c4733e..5c6dcc0aba9 100644 --- a/compiler/rustc_target/src/spec/apple_base.rs +++ b/compiler/rustc_target/src/spec/apple_base.rs @@ -76,7 +76,7 @@ impl Arch { fn pre_link_args(os: &'static str, arch: Arch, abi: &'static str) -> LinkArgs { let platform_name: StaticCow<str> = match abi { - "sim" => format!("{}-simulator", os).into(), + "sim" => format!("{os}-simulator").into(), "macabi" => "mac-catalyst".into(), _ => os.into(), }; @@ -193,7 +193,7 @@ fn macos_deployment_target(arch: Arch) -> (u32, u32) { fn macos_lld_platform_version(arch: Arch) -> String { let (major, minor) = macos_deployment_target(arch); - format!("{}.{}", major, minor) + format!("{major}.{minor}") } pub fn macos_llvm_target(arch: Arch) -> String { @@ -252,7 +252,7 @@ pub fn ios_llvm_target(arch: Arch) -> String { fn ios_lld_platform_version() -> String { let (major, minor) = ios_deployment_target(); - format!("{}.{}", major, minor) + format!("{major}.{minor}") } pub fn ios_sim_llvm_target(arch: Arch) -> String { @@ -266,7 +266,7 @@ fn tvos_deployment_target() -> (u32, u32) { fn tvos_lld_platform_version() -> String { let (major, minor) = tvos_deployment_target(); - format!("{}.{}", major, minor) + format!("{major}.{minor}") } fn watchos_deployment_target() -> (u32, u32) { @@ -275,7 +275,7 @@ fn watchos_deployment_target() -> (u32, u32) { fn watchos_lld_platform_version() -> String { let (major, minor) = watchos_deployment_target(); - format!("{}.{}", major, minor) + format!("{major}.{minor}") } pub fn watchos_sim_llvm_target(arch: Arch) -> String { diff --git a/compiler/rustc_target/src/spec/armv7_sony_vita_newlibeabihf.rs b/compiler/rustc_target/src/spec/armv7_sony_vita_newlibeabihf.rs new file mode 100644 index 00000000000..ebd2cca25ea --- /dev/null +++ b/compiler/rustc_target/src/spec/armv7_sony_vita_newlibeabihf.rs @@ -0,0 +1,40 @@ +use crate::abi::Endian; +use crate::spec::{cvs, Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +/// A base target for PlayStation Vita devices using the VITASDK toolchain (using newlib). +/// +/// Requires the VITASDK toolchain on the host system. + +pub fn target() -> Target { + let pre_link_args = TargetOptions::link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-Wl,-q"]); + + Target { + llvm_target: "armv7a-vita-newlibeabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + os: "vita".into(), + endian: Endian::Little, + c_int_width: "32".into(), + dynamic_linking: false, + env: "newlib".into(), + vendor: "sony".into(), + abi: "eabihf".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No), + no_default_libraries: false, + cpu: "cortex-a9".into(), + executables: true, + families: cvs!["unix"], + linker: Some("arm-vita-eabi-gcc".into()), + relocation_model: RelocModel::Static, + features: "+v7,+neon".into(), + pre_link_args, + exe_suffix: ".elf".into(), + panic_strategy: PanicStrategy::Abort, + max_atomic_width: Some(32), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/bpf_base.rs b/compiler/rustc_target/src/spec/bpf_base.rs index baf36587147..2b00cda44b5 100644 --- a/compiler/rustc_target/src/spec/bpf_base.rs +++ b/compiler/rustc_target/src/spec/bpf_base.rs @@ -6,7 +6,7 @@ pub fn opts(endian: Endian) -> TargetOptions { allow_asm: true, endian, linker_flavor: LinkerFlavor::Bpf, - atomic_cas: false, + atomic_cas: true, dynamic_linking: true, no_builtins: true, panic_strategy: PanicStrategy::Abort, @@ -19,6 +19,10 @@ pub fn opts(endian: Endian) -> TargetOptions { obj_is_bitcode: true, requires_lto: false, singlethread: true, + // When targeting the `v3` cpu in llvm, 32-bit atomics are also supported. + // But making this value change based on the target cpu can be mostly confusing + // and would require a bit of a refactor. + min_atomic_width: Some(64), max_atomic_width: Some(64), ..Default::default() } diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs index be994eda14c..1e80b8b759d 100644 --- a/compiler/rustc_target/src/spec/mod.rs +++ b/compiler/rustc_target/src/spec/mod.rs @@ -840,7 +840,7 @@ impl fmt::Display for SanitizerSet { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { let mut first = true; for s in *self { - let name = s.as_str().unwrap_or_else(|| panic!("unrecognized sanitizer {:?}", s)); + let name = s.as_str().unwrap_or_else(|| panic!("unrecognized sanitizer {s:?}")); if !first { f.write_str(", ")?; } @@ -981,7 +981,7 @@ impl fmt::Display for StackProtector { } macro_rules! supported_targets { - ( $(($triple:literal, $module:ident ),)+ ) => { + ( $(($triple:literal, $module:ident),)+ ) => { $(mod $module;)+ /// List of supported targets @@ -1109,8 +1109,12 @@ supported_targets! { ("x86_64-apple-darwin", x86_64_apple_darwin), ("i686-apple-darwin", i686_apple_darwin), + // FIXME(#106649): Remove aarch64-fuchsia in favor of aarch64-unknown-fuchsia ("aarch64-fuchsia", aarch64_fuchsia), + ("aarch64-unknown-fuchsia", aarch64_unknown_fuchsia), + // FIXME(#106649): Remove x86_64-fuchsia in favor of x86_64-unknown-fuchsia ("x86_64-fuchsia", x86_64_fuchsia), + ("x86_64-unknown-fuchsia", x86_64_unknown_fuchsia), ("avr-unknown-gnu-atmega328", avr_unknown_gnu_atmega328), @@ -1241,6 +1245,8 @@ supported_targets! { ("aarch64-nintendo-switch-freestanding", aarch64_nintendo_switch_freestanding), + ("armv7-sony-vita-newlibeabihf", armv7_sony_vita_newlibeabihf), + ("armv7-unknown-linux-uclibceabi", armv7_unknown_linux_uclibceabi), ("armv7-unknown-linux-uclibceabihf", armv7_unknown_linux_uclibceabihf), @@ -1319,7 +1325,7 @@ pub struct Target { } impl Target { - pub fn parse_data_layout<'a>(&'a self) -> Result<TargetDataLayout, TargetDataLayoutErrors<'a>> { + pub fn parse_data_layout(&self) -> Result<TargetDataLayout, TargetDataLayoutErrors<'_>> { let mut dl = TargetDataLayout::parse_from_llvm_datalayout_string(&self.data_layout)?; // Perform consistency checks against the Target information. @@ -2072,7 +2078,7 @@ impl Target { let mut get_req_field = |name: &str| { obj.remove(name) .and_then(|j| j.as_str().map(str::to_string)) - .ok_or_else(|| format!("Field {} in target specification is required", name)) + .ok_or_else(|| format!("Field {name} in target specification is required")) }; let mut base = Target { @@ -2291,7 +2297,7 @@ impl Target { } else { return Some(Err(format!( "'{}' is not a valid value for lld-flavor. \ - Use 'darwin', 'gnu', 'link' or 'wasm.", + Use 'darwin', 'gnu', 'link' or 'wasm'.", s))) } Some(Ok(())) @@ -2478,7 +2484,7 @@ impl Target { if let Some(s) = fp.as_str() { base.frame_pointer = s .parse() - .map_err(|()| format!("'{}' is not a valid value for frame-pointer", s))?; + .map_err(|()| format!("'{s}' is not a valid value for frame-pointer"))?; } else { incorrect_type.push("frame-pointer".into()) } @@ -2670,7 +2676,7 @@ impl Target { return load_file(&p); } - Err(format!("Could not find specification for target {:?}", target_triple)) + Err(format!("Could not find specification for target {target_triple:?}")) } TargetTriple::TargetJson { ref contents, .. } => { let obj = serde_json::from_str(contents).map_err(|e| e.to_string())?; @@ -2934,7 +2940,7 @@ impl TargetTriple { let contents = std::fs::read_to_string(&canonicalized_path).map_err(|err| { io::Error::new( io::ErrorKind::InvalidInput, - format!("target path {:?} is not a valid file: {}", canonicalized_path, err), + format!("target path {canonicalized_path:?} is not a valid file: {err}"), ) })?; let triple = canonicalized_path @@ -2969,7 +2975,7 @@ impl TargetTriple { let mut hasher = DefaultHasher::new(); content.hash(&mut hasher); let hash = hasher.finish(); - format!("{}-{}", triple, hash) + format!("{triple}-{hash}") } } } diff --git a/compiler/rustc_target/src/spec/solid_base.rs b/compiler/rustc_target/src/spec/solid_base.rs index c585a6cd58e..eaf72b7616c 100644 --- a/compiler/rustc_target/src/spec/solid_base.rs +++ b/compiler/rustc_target/src/spec/solid_base.rs @@ -3,7 +3,7 @@ use crate::spec::TargetOptions; pub fn opts(kernel: &str) -> TargetOptions { TargetOptions { - os: format!("solid_{}", kernel).into(), + os: format!("solid_{kernel}").into(), vendor: "kmc".into(), executables: false, frame_pointer: FramePointer::NonLeaf, diff --git a/compiler/rustc_target/src/spec/x86_64_fuchsia.rs b/compiler/rustc_target/src/spec/x86_64_fuchsia.rs index 532dd6d0742..96fed097566 100644 --- a/compiler/rustc_target/src/spec/x86_64_fuchsia.rs +++ b/compiler/rustc_target/src/spec/x86_64_fuchsia.rs @@ -1,18 +1 @@ -use crate::spec::{SanitizerSet, StackProbeType, Target}; - -pub fn target() -> Target { - let mut base = super::fuchsia_base::opts(); - base.cpu = "x86-64".into(); - base.max_atomic_width = Some(64); - base.stack_probes = StackProbeType::X86; - base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::CFI; - - Target { - llvm_target: "x86_64-fuchsia".into(), - pointer_width: 64, - data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" - .into(), - arch: "x86_64".into(), - options: base, - } -} +pub use crate::spec::x86_64_unknown_fuchsia::target; diff --git a/compiler/rustc_target/src/spec/x86_64_unknown_fuchsia.rs b/compiler/rustc_target/src/spec/x86_64_unknown_fuchsia.rs new file mode 100644 index 00000000000..a3231d19f4c --- /dev/null +++ b/compiler/rustc_target/src/spec/x86_64_unknown_fuchsia.rs @@ -0,0 +1,18 @@ +use crate::spec::{SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = super::fuchsia_base::opts(); + base.cpu = "x86-64".into(); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::X86; + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::CFI; + + Target { + llvm_target: "x86_64-unknown-fuchsia".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} |