diff options
Diffstat (limited to 'library/stdarch/crates')
88 files changed, 4493 insertions, 10343 deletions
diff --git a/library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs b/library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs index 32f144bc7ad..bc4c438038d 100644 --- a/library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs +++ b/library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs @@ -51,7 +51,7 @@ pub fn __crc32d(crc: u32, data: u64) -> u32 { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(sabal))] +#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(sabal2))] pub fn vabal_high_s8(a: int16x8_t, b: int8x16_t, c: int8x16_t) -> int16x8_t { unsafe { let d: int8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); @@ -66,7 +66,7 @@ pub fn vabal_high_s8(a: int16x8_t, b: int8x16_t, c: int8x16_t) -> int16x8_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(sabal))] +#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(sabal2))] pub fn vabal_high_s16(a: int32x4_t, b: int16x8_t, c: int16x8_t) -> int32x4_t { unsafe { let d: int16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]); @@ -81,7 +81,7 @@ pub fn vabal_high_s16(a: int32x4_t, b: int16x8_t, c: int16x8_t) -> int32x4_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(sabal))] +#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(sabal2))] pub fn vabal_high_s32(a: int64x2_t, b: int32x4_t, c: int32x4_t) -> int64x2_t { unsafe { let d: int32x2_t = simd_shuffle!(b, b, [2, 3]); @@ -96,7 +96,7 @@ pub fn vabal_high_s32(a: int64x2_t, b: int32x4_t, c: int32x4_t) -> int64x2_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(uabal))] +#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(uabal2))] pub fn vabal_high_u8(a: uint16x8_t, b: uint8x16_t, c: uint8x16_t) -> uint16x8_t { unsafe { let d: uint8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); @@ -110,7 +110,7 @@ pub fn vabal_high_u8(a: uint16x8_t, b: uint8x16_t, c: uint8x16_t) -> uint16x8_t #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(uabal))] +#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(uabal2))] pub fn vabal_high_u16(a: uint32x4_t, b: uint16x8_t, c: uint16x8_t) -> uint32x4_t { unsafe { let d: uint16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]); @@ -124,7 +124,7 @@ pub fn vabal_high_u16(a: uint32x4_t, b: uint16x8_t, c: uint16x8_t) -> uint32x4_t #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(uabal))] +#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(uabal2))] pub fn vabal_high_u32(a: uint64x2_t, b: uint32x4_t, c: uint32x4_t) -> uint64x2_t { unsafe { let d: uint32x2_t = simd_shuffle!(b, b, [2, 3]); @@ -197,7 +197,7 @@ pub fn vabdh_f16(a: f16, b: f16) -> f16 { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(sabdl))] +#[cfg_attr(test, assert_instr(sabdl2))] pub fn vabdl_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t { unsafe { let c: int16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]); @@ -211,7 +211,7 @@ pub fn vabdl_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(sabdl))] +#[cfg_attr(test, assert_instr(sabdl2))] pub fn vabdl_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t { unsafe { let c: int32x2_t = simd_shuffle!(a, a, [2, 3]); @@ -225,7 +225,7 @@ pub fn vabdl_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(sabdl))] +#[cfg_attr(test, assert_instr(sabdl2))] pub fn vabdl_high_s8(a: int8x16_t, b: int8x16_t) -> int16x8_t { unsafe { let c: int8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]); @@ -238,7 +238,7 @@ pub fn vabdl_high_s8(a: int8x16_t, b: int8x16_t) -> int16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdl_high_u8)"] #[inline] #[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uabdl))] +#[cfg_attr(test, assert_instr(uabdl2))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub fn vabdl_high_u8(a: uint8x16_t, b: uint8x16_t) -> uint16x8_t { unsafe { @@ -251,7 +251,7 @@ pub fn vabdl_high_u8(a: uint8x16_t, b: uint8x16_t) -> uint16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdl_high_u16)"] #[inline] #[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uabdl))] +#[cfg_attr(test, assert_instr(uabdl2))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub fn vabdl_high_u16(a: uint16x8_t, b: uint16x8_t) -> uint32x4_t { unsafe { @@ -264,7 +264,7 @@ pub fn vabdl_high_u16(a: uint16x8_t, b: uint16x8_t) -> uint32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdl_high_u32)"] #[inline] #[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uabdl))] +#[cfg_attr(test, assert_instr(uabdl2))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub fn vabdl_high_u32(a: uint32x4_t, b: uint32x4_t) -> uint64x2_t { unsafe { @@ -298,46 +298,40 @@ pub fn vabsq_f64(a: float64x2_t) -> float64x2_t { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(abs))] pub fn vabs_s64(a: int64x1_t) -> int64x1_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v1i64" - )] - fn _vabs_s64(a: int64x1_t) -> int64x1_t; + unsafe { + let neg: int64x1_t = simd_neg(a); + let mask: int64x1_t = simd_ge(a, neg); + simd_select(mask, a, neg) } - unsafe { _vabs_s64(a) } } #[doc = "Absolute Value (wrapping)."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsd_s64)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_s64)"] #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(abs))] -pub fn vabsd_s64(a: i64) -> i64 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.i64" - )] - fn _vabsd_s64(a: i64) -> i64; +pub fn vabsq_s64(a: int64x2_t) -> int64x2_t { + unsafe { + let neg: int64x2_t = simd_neg(a); + let mask: int64x2_t = simd_ge(a, neg); + simd_select(mask, a, neg) } - unsafe { _vabsd_s64(a) } } #[doc = "Absolute Value (wrapping)."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_s64)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsd_s64)"] #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(abs))] -pub fn vabsq_s64(a: int64x2_t) -> int64x2_t { +pub fn vabsd_s64(a: i64) -> i64 { unsafe extern "unadjusted" { #[cfg_attr( any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v2i64" + link_name = "llvm.aarch64.neon.abs.i64" )] - fn _vabsq_s64(a: int64x2_t) -> int64x2_t; + fn _vabsd_s64(a: i64) -> i64; } - unsafe { _vabsq_s64(a) } + unsafe { _vabsd_s64(a) } } #[doc = "Add"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddd_s64)"] @@ -604,14 +598,7 @@ pub fn vaddvq_f64(a: float64x2_t) -> f64 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addp))] pub fn vaddv_s32(a: int32x2_t) -> i32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddv.i32.v2i32" - )] - fn _vaddv_s32(a: int32x2_t) -> i32; - } - unsafe { _vaddv_s32(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddv_s8)"] @@ -620,14 +607,7 @@ pub fn vaddv_s32(a: int32x2_t) -> i32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddv_s8(a: int8x8_t) -> i8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddv.i8.v8i8" - )] - fn _vaddv_s8(a: int8x8_t) -> i8; - } - unsafe { _vaddv_s8(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddvq_s8)"] @@ -636,14 +616,7 @@ pub fn vaddv_s8(a: int8x8_t) -> i8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddvq_s8(a: int8x16_t) -> i8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddv.i8.v16i8" - )] - fn _vaddvq_s8(a: int8x16_t) -> i8; - } - unsafe { _vaddvq_s8(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddv_s16)"] @@ -652,14 +625,7 @@ pub fn vaddvq_s8(a: int8x16_t) -> i8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddv_s16(a: int16x4_t) -> i16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddv.i16.v4i16" - )] - fn _vaddv_s16(a: int16x4_t) -> i16; - } - unsafe { _vaddv_s16(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddvq_s16)"] @@ -668,14 +634,7 @@ pub fn vaddv_s16(a: int16x4_t) -> i16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddvq_s16(a: int16x8_t) -> i16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddv.i16.v8i16" - )] - fn _vaddvq_s16(a: int16x8_t) -> i16; - } - unsafe { _vaddvq_s16(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddvq_s32)"] @@ -684,14 +643,7 @@ pub fn vaddvq_s16(a: int16x8_t) -> i16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddvq_s32(a: int32x4_t) -> i32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddv.i32.v4i32" - )] - fn _vaddvq_s32(a: int32x4_t) -> i32; - } - unsafe { _vaddvq_s32(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddv_u32)"] @@ -700,14 +652,7 @@ pub fn vaddvq_s32(a: int32x4_t) -> i32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addp))] pub fn vaddv_u32(a: uint32x2_t) -> u32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddv.i32.v2i32" - )] - fn _vaddv_u32(a: uint32x2_t) -> u32; - } - unsafe { _vaddv_u32(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddv_u8)"] @@ -716,14 +661,7 @@ pub fn vaddv_u32(a: uint32x2_t) -> u32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddv_u8(a: uint8x8_t) -> u8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddv.i8.v8i8" - )] - fn _vaddv_u8(a: uint8x8_t) -> u8; - } - unsafe { _vaddv_u8(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddvq_u8)"] @@ -732,14 +670,7 @@ pub fn vaddv_u8(a: uint8x8_t) -> u8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddvq_u8(a: uint8x16_t) -> u8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddv.i8.v16i8" - )] - fn _vaddvq_u8(a: uint8x16_t) -> u8; - } - unsafe { _vaddvq_u8(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddv_u16)"] @@ -748,14 +679,7 @@ pub fn vaddvq_u8(a: uint8x16_t) -> u8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddv_u16(a: uint16x4_t) -> u16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddv.i16.v4i16" - )] - fn _vaddv_u16(a: uint16x4_t) -> u16; - } - unsafe { _vaddv_u16(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddvq_u16)"] @@ -764,14 +688,7 @@ pub fn vaddv_u16(a: uint16x4_t) -> u16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddvq_u16(a: uint16x8_t) -> u16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddv.i16.v8i16" - )] - fn _vaddvq_u16(a: uint16x8_t) -> u16; - } - unsafe { _vaddvq_u16(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddvq_u32)"] @@ -780,14 +697,7 @@ pub fn vaddvq_u16(a: uint16x8_t) -> u16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addv))] pub fn vaddvq_u32(a: uint32x4_t) -> u32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddv.i32.v4i32" - )] - fn _vaddvq_u32(a: uint32x4_t) -> u32; - } - unsafe { _vaddvq_u32(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddvq_s64)"] @@ -796,14 +706,7 @@ pub fn vaddvq_u32(a: uint32x4_t) -> u32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addp))] pub fn vaddvq_s64(a: int64x2_t) -> i64 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddv.i64.v2i64" - )] - fn _vaddvq_s64(a: int64x2_t) -> i64; - } - unsafe { _vaddvq_s64(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddvq_u64)"] @@ -812,14 +715,7 @@ pub fn vaddvq_s64(a: int64x2_t) -> i64 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addp))] pub fn vaddvq_u64(a: uint64x2_t) -> u64 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddv.i64.v2i64" - )] - fn _vaddvq_u64(a: uint64x2_t) -> u64; - } - unsafe { _vaddvq_u64(a) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Multi-vector floating-point absolute maximum"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamax_f32)"] @@ -7281,7 +7177,7 @@ pub fn vcvt_high_f32_f16(a: float16x8_t) -> float32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_high_f32_f64)"] #[inline] #[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fcvtn))] +#[cfg_attr(test, assert_instr(fcvtn2))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub fn vcvt_high_f32_f64(a: float32x2_t, b: float64x2_t) -> float32x4_t { unsafe { simd_shuffle!(a, simd_cast(b), [0, 1, 2, 3]) } @@ -7290,7 +7186,7 @@ pub fn vcvt_high_f32_f64(a: float32x2_t, b: float64x2_t) -> float32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_high_f64_f32)"] #[inline] #[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fcvtl))] +#[cfg_attr(test, assert_instr(fcvtl2))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub fn vcvt_high_f64_f32(a: float32x4_t) -> float64x2_t { unsafe { @@ -9390,7 +9286,7 @@ pub fn vcvtx_f32_f64(a: float64x2_t) -> float32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvtx_high_f32_f64)"] #[inline] #[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fcvtxn))] +#[cfg_attr(test, assert_instr(fcvtxn2))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub fn vcvtx_high_f32_f64(a: float32x2_t, b: float64x2_t) -> float32x4_t { unsafe { simd_shuffle!(a, vcvtx_f32_f64(b), [0, 1, 2, 3]) } @@ -13229,14 +13125,7 @@ pub fn vmaxh_f16(a: f16, b: f16) -> f16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(fmaxnm))] pub fn vmaxnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnm.v1f64" - )] - fn _vmaxnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t; - } - unsafe { _vmaxnm_f64(a, b) } + unsafe { simd_fmax(a, b) } } #[doc = "Floating-point Maximum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmq_f64)"] @@ -13245,14 +13134,7 @@ pub fn vmaxnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(fmaxnm))] pub fn vmaxnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnm.v2f64" - )] - fn _vmaxnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t; - } - unsafe { _vmaxnmq_f64(a, b) } + unsafe { simd_fmax(a, b) } } #[doc = "Floating-point Maximum Number"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmh_f16)"] @@ -13261,14 +13143,7 @@ pub fn vmaxnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg_attr(test, assert_instr(fmaxnm))] pub fn vmaxnmh_f16(a: f16, b: f16) -> f16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnm.f16" - )] - fn _vmaxnmh_f16(a: f16, b: f16) -> f16; - } - unsafe { _vmaxnmh_f16(a, b) } + f16::max(a, b) } #[doc = "Floating-point maximum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmv_f16)"] @@ -13277,14 +13152,7 @@ pub fn vmaxnmh_f16(a: f16, b: f16) -> f16 { #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg_attr(test, assert_instr(fmaxnmv))] pub fn vmaxnmv_f16(a: float16x4_t) -> f16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnmv.f16.v4f16" - )] - fn _vmaxnmv_f16(a: float16x4_t) -> f16; - } - unsafe { _vmaxnmv_f16(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Floating-point maximum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmvq_f16)"] @@ -13293,14 +13161,7 @@ pub fn vmaxnmv_f16(a: float16x4_t) -> f16 { #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg_attr(test, assert_instr(fmaxnmv))] pub fn vmaxnmvq_f16(a: float16x8_t) -> f16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnmv.f16.v8f16" - )] - fn _vmaxnmvq_f16(a: float16x8_t) -> f16; - } - unsafe { _vmaxnmvq_f16(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Floating-point maximum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmv_f32)"] @@ -13309,14 +13170,7 @@ pub fn vmaxnmvq_f16(a: float16x8_t) -> f16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(fmaxnmp))] pub fn vmaxnmv_f32(a: float32x2_t) -> f32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnmv.f32.v2f32" - )] - fn _vmaxnmv_f32(a: float32x2_t) -> f32; - } - unsafe { _vmaxnmv_f32(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Floating-point maximum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmvq_f64)"] @@ -13325,14 +13179,7 @@ pub fn vmaxnmv_f32(a: float32x2_t) -> f32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(fmaxnmp))] pub fn vmaxnmvq_f64(a: float64x2_t) -> f64 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnmv.f64.v2f64" - )] - fn _vmaxnmvq_f64(a: float64x2_t) -> f64; - } - unsafe { _vmaxnmvq_f64(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Floating-point maximum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmvq_f32)"] @@ -13341,14 +13188,7 @@ pub fn vmaxnmvq_f64(a: float64x2_t) -> f64 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(fmaxnmv))] pub fn vmaxnmvq_f32(a: float32x4_t) -> f32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnmv.f32.v4f32" - )] - fn _vmaxnmvq_f32(a: float32x4_t) -> f32; - } - unsafe { _vmaxnmvq_f32(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Floating-point maximum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_f16)"] @@ -13437,14 +13277,7 @@ pub fn vmaxvq_f64(a: float64x2_t) -> f64 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(smaxv))] pub fn vmaxv_s8(a: int8x8_t) -> i8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smaxv.i8.v8i8" - )] - fn _vmaxv_s8(a: int8x8_t) -> i8; - } - unsafe { _vmaxv_s8(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s8)"] @@ -13453,14 +13286,7 @@ pub fn vmaxv_s8(a: int8x8_t) -> i8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(smaxv))] pub fn vmaxvq_s8(a: int8x16_t) -> i8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smaxv.i8.v16i8" - )] - fn _vmaxvq_s8(a: int8x16_t) -> i8; - } - unsafe { _vmaxvq_s8(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_s16)"] @@ -13469,14 +13295,7 @@ pub fn vmaxvq_s8(a: int8x16_t) -> i8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(smaxv))] pub fn vmaxv_s16(a: int16x4_t) -> i16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smaxv.i16.v4i16" - )] - fn _vmaxv_s16(a: int16x4_t) -> i16; - } - unsafe { _vmaxv_s16(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s16)"] @@ -13485,14 +13304,7 @@ pub fn vmaxv_s16(a: int16x4_t) -> i16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(smaxv))] pub fn vmaxvq_s16(a: int16x8_t) -> i16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smaxv.i16.v8i16" - )] - fn _vmaxvq_s16(a: int16x8_t) -> i16; - } - unsafe { _vmaxvq_s16(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_s32)"] @@ -13501,14 +13313,7 @@ pub fn vmaxvq_s16(a: int16x8_t) -> i16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(smaxp))] pub fn vmaxv_s32(a: int32x2_t) -> i32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smaxv.i32.v2i32" - )] - fn _vmaxv_s32(a: int32x2_t) -> i32; - } - unsafe { _vmaxv_s32(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s32)"] @@ -13517,14 +13322,7 @@ pub fn vmaxv_s32(a: int32x2_t) -> i32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(smaxv))] pub fn vmaxvq_s32(a: int32x4_t) -> i32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smaxv.i32.v4i32" - )] - fn _vmaxvq_s32(a: int32x4_t) -> i32; - } - unsafe { _vmaxvq_s32(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u8)"] @@ -13533,14 +13331,7 @@ pub fn vmaxvq_s32(a: int32x4_t) -> i32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(umaxv))] pub fn vmaxv_u8(a: uint8x8_t) -> u8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umaxv.i8.v8i8" - )] - fn _vmaxv_u8(a: uint8x8_t) -> u8; - } - unsafe { _vmaxv_u8(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u8)"] @@ -13549,14 +13340,7 @@ pub fn vmaxv_u8(a: uint8x8_t) -> u8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(umaxv))] pub fn vmaxvq_u8(a: uint8x16_t) -> u8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umaxv.i8.v16i8" - )] - fn _vmaxvq_u8(a: uint8x16_t) -> u8; - } - unsafe { _vmaxvq_u8(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u16)"] @@ -13565,14 +13349,7 @@ pub fn vmaxvq_u8(a: uint8x16_t) -> u8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(umaxv))] pub fn vmaxv_u16(a: uint16x4_t) -> u16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umaxv.i16.v4i16" - )] - fn _vmaxv_u16(a: uint16x4_t) -> u16; - } - unsafe { _vmaxv_u16(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u16)"] @@ -13581,14 +13358,7 @@ pub fn vmaxv_u16(a: uint16x4_t) -> u16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(umaxv))] pub fn vmaxvq_u16(a: uint16x8_t) -> u16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umaxv.i16.v8i16" - )] - fn _vmaxvq_u16(a: uint16x8_t) -> u16; - } - unsafe { _vmaxvq_u16(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u32)"] @@ -13597,14 +13367,7 @@ pub fn vmaxvq_u16(a: uint16x8_t) -> u16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(umaxp))] pub fn vmaxv_u32(a: uint32x2_t) -> u32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umaxv.i32.v2i32" - )] - fn _vmaxv_u32(a: uint32x2_t) -> u32; - } - unsafe { _vmaxv_u32(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Horizontal vector max."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u32)"] @@ -13613,14 +13376,7 @@ pub fn vmaxv_u32(a: uint32x2_t) -> u32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(umaxv))] pub fn vmaxvq_u32(a: uint32x4_t) -> u32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umaxv.i32.v4i32" - )] - fn _vmaxvq_u32(a: uint32x4_t) -> u32; - } - unsafe { _vmaxvq_u32(a) } + unsafe { simd_reduce_max(a) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_f64)"] @@ -13677,14 +13433,7 @@ pub fn vminh_f16(a: f16, b: f16) -> f16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(fminnm))] pub fn vminnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnm.v1f64" - )] - fn _vminnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t; - } - unsafe { _vminnm_f64(a, b) } + unsafe { simd_fmin(a, b) } } #[doc = "Floating-point Minimum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmq_f64)"] @@ -13693,14 +13442,7 @@ pub fn vminnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(fminnm))] pub fn vminnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnm.v2f64" - )] - fn _vminnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t; - } - unsafe { _vminnmq_f64(a, b) } + unsafe { simd_fmin(a, b) } } #[doc = "Floating-point Minimum Number"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmh_f16)"] @@ -13709,14 +13451,7 @@ pub fn vminnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg_attr(test, assert_instr(fminnm))] pub fn vminnmh_f16(a: f16, b: f16) -> f16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnm.f16" - )] - fn _vminnmh_f16(a: f16, b: f16) -> f16; - } - unsafe { _vminnmh_f16(a, b) } + f16::min(a, b) } #[doc = "Floating-point minimum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmv_f16)"] @@ -13725,14 +13460,7 @@ pub fn vminnmh_f16(a: f16, b: f16) -> f16 { #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg_attr(test, assert_instr(fminnmv))] pub fn vminnmv_f16(a: float16x4_t) -> f16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnmv.f16.v4f16" - )] - fn _vminnmv_f16(a: float16x4_t) -> f16; - } - unsafe { _vminnmv_f16(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Floating-point minimum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmvq_f16)"] @@ -13741,14 +13469,7 @@ pub fn vminnmv_f16(a: float16x4_t) -> f16 { #[unstable(feature = "stdarch_neon_f16", issue = "136306")] #[cfg_attr(test, assert_instr(fminnmv))] pub fn vminnmvq_f16(a: float16x8_t) -> f16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnmv.f16.v8f16" - )] - fn _vminnmvq_f16(a: float16x8_t) -> f16; - } - unsafe { _vminnmvq_f16(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Floating-point minimum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmv_f32)"] @@ -13757,14 +13478,7 @@ pub fn vminnmvq_f16(a: float16x8_t) -> f16 { #[cfg_attr(test, assert_instr(fminnmp))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub fn vminnmv_f32(a: float32x2_t) -> f32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnmv.f32.v2f32" - )] - fn _vminnmv_f32(a: float32x2_t) -> f32; - } - unsafe { _vminnmv_f32(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Floating-point minimum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmvq_f64)"] @@ -13773,14 +13487,7 @@ pub fn vminnmv_f32(a: float32x2_t) -> f32 { #[cfg_attr(test, assert_instr(fminnmp))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub fn vminnmvq_f64(a: float64x2_t) -> f64 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnmv.f64.v2f64" - )] - fn _vminnmvq_f64(a: float64x2_t) -> f64; - } - unsafe { _vminnmvq_f64(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Floating-point minimum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmvq_f32)"] @@ -13789,14 +13496,7 @@ pub fn vminnmvq_f64(a: float64x2_t) -> f64 { #[cfg_attr(test, assert_instr(fminnmv))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub fn vminnmvq_f32(a: float32x4_t) -> f32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnmv.f32.v4f32" - )] - fn _vminnmvq_f32(a: float32x4_t) -> f32; - } - unsafe { _vminnmvq_f32(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Floating-point minimum number across vector"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_f16)"] @@ -13885,14 +13585,7 @@ pub fn vminvq_f64(a: float64x2_t) -> f64 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(sminv))] pub fn vminv_s8(a: int8x8_t) -> i8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.sminv.i8.v8i8" - )] - fn _vminv_s8(a: int8x8_t) -> i8; - } - unsafe { _vminv_s8(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s8)"] @@ -13901,14 +13594,7 @@ pub fn vminv_s8(a: int8x8_t) -> i8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(sminv))] pub fn vminvq_s8(a: int8x16_t) -> i8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.sminv.i8.v16i8" - )] - fn _vminvq_s8(a: int8x16_t) -> i8; - } - unsafe { _vminvq_s8(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_s16)"] @@ -13917,14 +13603,7 @@ pub fn vminvq_s8(a: int8x16_t) -> i8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(sminv))] pub fn vminv_s16(a: int16x4_t) -> i16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.sminv.i16.v4i16" - )] - fn _vminv_s16(a: int16x4_t) -> i16; - } - unsafe { _vminv_s16(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s16)"] @@ -13933,14 +13612,7 @@ pub fn vminv_s16(a: int16x4_t) -> i16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(sminv))] pub fn vminvq_s16(a: int16x8_t) -> i16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.sminv.i16.v8i16" - )] - fn _vminvq_s16(a: int16x8_t) -> i16; - } - unsafe { _vminvq_s16(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_s32)"] @@ -13949,14 +13621,7 @@ pub fn vminvq_s16(a: int16x8_t) -> i16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(sminp))] pub fn vminv_s32(a: int32x2_t) -> i32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.sminv.i32.v2i32" - )] - fn _vminv_s32(a: int32x2_t) -> i32; - } - unsafe { _vminv_s32(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s32)"] @@ -13965,14 +13630,7 @@ pub fn vminv_s32(a: int32x2_t) -> i32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(sminv))] pub fn vminvq_s32(a: int32x4_t) -> i32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.sminv.i32.v4i32" - )] - fn _vminvq_s32(a: int32x4_t) -> i32; - } - unsafe { _vminvq_s32(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u8)"] @@ -13981,14 +13639,7 @@ pub fn vminvq_s32(a: int32x4_t) -> i32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(uminv))] pub fn vminv_u8(a: uint8x8_t) -> u8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uminv.i8.v8i8" - )] - fn _vminv_u8(a: uint8x8_t) -> u8; - } - unsafe { _vminv_u8(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u8)"] @@ -13997,14 +13648,7 @@ pub fn vminv_u8(a: uint8x8_t) -> u8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(uminv))] pub fn vminvq_u8(a: uint8x16_t) -> u8 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uminv.i8.v16i8" - )] - fn _vminvq_u8(a: uint8x16_t) -> u8; - } - unsafe { _vminvq_u8(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u16)"] @@ -14013,14 +13657,7 @@ pub fn vminvq_u8(a: uint8x16_t) -> u8 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(uminv))] pub fn vminv_u16(a: uint16x4_t) -> u16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uminv.i16.v4i16" - )] - fn _vminv_u16(a: uint16x4_t) -> u16; - } - unsafe { _vminv_u16(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u16)"] @@ -14029,14 +13666,7 @@ pub fn vminv_u16(a: uint16x4_t) -> u16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(uminv))] pub fn vminvq_u16(a: uint16x8_t) -> u16 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uminv.i16.v8i16" - )] - fn _vminvq_u16(a: uint16x8_t) -> u16; - } - unsafe { _vminvq_u16(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u32)"] @@ -14045,14 +13675,7 @@ pub fn vminvq_u16(a: uint16x8_t) -> u16 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(uminp))] pub fn vminv_u32(a: uint32x2_t) -> u32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uminv.i32.v2i32" - )] - fn _vminv_u32(a: uint32x2_t) -> u32; - } - unsafe { _vminv_u32(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Horizontal vector min."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u32)"] @@ -14061,14 +13684,7 @@ pub fn vminv_u32(a: uint32x2_t) -> u32 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(uminv))] pub fn vminvq_u32(a: uint32x4_t) -> u32 { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uminv.i32.v4i32" - )] - fn _vminvq_u32(a: uint32x4_t) -> u32; - } - unsafe { _vminvq_u32(a) } + unsafe { simd_reduce_min(a) } } #[doc = "Floating-point multiply-add to accumulator"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmla_f64)"] @@ -15277,7 +14893,7 @@ pub fn vmull_high_n_u32(a: uint32x4_t, b: u32) -> uint64x2_t { #[inline] #[target_feature(enable = "neon,aes")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(pmull))] +#[cfg_attr(test, assert_instr(pmull2))] pub fn vmull_high_p64(a: poly64x2_t, b: poly64x2_t) -> p128 { unsafe { vmull_p64(simd_extract!(a, 1), simd_extract!(b, 1)) } } @@ -15286,7 +14902,7 @@ pub fn vmull_high_p64(a: poly64x2_t, b: poly64x2_t) -> p128 { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(pmull))] +#[cfg_attr(test, assert_instr(pmull2))] pub fn vmull_high_p8(a: poly8x16_t, b: poly8x16_t) -> poly16x8_t { unsafe { let a: poly8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]); @@ -15951,23 +15567,11 @@ pub fn vpadds_f32(a: float32x2_t) -> f32 { #[doc = "Add pairwise"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vpaddd_s64)"] #[inline] -#[cfg(target_endian = "little")] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addp))] pub fn vpaddd_s64(a: int64x2_t) -> i64 { - unsafe { transmute(vaddvq_u64(transmute(a))) } -} -#[doc = "Add pairwise"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vpaddd_s64)"] -#[inline] -#[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(addp))] -pub fn vpaddd_s64(a: int64x2_t) -> i64 { - let a: int64x2_t = unsafe { simd_shuffle!(a, a, [1, 0]) }; - unsafe { transmute(vaddvq_u64(transmute(a))) } + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Add pairwise"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vpaddd_u64)"] @@ -15976,7 +15580,7 @@ pub fn vpaddd_s64(a: int64x2_t) -> i64 { #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(addp))] pub fn vpaddd_u64(a: uint64x2_t) -> u64 { - vaddvq_u64(a) + unsafe { simd_reduce_add_unordered(a) } } #[doc = "Floating-point add pairwise"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vpaddq_f16)"] @@ -26893,7 +26497,7 @@ pub fn vsubh_f16(a: f16, b: f16) -> f16 { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(ssubl))] +#[cfg_attr(test, assert_instr(ssubl2))] pub fn vsubl_high_s8(a: int8x16_t, b: int8x16_t) -> int16x8_t { unsafe { let c: int8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]); @@ -26908,7 +26512,7 @@ pub fn vsubl_high_s8(a: int8x16_t, b: int8x16_t) -> int16x8_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(ssubl))] +#[cfg_attr(test, assert_instr(ssubl2))] pub fn vsubl_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t { unsafe { let c: int16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]); @@ -26923,7 +26527,7 @@ pub fn vsubl_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(ssubl))] +#[cfg_attr(test, assert_instr(ssubl2))] pub fn vsubl_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t { unsafe { let c: int32x2_t = simd_shuffle!(a, a, [2, 3]); @@ -26938,7 +26542,7 @@ pub fn vsubl_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(usubl))] +#[cfg_attr(test, assert_instr(usubl2))] pub fn vsubl_high_u8(a: uint8x16_t, b: uint8x16_t) -> uint16x8_t { unsafe { let c: uint8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]); @@ -26953,7 +26557,7 @@ pub fn vsubl_high_u8(a: uint8x16_t, b: uint8x16_t) -> uint16x8_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(usubl))] +#[cfg_attr(test, assert_instr(usubl2))] pub fn vsubl_high_u16(a: uint16x8_t, b: uint16x8_t) -> uint32x4_t { unsafe { let c: uint16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]); @@ -26968,7 +26572,7 @@ pub fn vsubl_high_u16(a: uint16x8_t, b: uint16x8_t) -> uint32x4_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(usubl))] +#[cfg_attr(test, assert_instr(usubl2))] pub fn vsubl_high_u32(a: uint32x4_t, b: uint32x4_t) -> uint64x2_t { unsafe { let c: uint32x2_t = simd_shuffle!(a, a, [2, 3]); @@ -26983,7 +26587,7 @@ pub fn vsubl_high_u32(a: uint32x4_t, b: uint32x4_t) -> uint64x2_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(ssubw))] +#[cfg_attr(test, assert_instr(ssubw2))] pub fn vsubw_high_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t { unsafe { let c: int8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); @@ -26995,7 +26599,7 @@ pub fn vsubw_high_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(ssubw))] +#[cfg_attr(test, assert_instr(ssubw2))] pub fn vsubw_high_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t { unsafe { let c: int16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]); @@ -27007,7 +26611,7 @@ pub fn vsubw_high_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(ssubw))] +#[cfg_attr(test, assert_instr(ssubw2))] pub fn vsubw_high_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t { unsafe { let c: int32x2_t = simd_shuffle!(b, b, [2, 3]); @@ -27019,7 +26623,7 @@ pub fn vsubw_high_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(usubw))] +#[cfg_attr(test, assert_instr(usubw2))] pub fn vsubw_high_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t { unsafe { let c: uint8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); @@ -27031,7 +26635,7 @@ pub fn vsubw_high_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(usubw))] +#[cfg_attr(test, assert_instr(usubw2))] pub fn vsubw_high_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t { unsafe { let c: uint16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]); @@ -27043,7 +26647,7 @@ pub fn vsubw_high_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t { #[inline] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[cfg_attr(test, assert_instr(usubw))] +#[cfg_attr(test, assert_instr(usubw2))] pub fn vsubw_high_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t { unsafe { let c: uint32x2_t = simd_shuffle!(b, b, [2, 3]); diff --git a/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs b/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs index 4df1b741485..32531c7da13 100644 --- a/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs +++ b/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs @@ -1483,15 +1483,11 @@ pub fn vabsq_f32(a: float32x4_t) -> float32x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vabs_s8(a: int8x8_t) -> int8x8_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v8i8" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v8i8")] - fn _vabs_s8(a: int8x8_t) -> int8x8_t; + unsafe { + let neg: int8x8_t = simd_neg(a); + let mask: int8x8_t = simd_ge(a, neg); + simd_select(mask, a, neg) } - unsafe { _vabs_s8(a) } } #[doc = "Absolute value (wrapping)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_s8)"] @@ -1512,15 +1508,11 @@ pub fn vabs_s8(a: int8x8_t) -> int8x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vabsq_s8(a: int8x16_t) -> int8x16_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v16i8" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v16i8")] - fn _vabsq_s8(a: int8x16_t) -> int8x16_t; + unsafe { + let neg: int8x16_t = simd_neg(a); + let mask: int8x16_t = simd_ge(a, neg); + simd_select(mask, a, neg) } - unsafe { _vabsq_s8(a) } } #[doc = "Absolute value (wrapping)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabs_s16)"] @@ -1541,15 +1533,11 @@ pub fn vabsq_s8(a: int8x16_t) -> int8x16_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vabs_s16(a: int16x4_t) -> int16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v4i16" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v4i16")] - fn _vabs_s16(a: int16x4_t) -> int16x4_t; + unsafe { + let neg: int16x4_t = simd_neg(a); + let mask: int16x4_t = simd_ge(a, neg); + simd_select(mask, a, neg) } - unsafe { _vabs_s16(a) } } #[doc = "Absolute value (wrapping)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_s16)"] @@ -1570,15 +1558,11 @@ pub fn vabs_s16(a: int16x4_t) -> int16x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vabsq_s16(a: int16x8_t) -> int16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v8i16" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v8i16")] - fn _vabsq_s16(a: int16x8_t) -> int16x8_t; + unsafe { + let neg: int16x8_t = simd_neg(a); + let mask: int16x8_t = simd_ge(a, neg); + simd_select(mask, a, neg) } - unsafe { _vabsq_s16(a) } } #[doc = "Absolute value (wrapping)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabs_s32)"] @@ -1599,15 +1583,11 @@ pub fn vabsq_s16(a: int16x8_t) -> int16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vabs_s32(a: int32x2_t) -> int32x2_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v2i32" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v2i32")] - fn _vabs_s32(a: int32x2_t) -> int32x2_t; + unsafe { + let neg: int32x2_t = simd_neg(a); + let mask: int32x2_t = simd_ge(a, neg); + simd_select(mask, a, neg) } - unsafe { _vabs_s32(a) } } #[doc = "Absolute value (wrapping)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_s32)"] @@ -1628,15 +1608,11 @@ pub fn vabs_s32(a: int32x2_t) -> int32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vabsq_s32(a: int32x4_t) -> int32x4_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v4i32" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v4i32")] - fn _vabsq_s32(a: int32x4_t) -> int32x4_t; + unsafe { + let neg: int32x4_t = simd_neg(a); + let mask: int32x4_t = simd_ge(a, neg); + simd_select(mask, a, neg) } - unsafe { _vabsq_s32(a) } } #[doc = "Floating-point absolute value"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsh_f16)"] @@ -14322,8 +14298,7 @@ pub unsafe fn vld1q_dup_f16(ptr: *const f16) -> float16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1_dup_f32(ptr: *const f32) -> float32x2_t { - let x = vld1_lane_f32::<0>(ptr, transmute(f32x2::splat(0.0))); - simd_shuffle!(x, x, [0, 0]) + transmute(f32x2::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_p16)"] @@ -14346,8 +14321,7 @@ pub unsafe fn vld1_dup_f32(ptr: *const f32) -> float32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1_dup_p16(ptr: *const p16) -> poly16x4_t { - let x = vld1_lane_p16::<0>(ptr, transmute(u16x4::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0]) + transmute(u16x4::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_p8)"] @@ -14370,8 +14344,7 @@ pub unsafe fn vld1_dup_p16(ptr: *const p16) -> poly16x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1_dup_p8(ptr: *const p8) -> poly8x8_t { - let x = vld1_lane_p8::<0>(ptr, transmute(u8x8::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + transmute(u8x8::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_s16)"] @@ -14394,8 +14367,7 @@ pub unsafe fn vld1_dup_p8(ptr: *const p8) -> poly8x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1_dup_s16(ptr: *const i16) -> int16x4_t { - let x = vld1_lane_s16::<0>(ptr, transmute(i16x4::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0]) + transmute(i16x4::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_s32)"] @@ -14418,8 +14390,7 @@ pub unsafe fn vld1_dup_s16(ptr: *const i16) -> int16x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1_dup_s32(ptr: *const i32) -> int32x2_t { - let x = vld1_lane_s32::<0>(ptr, transmute(i32x2::splat(0))); - simd_shuffle!(x, x, [0, 0]) + transmute(i32x2::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_s8)"] @@ -14442,8 +14413,7 @@ pub unsafe fn vld1_dup_s32(ptr: *const i32) -> int32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1_dup_s8(ptr: *const i8) -> int8x8_t { - let x = vld1_lane_s8::<0>(ptr, transmute(i8x8::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + transmute(i8x8::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_u16)"] @@ -14466,8 +14436,7 @@ pub unsafe fn vld1_dup_s8(ptr: *const i8) -> int8x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1_dup_u16(ptr: *const u16) -> uint16x4_t { - let x = vld1_lane_u16::<0>(ptr, transmute(u16x4::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0]) + transmute(u16x4::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_u32)"] @@ -14490,8 +14459,7 @@ pub unsafe fn vld1_dup_u16(ptr: *const u16) -> uint16x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1_dup_u32(ptr: *const u32) -> uint32x2_t { - let x = vld1_lane_u32::<0>(ptr, transmute(u32x2::splat(0))); - simd_shuffle!(x, x, [0, 0]) + transmute(u32x2::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_u8)"] @@ -14514,8 +14482,7 @@ pub unsafe fn vld1_dup_u32(ptr: *const u32) -> uint32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1_dup_u8(ptr: *const u8) -> uint8x8_t { - let x = vld1_lane_u8::<0>(ptr, transmute(u8x8::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + transmute(u8x8::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_f32)"] @@ -14538,8 +14505,7 @@ pub unsafe fn vld1_dup_u8(ptr: *const u8) -> uint8x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_f32(ptr: *const f32) -> float32x4_t { - let x = vld1q_lane_f32::<0>(ptr, transmute(f32x4::splat(0.0))); - simd_shuffle!(x, x, [0, 0, 0, 0]) + transmute(f32x4::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_p16)"] @@ -14562,8 +14528,7 @@ pub unsafe fn vld1q_dup_f32(ptr: *const f32) -> float32x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_p16(ptr: *const p16) -> poly16x8_t { - let x = vld1q_lane_p16::<0>(ptr, transmute(u16x8::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + transmute(u16x8::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_p8)"] @@ -14586,8 +14551,7 @@ pub unsafe fn vld1q_dup_p16(ptr: *const p16) -> poly16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_p8(ptr: *const p8) -> poly8x16_t { - let x = vld1q_lane_p8::<0>(ptr, transmute(u8x16::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]) + transmute(u8x16::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_s16)"] @@ -14610,8 +14574,7 @@ pub unsafe fn vld1q_dup_p8(ptr: *const p8) -> poly8x16_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_s16(ptr: *const i16) -> int16x8_t { - let x = vld1q_lane_s16::<0>(ptr, transmute(i16x8::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + transmute(i16x8::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_s32)"] @@ -14634,8 +14597,7 @@ pub unsafe fn vld1q_dup_s16(ptr: *const i16) -> int16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_s32(ptr: *const i32) -> int32x4_t { - let x = vld1q_lane_s32::<0>(ptr, transmute(i32x4::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0]) + transmute(i32x4::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_s64)"] @@ -14647,7 +14609,7 @@ pub unsafe fn vld1q_dup_s32(ptr: *const i32) -> int32x4_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(ld1) + assert_instr(ld1r) )] #[cfg_attr( not(target_arch = "arm"), @@ -14658,8 +14620,7 @@ pub unsafe fn vld1q_dup_s32(ptr: *const i32) -> int32x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_s64(ptr: *const i64) -> int64x2_t { - let x = vld1q_lane_s64::<0>(ptr, transmute(i64x2::splat(0))); - simd_shuffle!(x, x, [0, 0]) + transmute(i64x2::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_s8)"] @@ -14682,8 +14643,7 @@ pub unsafe fn vld1q_dup_s64(ptr: *const i64) -> int64x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_s8(ptr: *const i8) -> int8x16_t { - let x = vld1q_lane_s8::<0>(ptr, transmute(i8x16::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]) + transmute(i8x16::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_u16)"] @@ -14706,8 +14666,7 @@ pub unsafe fn vld1q_dup_s8(ptr: *const i8) -> int8x16_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_u16(ptr: *const u16) -> uint16x8_t { - let x = vld1q_lane_u16::<0>(ptr, transmute(u16x8::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + transmute(u16x8::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_u32)"] @@ -14730,8 +14689,7 @@ pub unsafe fn vld1q_dup_u16(ptr: *const u16) -> uint16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_u32(ptr: *const u32) -> uint32x4_t { - let x = vld1q_lane_u32::<0>(ptr, transmute(u32x4::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0]) + transmute(u32x4::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_u64)"] @@ -14743,7 +14701,7 @@ pub unsafe fn vld1q_dup_u32(ptr: *const u32) -> uint32x4_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(ld1) + assert_instr(ld1r) )] #[cfg_attr( not(target_arch = "arm"), @@ -14754,8 +14712,7 @@ pub unsafe fn vld1q_dup_u32(ptr: *const u32) -> uint32x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_u64(ptr: *const u64) -> uint64x2_t { - let x = vld1q_lane_u64::<0>(ptr, transmute(u64x2::splat(0))); - simd_shuffle!(x, x, [0, 0]) + transmute(u64x2::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_u8)"] @@ -14778,8 +14735,7 @@ pub unsafe fn vld1q_dup_u64(ptr: *const u64) -> uint64x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub unsafe fn vld1q_dup_u8(ptr: *const u8) -> uint8x16_t { - let x = vld1q_lane_u8::<0>(ptr, transmute(u8x16::splat(0))); - simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]) + transmute(u8x16::splat(*ptr)) } #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_p64)"] @@ -27681,15 +27637,10 @@ pub fn vmaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmax_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smax.v8i8" - )] - fn _vmax_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t; + unsafe { + let mask: int8x8_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmax_s8(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxq_s8)"] @@ -27710,15 +27661,10 @@ pub fn vmax_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmaxq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smax.v16i8" - )] - fn _vmaxq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t; + unsafe { + let mask: int8x16_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmaxq_s8(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmax_s16)"] @@ -27739,15 +27685,10 @@ pub fn vmaxq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmax_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smax.v4i16" - )] - fn _vmax_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t; + unsafe { + let mask: int16x4_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmax_s16(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxq_s16)"] @@ -27768,15 +27709,10 @@ pub fn vmax_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmaxq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v8i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smax.v8i16" - )] - fn _vmaxq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t; + unsafe { + let mask: int16x8_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmaxq_s16(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmax_s32)"] @@ -27797,15 +27733,10 @@ pub fn vmaxq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmax_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smax.v2i32" - )] - fn _vmax_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t; + unsafe { + let mask: int32x2_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmax_s32(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxq_s32)"] @@ -27826,15 +27757,10 @@ pub fn vmax_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmaxq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v4i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smax.v4i32" - )] - fn _vmaxq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t; + unsafe { + let mask: int32x4_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmaxq_s32(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmax_u8)"] @@ -27855,15 +27781,10 @@ pub fn vmaxq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmax_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umax.v8i8" - )] - fn _vmax_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; + unsafe { + let mask: uint8x8_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmax_u8(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxq_u8)"] @@ -27884,15 +27805,10 @@ pub fn vmax_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmaxq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umax.v16i8" - )] - fn _vmaxq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; + unsafe { + let mask: uint8x16_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmaxq_u8(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmax_u16)"] @@ -27913,15 +27829,10 @@ pub fn vmaxq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmax_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umax.v4i16" - )] - fn _vmax_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; + unsafe { + let mask: uint16x4_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmax_u16(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxq_u16)"] @@ -27942,15 +27853,10 @@ pub fn vmax_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmaxq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v8i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umax.v8i16" - )] - fn _vmaxq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; + unsafe { + let mask: uint16x8_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmaxq_u16(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmax_u32)"] @@ -27971,15 +27877,10 @@ pub fn vmaxq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmax_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umax.v2i32" - )] - fn _vmax_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; + unsafe { + let mask: uint32x2_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmax_u32(a, b) } } #[doc = "Maximum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxq_u32)"] @@ -28000,15 +27901,10 @@ pub fn vmax_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmaxq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v4i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umax.v4i32" - )] - fn _vmaxq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; + unsafe { + let mask: uint32x4_t = simd_ge(a, b); + simd_select(mask, a, b) } - unsafe { _vmaxq_u32(a, b) } } #[doc = "Floating-point Maximum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnm_f16)"] @@ -28022,15 +27918,7 @@ pub fn vmaxq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] pub fn vmaxnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxnm.v4f16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnm.v4f16" - )] - fn _vmaxnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t; - } - unsafe { _vmaxnm_f16(a, b) } + unsafe { simd_fmax(a, b) } } #[doc = "Floating-point Maximum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmq_f16)"] @@ -28044,15 +27932,7 @@ pub fn vmaxnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t { #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] pub fn vmaxnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxnm.v8f16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnm.v8f16" - )] - fn _vmaxnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t; - } - unsafe { _vmaxnmq_f16(a, b) } + unsafe { simd_fmax(a, b) } } #[doc = "Floating-point Maximum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnm_f32)"] @@ -28073,15 +27953,7 @@ pub fn vmaxnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmaxnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxnm.v2f32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnm.v2f32" - )] - fn _vmaxnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t; - } - unsafe { _vmaxnm_f32(a, b) } + unsafe { simd_fmax(a, b) } } #[doc = "Floating-point Maximum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmq_f32)"] @@ -28102,15 +27974,7 @@ pub fn vmaxnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmaxnmq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxnm.v4f32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxnm.v4f32" - )] - fn _vmaxnmq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t; - } - unsafe { _vmaxnmq_f32(a, b) } + unsafe { simd_fmax(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_f16)"] @@ -28233,15 +28097,10 @@ pub fn vminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmin_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smin.v8i8" - )] - fn _vmin_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t; + unsafe { + let mask: int8x8_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vmin_s8(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminq_s8)"] @@ -28262,15 +28121,10 @@ pub fn vmin_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vminq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smin.v16i8" - )] - fn _vminq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t; + unsafe { + let mask: int8x16_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vminq_s8(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_s16)"] @@ -28291,15 +28145,10 @@ pub fn vminq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmin_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smin.v4i16" - )] - fn _vmin_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t; + unsafe { + let mask: int16x4_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vmin_s16(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminq_s16)"] @@ -28320,15 +28169,10 @@ pub fn vmin_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vminq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v8i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smin.v8i16" - )] - fn _vminq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t; + unsafe { + let mask: int16x8_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vminq_s16(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_s32)"] @@ -28349,15 +28193,10 @@ pub fn vminq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmin_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smin.v2i32" - )] - fn _vmin_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t; + unsafe { + let mask: int32x2_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vmin_s32(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminq_s32)"] @@ -28378,15 +28217,10 @@ pub fn vmin_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vminq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v4i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smin.v4i32" - )] - fn _vminq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t; + unsafe { + let mask: int32x4_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vminq_s32(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_u8)"] @@ -28407,15 +28241,10 @@ pub fn vminq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmin_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umin.v8i8" - )] - fn _vmin_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; + unsafe { + let mask: uint8x8_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vmin_u8(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminq_u8)"] @@ -28436,15 +28265,10 @@ pub fn vmin_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vminq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umin.v16i8" - )] - fn _vminq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; + unsafe { + let mask: uint8x16_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vminq_u8(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_u16)"] @@ -28465,15 +28289,10 @@ pub fn vminq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmin_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umin.v4i16" - )] - fn _vmin_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; + unsafe { + let mask: uint16x4_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vmin_u16(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminq_u16)"] @@ -28494,15 +28313,10 @@ pub fn vmin_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vminq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v8i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umin.v8i16" - )] - fn _vminq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; + unsafe { + let mask: uint16x8_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vminq_u16(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_u32)"] @@ -28523,15 +28337,10 @@ pub fn vminq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vmin_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umin.v2i32" - )] - fn _vmin_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; + unsafe { + let mask: uint32x2_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vmin_u32(a, b) } } #[doc = "Minimum (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminq_u32)"] @@ -28552,15 +28361,10 @@ pub fn vmin_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vminq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v4i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umin.v4i32" - )] - fn _vminq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; + unsafe { + let mask: uint32x4_t = simd_le(a, b); + simd_select(mask, a, b) } - unsafe { _vminq_u32(a, b) } } #[doc = "Floating-point Minimum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnm_f16)"] @@ -28574,15 +28378,7 @@ pub fn vminq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] pub fn vminnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminnm.v4f16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnm.v4f16" - )] - fn _vminnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t; - } - unsafe { _vminnm_f16(a, b) } + unsafe { simd_fmin(a, b) } } #[doc = "Floating-point Minimum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmq_f16)"] @@ -28596,15 +28392,7 @@ pub fn vminnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t { #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] pub fn vminnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminnm.v8f16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnm.v8f16" - )] - fn _vminnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t; - } - unsafe { _vminnmq_f16(a, b) } + unsafe { simd_fmin(a, b) } } #[doc = "Floating-point Minimum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnm_f32)"] @@ -28625,15 +28413,7 @@ pub fn vminnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vminnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminnm.v2f32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnm.v2f32" - )] - fn _vminnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t; - } - unsafe { _vminnm_f32(a, b) } + unsafe { simd_fmin(a, b) } } #[doc = "Floating-point Minimum Number (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmq_f32)"] @@ -28654,15 +28434,7 @@ pub fn vminnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") )] pub fn vminnmq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminnm.v4f32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminnm.v4f32" - )] - fn _vminnmq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t; - } - unsafe { _vminnmq_f32(a, b) } + unsafe { simd_fmin(a, b) } } #[doc = "Floating-point multiply-add to accumulator"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmla_f32)"] @@ -39566,17 +39338,7 @@ pub fn vqrshrn_n_s16<const N: i32>(a: int16x8_t) -> int8x8_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftns.v8i8")] fn _vqrshrn_n_s16(a: int16x8_t, n: int16x8_t) -> int8x8_t; } - unsafe { - _vqrshrn_n_s16( - a, - const { - int16x8_t([ - -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, - -N as i16, - ]) - }, - ) - } + unsafe { _vqrshrn_n_s16(a, const { int16x8_t([-N as i16; 8]) }) } } #[doc = "Signed saturating rounded shift right narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrshrn_n_s32)"] @@ -39592,12 +39354,7 @@ pub fn vqrshrn_n_s32<const N: i32>(a: int32x4_t) -> int16x4_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftns.v4i16")] fn _vqrshrn_n_s32(a: int32x4_t, n: int32x4_t) -> int16x4_t; } - unsafe { - _vqrshrn_n_s32( - a, - const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }, - ) - } + unsafe { _vqrshrn_n_s32(a, const { int32x4_t([-N; 4]) }) } } #[doc = "Signed saturating rounded shift right narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrshrn_n_s64)"] @@ -39613,7 +39370,7 @@ pub fn vqrshrn_n_s64<const N: i32>(a: int64x2_t) -> int32x2_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftns.v2i32")] fn _vqrshrn_n_s64(a: int64x2_t, n: int64x2_t) -> int32x2_t; } - unsafe { _vqrshrn_n_s64(a, const { int64x2_t([-N as i64, -N as i64]) }) } + unsafe { _vqrshrn_n_s64(a, const { int64x2_t([-N as i64; 2]) }) } } #[doc = "Signed saturating rounded shift right narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrshrn_n_s16)"] @@ -39806,17 +39563,7 @@ pub fn vqrshrun_n_s16<const N: i32>(a: int16x8_t) -> uint8x8_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnsu.v8i8")] fn _vqrshrun_n_s16(a: int16x8_t, n: int16x8_t) -> uint8x8_t; } - unsafe { - _vqrshrun_n_s16( - a, - const { - int16x8_t([ - -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, - -N as i16, - ]) - }, - ) - } + unsafe { _vqrshrun_n_s16(a, const { int16x8_t([-N as i16; 8]) }) } } #[doc = "Signed saturating rounded shift right unsigned narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrshrun_n_s32)"] @@ -39832,12 +39579,7 @@ pub fn vqrshrun_n_s32<const N: i32>(a: int32x4_t) -> uint16x4_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnsu.v4i16")] fn _vqrshrun_n_s32(a: int32x4_t, n: int32x4_t) -> uint16x4_t; } - unsafe { - _vqrshrun_n_s32( - a, - const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }, - ) - } + unsafe { _vqrshrun_n_s32(a, const { int32x4_t([-N; 4]) }) } } #[doc = "Signed saturating rounded shift right unsigned narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrshrun_n_s64)"] @@ -39853,7 +39595,7 @@ pub fn vqrshrun_n_s64<const N: i32>(a: int64x2_t) -> uint32x2_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnsu.v2i32")] fn _vqrshrun_n_s64(a: int64x2_t, n: int64x2_t) -> uint32x2_t; } - unsafe { _vqrshrun_n_s64(a, const { int64x2_t([-N as i64, -N as i64]) }) } + unsafe { _vqrshrun_n_s64(a, const { int64x2_t([-N as i64; 2]) }) } } #[doc = "Signed saturating rounded shift right unsigned narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrshrun_n_s16)"] @@ -41038,17 +40780,7 @@ pub fn vqshrn_n_s16<const N: i32>(a: int16x8_t) -> int8x8_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftns.v8i8")] fn _vqshrn_n_s16(a: int16x8_t, n: int16x8_t) -> int8x8_t; } - unsafe { - _vqshrn_n_s16( - a, - const { - int16x8_t([ - -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, - -N as i16, - ]) - }, - ) - } + unsafe { _vqshrn_n_s16(a, const { int16x8_t([-N as i16; 8]) }) } } #[doc = "Signed saturating shift right narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqshrn_n_s32)"] @@ -41064,12 +40796,7 @@ pub fn vqshrn_n_s32<const N: i32>(a: int32x4_t) -> int16x4_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftns.v4i16")] fn _vqshrn_n_s32(a: int32x4_t, n: int32x4_t) -> int16x4_t; } - unsafe { - _vqshrn_n_s32( - a, - const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }, - ) - } + unsafe { _vqshrn_n_s32(a, const { int32x4_t([-N; 4]) }) } } #[doc = "Signed saturating shift right narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqshrn_n_s64)"] @@ -41085,7 +40812,7 @@ pub fn vqshrn_n_s64<const N: i32>(a: int64x2_t) -> int32x2_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftns.v2i32")] fn _vqshrn_n_s64(a: int64x2_t, n: int64x2_t) -> int32x2_t; } - unsafe { _vqshrn_n_s64(a, const { int64x2_t([-N as i64, -N as i64]) }) } + unsafe { _vqshrn_n_s64(a, const { int64x2_t([-N as i64; 2]) }) } } #[doc = "Signed saturating shift right narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqshrn_n_s16)"] @@ -41278,17 +41005,7 @@ pub fn vqshrun_n_s16<const N: i32>(a: int16x8_t) -> uint8x8_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnsu.v8i8")] fn _vqshrun_n_s16(a: int16x8_t, n: int16x8_t) -> uint8x8_t; } - unsafe { - _vqshrun_n_s16( - a, - const { - int16x8_t([ - -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, - -N as i16, - ]) - }, - ) - } + unsafe { _vqshrun_n_s16(a, const { int16x8_t([-N as i16; 8]) }) } } #[doc = "Signed saturating shift right unsigned narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqshrun_n_s32)"] @@ -41304,12 +41021,7 @@ pub fn vqshrun_n_s32<const N: i32>(a: int32x4_t) -> uint16x4_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnsu.v4i16")] fn _vqshrun_n_s32(a: int32x4_t, n: int32x4_t) -> uint16x4_t; } - unsafe { - _vqshrun_n_s32( - a, - const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }, - ) - } + unsafe { _vqshrun_n_s32(a, const { int32x4_t([-N; 4]) }) } } #[doc = "Signed saturating shift right unsigned narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqshrun_n_s64)"] @@ -41325,7 +41037,7 @@ pub fn vqshrun_n_s64<const N: i32>(a: int64x2_t) -> uint32x2_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnsu.v2i32")] fn _vqshrun_n_s64(a: int64x2_t, n: int64x2_t) -> uint32x2_t; } - unsafe { _vqshrun_n_s64(a, const { int64x2_t([-N as i64, -N as i64]) }) } + unsafe { _vqshrun_n_s64(a, const { int64x2_t([-N as i64; 2]) }) } } #[doc = "Signed saturating shift right unsigned narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqshrun_n_s16)"] @@ -59483,17 +59195,7 @@ pub fn vrshrn_n_s16<const N: i32>(a: int16x8_t) -> int8x8_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrshiftn.v8i8")] fn _vrshrn_n_s16(a: int16x8_t, n: int16x8_t) -> int8x8_t; } - unsafe { - _vrshrn_n_s16( - a, - const { - int16x8_t([ - -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, - -N as i16, - ]) - }, - ) - } + unsafe { _vrshrn_n_s16(a, const { int16x8_t([-N as i16; 8]) }) } } #[doc = "Rounding shift right narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrshrn_n_s32)"] @@ -59509,12 +59211,7 @@ pub fn vrshrn_n_s32<const N: i32>(a: int32x4_t) -> int16x4_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrshiftn.v4i16")] fn _vrshrn_n_s32(a: int32x4_t, n: int32x4_t) -> int16x4_t; } - unsafe { - _vrshrn_n_s32( - a, - const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }, - ) - } + unsafe { _vrshrn_n_s32(a, const { int32x4_t([-N; 4]) }) } } #[doc = "Rounding shift right narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrshrn_n_s64)"] @@ -59530,7 +59227,7 @@ pub fn vrshrn_n_s64<const N: i32>(a: int64x2_t) -> int32x2_t { #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrshiftn.v2i32")] fn _vrshrn_n_s64(a: int64x2_t, n: int64x2_t) -> int32x2_t; } - unsafe { _vrshrn_n_s64(a, const { int64x2_t([-N as i64, -N as i64]) }) } + unsafe { _vrshrn_n_s64(a, const { int64x2_t([-N as i64; 2]) }) } } #[doc = "Rounding shift right narrow"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrshrn_n_s16)"] @@ -63183,7 +62880,7 @@ pub fn vsli_n_u32<const N: i32>(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { transmute(vshiftins_v2i32( transmute(a), transmute(b), - int32x2_t::splat(N as i32), + int32x2_t::splat(N), )) } } @@ -63201,7 +62898,7 @@ pub fn vsliq_n_u32<const N: i32>(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { transmute(vshiftins_v4i32( transmute(a), transmute(b), - int32x4_t::splat(N as i32), + int32x4_t::splat(N), )) } } @@ -63739,7 +63436,7 @@ pub fn vsriq_n_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t { #[rustc_legacy_const_generics(2)] pub fn vsri_n_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t { static_assert!(1 <= N && N <= 32); - vshiftins_v2i32(a, b, int32x2_t::splat(-N as i32)) + vshiftins_v2i32(a, b, int32x2_t::splat(-N)) } #[doc = "Shift Right and Insert (immediate)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsriq_n_s32)"] @@ -63751,7 +63448,7 @@ pub fn vsri_n_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t { #[rustc_legacy_const_generics(2)] pub fn vsriq_n_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t { static_assert!(1 <= N && N <= 32); - vshiftins_v4i32(a, b, int32x4_t::splat(-N as i32)) + vshiftins_v4i32(a, b, int32x4_t::splat(-N)) } #[doc = "Shift Right and Insert (immediate)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsri_n_s64)"] @@ -73297,7 +72994,11 @@ pub fn vtbx4_p8(a: poly8x8_t, b: poly8x8x4_t, c: uint8x8_t) -> poly8x8_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] @@ -73315,7 +73016,11 @@ pub fn vtrn_f16(a: float16x4_t, b: float16x4_t) -> float16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] @@ -73334,7 +73039,11 @@ pub fn vtrnq_f16(a: float16x8_t, b: float16x8_t) -> float16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73359,7 +73068,11 @@ pub fn vtrn_f32(a: float32x2_t, b: float32x2_t) -> float32x2x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73384,7 +73097,11 @@ pub fn vtrn_s32(a: int32x2_t, b: int32x2_t) -> int32x2x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73409,7 +73126,11 @@ pub fn vtrn_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73434,7 +73155,11 @@ pub fn vtrnq_f32(a: float32x4_t, b: float32x4_t) -> float32x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73459,7 +73184,11 @@ pub fn vtrn_s8(a: int8x8_t, b: int8x8_t) -> int8x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73492,7 +73221,11 @@ pub fn vtrnq_s8(a: int8x16_t, b: int8x16_t) -> int8x16x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73517,7 +73250,11 @@ pub fn vtrn_s16(a: int16x4_t, b: int16x4_t) -> int16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73542,7 +73279,11 @@ pub fn vtrnq_s16(a: int16x8_t, b: int16x8_t) -> int16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73567,7 +73308,11 @@ pub fn vtrnq_s32(a: int32x4_t, b: int32x4_t) -> int32x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73592,7 +73337,11 @@ pub fn vtrn_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73625,7 +73374,11 @@ pub fn vtrnq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73650,7 +73403,11 @@ pub fn vtrn_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73675,7 +73432,11 @@ pub fn vtrnq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73700,7 +73461,11 @@ pub fn vtrnq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73725,7 +73490,11 @@ pub fn vtrn_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73758,7 +73527,11 @@ pub fn vtrnq_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -73783,7 +73556,11 @@ pub fn vtrn_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(trn) + assert_instr(trn1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(trn2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74349,7 +74126,11 @@ pub fn vusmmlaq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] @@ -74367,7 +74148,11 @@ pub fn vuzp_f16(a: float16x4_t, b: float16x4_t) -> float16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] @@ -74386,7 +74171,11 @@ pub fn vuzpq_f16(a: float16x8_t, b: float16x8_t) -> float16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74411,7 +74200,11 @@ pub fn vuzp_f32(a: float32x2_t, b: float32x2_t) -> float32x2x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74436,7 +74229,11 @@ pub fn vuzp_s32(a: int32x2_t, b: int32x2_t) -> int32x2x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74461,7 +74258,11 @@ pub fn vuzp_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74486,7 +74287,11 @@ pub fn vuzpq_f32(a: float32x4_t, b: float32x4_t) -> float32x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74511,7 +74316,11 @@ pub fn vuzp_s8(a: int8x8_t, b: int8x8_t) -> int8x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74544,7 +74353,11 @@ pub fn vuzpq_s8(a: int8x16_t, b: int8x16_t) -> int8x16x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74569,7 +74382,11 @@ pub fn vuzp_s16(a: int16x4_t, b: int16x4_t) -> int16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74594,7 +74411,11 @@ pub fn vuzpq_s16(a: int16x8_t, b: int16x8_t) -> int16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74619,7 +74440,11 @@ pub fn vuzpq_s32(a: int32x4_t, b: int32x4_t) -> int32x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74644,7 +74469,11 @@ pub fn vuzp_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74677,7 +74506,11 @@ pub fn vuzpq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74702,7 +74535,11 @@ pub fn vuzp_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74727,7 +74564,11 @@ pub fn vuzpq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74752,7 +74593,11 @@ pub fn vuzpq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74777,7 +74622,11 @@ pub fn vuzp_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74810,7 +74659,11 @@ pub fn vuzpq_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74835,7 +74688,11 @@ pub fn vuzp_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uzp) + assert_instr(uzp1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(uzp2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74859,7 +74716,11 @@ pub fn vuzpq_p16(a: poly16x8_t, b: poly16x8_t) -> poly16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vzip.16"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] @@ -74877,7 +74738,11 @@ pub fn vzip_f16(a: float16x4_t, b: float16x4_t) -> float16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vzip.16"))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[target_feature(enable = "neon,fp16")] #[unstable(feature = "stdarch_neon_f16", issue = "136306")] @@ -74896,7 +74761,11 @@ pub fn vzipq_f16(a: float16x8_t, b: float16x8_t) -> float16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74921,7 +74790,11 @@ pub fn vzip_f32(a: float32x2_t, b: float32x2_t) -> float32x2x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74946,7 +74819,11 @@ pub fn vzip_s32(a: int32x2_t, b: int32x2_t) -> int32x2x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74971,7 +74848,11 @@ pub fn vzip_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vzip))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -74996,7 +74877,11 @@ pub fn vzip_s8(a: int8x8_t, b: int8x8_t) -> int8x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vzip))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75021,7 +74906,11 @@ pub fn vzip_s16(a: int16x4_t, b: int16x4_t) -> int16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vzip))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75046,7 +74935,11 @@ pub fn vzip_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vzip))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75071,7 +74964,11 @@ pub fn vzip_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vzip))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75096,7 +74993,11 @@ pub fn vzip_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vzip))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75121,7 +75022,11 @@ pub fn vzip_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75146,7 +75051,11 @@ pub fn vzipq_f32(a: float32x4_t, b: float32x4_t) -> float32x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75179,7 +75088,11 @@ pub fn vzipq_s8(a: int8x16_t, b: int8x16_t) -> int8x16x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75204,7 +75117,11 @@ pub fn vzipq_s16(a: int16x8_t, b: int16x8_t) -> int16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75229,7 +75146,11 @@ pub fn vzipq_s32(a: int32x4_t, b: int32x4_t) -> int32x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75262,7 +75183,11 @@ pub fn vzipq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75287,7 +75212,11 @@ pub fn vzipq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75312,7 +75241,11 @@ pub fn vzipq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), @@ -75345,7 +75278,11 @@ pub fn vzipq_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16x2_t { #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(zip) + assert_instr(zip1) +)] +#[cfg_attr( + all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), + assert_instr(zip2) )] #[cfg_attr( not(target_arch = "arm"), diff --git a/library/stdarch/crates/core_arch/src/core_arch_docs.md b/library/stdarch/crates/core_arch/src/core_arch_docs.md index bfa1b722886..6aea2b46184 100644 --- a/library/stdarch/crates/core_arch/src/core_arch_docs.md +++ b/library/stdarch/crates/core_arch/src/core_arch_docs.md @@ -193,6 +193,7 @@ others at: * [`powerpc64`] * [`nvptx`] * [`wasm32`] +* [`loongarch32`] * [`loongarch64`] * [`s390x`] @@ -208,6 +209,7 @@ others at: [`powerpc64`]: ../../core/arch/powerpc64/index.html [`nvptx`]: ../../core/arch/nvptx/index.html [`wasm32`]: ../../core/arch/wasm32/index.html +[`loongarch32`]: ../../core/arch/loongarch32/index.html [`loongarch64`]: ../../core/arch/loongarch64/index.html [`s390x`]: ../../core/arch/s390x/index.html diff --git a/library/stdarch/crates/core_arch/src/loongarch32/mod.rs b/library/stdarch/crates/core_arch/src/loongarch32/mod.rs new file mode 100644 index 00000000000..fb05450373c --- /dev/null +++ b/library/stdarch/crates/core_arch/src/loongarch32/mod.rs @@ -0,0 +1,47 @@ +//! `LoongArch32` intrinsics + +use crate::arch::asm; + +#[allow(improper_ctypes)] +unsafe extern "unadjusted" { + #[link_name = "llvm.loongarch.cacop.w"] + fn __cacop(a: i32, b: i32, c: i32); + #[link_name = "llvm.loongarch.csrrd.w"] + fn __csrrd(a: i32) -> i32; + #[link_name = "llvm.loongarch.csrwr.w"] + fn __csrwr(a: i32, b: i32) -> i32; + #[link_name = "llvm.loongarch.csrxchg.w"] + fn __csrxchg(a: i32, b: i32, c: i32) -> i32; +} + +/// Generates the cache operation instruction +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn cacop<const IMM12: i32>(a: i32, b: i32) { + static_assert_simm_bits!(IMM12, 12); + __cacop(a, b, IMM12); +} + +/// Reads the CSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn csrrd<const IMM14: i32>() -> i32 { + static_assert_uimm_bits!(IMM14, 14); + __csrrd(IMM14) +} + +/// Writes the CSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn csrwr<const IMM14: i32>(a: i32) -> i32 { + static_assert_uimm_bits!(IMM14, 14); + __csrwr(a, IMM14) +} + +/// Exchanges the CSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn csrxchg<const IMM14: i32>(a: i32, b: i32) -> i32 { + static_assert_uimm_bits!(IMM14, 14); + __csrxchg(a, b, IMM14) +} diff --git a/library/stdarch/crates/core_arch/src/loongarch64/lasx/generated.rs b/library/stdarch/crates/core_arch/src/loongarch64/lasx/generated.rs index 2e56d8fb9b8..4361acdc1fc 100644 --- a/library/stdarch/crates/core_arch/src/loongarch64/lasx/generated.rs +++ b/library/stdarch/crates/core_arch/src/loongarch64/lasx/generated.rs @@ -1495,3501 +1495,3501 @@ unsafe extern "unadjusted" { #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsll_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvsll_b(a, b) +pub fn lasx_xvsll_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvsll_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsll_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvsll_h(a, b) +pub fn lasx_xvsll_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvsll_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsll_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvsll_w(a, b) +pub fn lasx_xvsll_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvsll_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsll_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsll_d(a, b) +pub fn lasx_xvsll_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsll_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslli_b<const IMM3: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvslli_b<const IMM3: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvslli_b(a, IMM3) + unsafe { __lasx_xvslli_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslli_h<const IMM4: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvslli_h<const IMM4: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvslli_h(a, IMM4) + unsafe { __lasx_xvslli_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslli_w<const IMM5: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvslli_w<const IMM5: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvslli_w(a, IMM5) + unsafe { __lasx_xvslli_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslli_d<const IMM6: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvslli_d<const IMM6: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvslli_d(a, IMM6) + unsafe { __lasx_xvslli_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsra_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvsra_b(a, b) +pub fn lasx_xvsra_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvsra_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsra_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvsra_h(a, b) +pub fn lasx_xvsra_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvsra_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsra_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvsra_w(a, b) +pub fn lasx_xvsra_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvsra_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsra_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsra_d(a, b) +pub fn lasx_xvsra_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsra_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrai_b<const IMM3: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvsrai_b<const IMM3: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvsrai_b(a, IMM3) + unsafe { __lasx_xvsrai_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrai_h<const IMM4: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvsrai_h<const IMM4: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsrai_h(a, IMM4) + unsafe { __lasx_xvsrai_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrai_w<const IMM5: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvsrai_w<const IMM5: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsrai_w(a, IMM5) + unsafe { __lasx_xvsrai_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrai_d<const IMM6: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvsrai_d<const IMM6: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsrai_d(a, IMM6) + unsafe { __lasx_xvsrai_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrar_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvsrar_b(a, b) +pub fn lasx_xvsrar_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvsrar_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrar_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvsrar_h(a, b) +pub fn lasx_xvsrar_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvsrar_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrar_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvsrar_w(a, b) +pub fn lasx_xvsrar_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvsrar_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrar_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsrar_d(a, b) +pub fn lasx_xvsrar_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsrar_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrari_b<const IMM3: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvsrari_b<const IMM3: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvsrari_b(a, IMM3) + unsafe { __lasx_xvsrari_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrari_h<const IMM4: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvsrari_h<const IMM4: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsrari_h(a, IMM4) + unsafe { __lasx_xvsrari_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrari_w<const IMM5: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvsrari_w<const IMM5: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsrari_w(a, IMM5) + unsafe { __lasx_xvsrari_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrari_d<const IMM6: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvsrari_d<const IMM6: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsrari_d(a, IMM6) + unsafe { __lasx_xvsrari_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrl_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvsrl_b(a, b) +pub fn lasx_xvsrl_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvsrl_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrl_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvsrl_h(a, b) +pub fn lasx_xvsrl_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvsrl_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrl_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvsrl_w(a, b) +pub fn lasx_xvsrl_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvsrl_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrl_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsrl_d(a, b) +pub fn lasx_xvsrl_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsrl_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrli_b<const IMM3: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvsrli_b<const IMM3: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvsrli_b(a, IMM3) + unsafe { __lasx_xvsrli_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrli_h<const IMM4: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvsrli_h<const IMM4: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsrli_h(a, IMM4) + unsafe { __lasx_xvsrli_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrli_w<const IMM5: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvsrli_w<const IMM5: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsrli_w(a, IMM5) + unsafe { __lasx_xvsrli_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrli_d<const IMM6: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvsrli_d<const IMM6: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsrli_d(a, IMM6) + unsafe { __lasx_xvsrli_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlr_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvsrlr_b(a, b) +pub fn lasx_xvsrlr_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvsrlr_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlr_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvsrlr_h(a, b) +pub fn lasx_xvsrlr_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvsrlr_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlr_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvsrlr_w(a, b) +pub fn lasx_xvsrlr_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvsrlr_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlr_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsrlr_d(a, b) +pub fn lasx_xvsrlr_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsrlr_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlri_b<const IMM3: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvsrlri_b<const IMM3: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvsrlri_b(a, IMM3) + unsafe { __lasx_xvsrlri_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlri_h<const IMM4: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvsrlri_h<const IMM4: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsrlri_h(a, IMM4) + unsafe { __lasx_xvsrlri_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlri_w<const IMM5: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvsrlri_w<const IMM5: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsrlri_w(a, IMM5) + unsafe { __lasx_xvsrlri_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlri_d<const IMM6: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvsrlri_d<const IMM6: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsrlri_d(a, IMM6) + unsafe { __lasx_xvsrlri_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitclr_b(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvbitclr_b(a, b) +pub fn lasx_xvbitclr_b(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvbitclr_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitclr_h(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvbitclr_h(a, b) +pub fn lasx_xvbitclr_h(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvbitclr_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitclr_w(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvbitclr_w(a, b) +pub fn lasx_xvbitclr_w(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvbitclr_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitclr_d(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvbitclr_d(a, b) +pub fn lasx_xvbitclr_d(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvbitclr_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitclri_b<const IMM3: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvbitclri_b<const IMM3: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvbitclri_b(a, IMM3) + unsafe { __lasx_xvbitclri_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitclri_h<const IMM4: u32>(a: v16u16) -> v16u16 { +pub fn lasx_xvbitclri_h<const IMM4: u32>(a: v16u16) -> v16u16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvbitclri_h(a, IMM4) + unsafe { __lasx_xvbitclri_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitclri_w<const IMM5: u32>(a: v8u32) -> v8u32 { +pub fn lasx_xvbitclri_w<const IMM5: u32>(a: v8u32) -> v8u32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvbitclri_w(a, IMM5) + unsafe { __lasx_xvbitclri_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitclri_d<const IMM6: u32>(a: v4u64) -> v4u64 { +pub fn lasx_xvbitclri_d<const IMM6: u32>(a: v4u64) -> v4u64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvbitclri_d(a, IMM6) + unsafe { __lasx_xvbitclri_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitset_b(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvbitset_b(a, b) +pub fn lasx_xvbitset_b(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvbitset_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitset_h(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvbitset_h(a, b) +pub fn lasx_xvbitset_h(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvbitset_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitset_w(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvbitset_w(a, b) +pub fn lasx_xvbitset_w(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvbitset_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitset_d(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvbitset_d(a, b) +pub fn lasx_xvbitset_d(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvbitset_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitseti_b<const IMM3: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvbitseti_b<const IMM3: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvbitseti_b(a, IMM3) + unsafe { __lasx_xvbitseti_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitseti_h<const IMM4: u32>(a: v16u16) -> v16u16 { +pub fn lasx_xvbitseti_h<const IMM4: u32>(a: v16u16) -> v16u16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvbitseti_h(a, IMM4) + unsafe { __lasx_xvbitseti_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitseti_w<const IMM5: u32>(a: v8u32) -> v8u32 { +pub fn lasx_xvbitseti_w<const IMM5: u32>(a: v8u32) -> v8u32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvbitseti_w(a, IMM5) + unsafe { __lasx_xvbitseti_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitseti_d<const IMM6: u32>(a: v4u64) -> v4u64 { +pub fn lasx_xvbitseti_d<const IMM6: u32>(a: v4u64) -> v4u64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvbitseti_d(a, IMM6) + unsafe { __lasx_xvbitseti_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitrev_b(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvbitrev_b(a, b) +pub fn lasx_xvbitrev_b(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvbitrev_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitrev_h(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvbitrev_h(a, b) +pub fn lasx_xvbitrev_h(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvbitrev_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitrev_w(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvbitrev_w(a, b) +pub fn lasx_xvbitrev_w(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvbitrev_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitrev_d(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvbitrev_d(a, b) +pub fn lasx_xvbitrev_d(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvbitrev_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitrevi_b<const IMM3: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvbitrevi_b<const IMM3: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvbitrevi_b(a, IMM3) + unsafe { __lasx_xvbitrevi_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitrevi_h<const IMM4: u32>(a: v16u16) -> v16u16 { +pub fn lasx_xvbitrevi_h<const IMM4: u32>(a: v16u16) -> v16u16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvbitrevi_h(a, IMM4) + unsafe { __lasx_xvbitrevi_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitrevi_w<const IMM5: u32>(a: v8u32) -> v8u32 { +pub fn lasx_xvbitrevi_w<const IMM5: u32>(a: v8u32) -> v8u32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvbitrevi_w(a, IMM5) + unsafe { __lasx_xvbitrevi_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitrevi_d<const IMM6: u32>(a: v4u64) -> v4u64 { +pub fn lasx_xvbitrevi_d<const IMM6: u32>(a: v4u64) -> v4u64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvbitrevi_d(a, IMM6) + unsafe { __lasx_xvbitrevi_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvadd_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvadd_b(a, b) +pub fn lasx_xvadd_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvadd_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvadd_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvadd_h(a, b) +pub fn lasx_xvadd_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvadd_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvadd_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvadd_w(a, b) +pub fn lasx_xvadd_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvadd_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvadd_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvadd_d(a, b) +pub fn lasx_xvadd_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvadd_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddi_bu<const IMM5: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvaddi_bu<const IMM5: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvaddi_bu(a, IMM5) + unsafe { __lasx_xvaddi_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddi_hu<const IMM5: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvaddi_hu<const IMM5: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvaddi_hu(a, IMM5) + unsafe { __lasx_xvaddi_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddi_wu<const IMM5: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvaddi_wu<const IMM5: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvaddi_wu(a, IMM5) + unsafe { __lasx_xvaddi_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddi_du<const IMM5: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvaddi_du<const IMM5: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvaddi_du(a, IMM5) + unsafe { __lasx_xvaddi_du(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsub_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvsub_b(a, b) +pub fn lasx_xvsub_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvsub_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsub_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvsub_h(a, b) +pub fn lasx_xvsub_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvsub_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsub_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvsub_w(a, b) +pub fn lasx_xvsub_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvsub_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsub_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsub_d(a, b) +pub fn lasx_xvsub_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsub_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubi_bu<const IMM5: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvsubi_bu<const IMM5: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsubi_bu(a, IMM5) + unsafe { __lasx_xvsubi_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubi_hu<const IMM5: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvsubi_hu<const IMM5: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsubi_hu(a, IMM5) + unsafe { __lasx_xvsubi_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubi_wu<const IMM5: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvsubi_wu<const IMM5: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsubi_wu(a, IMM5) + unsafe { __lasx_xvsubi_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubi_du<const IMM5: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvsubi_du<const IMM5: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsubi_du(a, IMM5) + unsafe { __lasx_xvsubi_du(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmax_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvmax_b(a, b) +pub fn lasx_xvmax_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvmax_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmax_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvmax_h(a, b) +pub fn lasx_xvmax_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvmax_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmax_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvmax_w(a, b) +pub fn lasx_xvmax_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvmax_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmax_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvmax_d(a, b) +pub fn lasx_xvmax_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvmax_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaxi_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { +pub fn lasx_xvmaxi_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvmaxi_b(a, IMM_S5) + unsafe { __lasx_xvmaxi_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaxi_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { +pub fn lasx_xvmaxi_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvmaxi_h(a, IMM_S5) + unsafe { __lasx_xvmaxi_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaxi_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { +pub fn lasx_xvmaxi_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvmaxi_w(a, IMM_S5) + unsafe { __lasx_xvmaxi_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaxi_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { +pub fn lasx_xvmaxi_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvmaxi_d(a, IMM_S5) + unsafe { __lasx_xvmaxi_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmax_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvmax_bu(a, b) +pub fn lasx_xvmax_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvmax_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmax_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvmax_hu(a, b) +pub fn lasx_xvmax_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvmax_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmax_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvmax_wu(a, b) +pub fn lasx_xvmax_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvmax_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmax_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvmax_du(a, b) +pub fn lasx_xvmax_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvmax_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaxi_bu<const IMM5: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvmaxi_bu<const IMM5: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvmaxi_bu(a, IMM5) + unsafe { __lasx_xvmaxi_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaxi_hu<const IMM5: u32>(a: v16u16) -> v16u16 { +pub fn lasx_xvmaxi_hu<const IMM5: u32>(a: v16u16) -> v16u16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvmaxi_hu(a, IMM5) + unsafe { __lasx_xvmaxi_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaxi_wu<const IMM5: u32>(a: v8u32) -> v8u32 { +pub fn lasx_xvmaxi_wu<const IMM5: u32>(a: v8u32) -> v8u32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvmaxi_wu(a, IMM5) + unsafe { __lasx_xvmaxi_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaxi_du<const IMM5: u32>(a: v4u64) -> v4u64 { +pub fn lasx_xvmaxi_du<const IMM5: u32>(a: v4u64) -> v4u64 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvmaxi_du(a, IMM5) + unsafe { __lasx_xvmaxi_du(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmin_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvmin_b(a, b) +pub fn lasx_xvmin_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvmin_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmin_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvmin_h(a, b) +pub fn lasx_xvmin_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvmin_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmin_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvmin_w(a, b) +pub fn lasx_xvmin_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvmin_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmin_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvmin_d(a, b) +pub fn lasx_xvmin_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvmin_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmini_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { +pub fn lasx_xvmini_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvmini_b(a, IMM_S5) + unsafe { __lasx_xvmini_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmini_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { +pub fn lasx_xvmini_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvmini_h(a, IMM_S5) + unsafe { __lasx_xvmini_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmini_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { +pub fn lasx_xvmini_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvmini_w(a, IMM_S5) + unsafe { __lasx_xvmini_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmini_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { +pub fn lasx_xvmini_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvmini_d(a, IMM_S5) + unsafe { __lasx_xvmini_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmin_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvmin_bu(a, b) +pub fn lasx_xvmin_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvmin_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmin_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvmin_hu(a, b) +pub fn lasx_xvmin_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvmin_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmin_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvmin_wu(a, b) +pub fn lasx_xvmin_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvmin_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmin_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvmin_du(a, b) +pub fn lasx_xvmin_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvmin_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmini_bu<const IMM5: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvmini_bu<const IMM5: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvmini_bu(a, IMM5) + unsafe { __lasx_xvmini_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmini_hu<const IMM5: u32>(a: v16u16) -> v16u16 { +pub fn lasx_xvmini_hu<const IMM5: u32>(a: v16u16) -> v16u16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvmini_hu(a, IMM5) + unsafe { __lasx_xvmini_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmini_wu<const IMM5: u32>(a: v8u32) -> v8u32 { +pub fn lasx_xvmini_wu<const IMM5: u32>(a: v8u32) -> v8u32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvmini_wu(a, IMM5) + unsafe { __lasx_xvmini_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmini_du<const IMM5: u32>(a: v4u64) -> v4u64 { +pub fn lasx_xvmini_du<const IMM5: u32>(a: v4u64) -> v4u64 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvmini_du(a, IMM5) + unsafe { __lasx_xvmini_du(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvseq_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvseq_b(a, b) +pub fn lasx_xvseq_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvseq_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvseq_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvseq_h(a, b) +pub fn lasx_xvseq_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvseq_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvseq_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvseq_w(a, b) +pub fn lasx_xvseq_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvseq_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvseq_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvseq_d(a, b) +pub fn lasx_xvseq_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvseq_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvseqi_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { +pub fn lasx_xvseqi_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvseqi_b(a, IMM_S5) + unsafe { __lasx_xvseqi_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvseqi_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { +pub fn lasx_xvseqi_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvseqi_h(a, IMM_S5) + unsafe { __lasx_xvseqi_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvseqi_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { +pub fn lasx_xvseqi_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvseqi_w(a, IMM_S5) + unsafe { __lasx_xvseqi_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvseqi_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { +pub fn lasx_xvseqi_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvseqi_d(a, IMM_S5) + unsafe { __lasx_xvseqi_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslt_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvslt_b(a, b) +pub fn lasx_xvslt_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvslt_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslt_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvslt_h(a, b) +pub fn lasx_xvslt_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvslt_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslt_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvslt_w(a, b) +pub fn lasx_xvslt_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvslt_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslt_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvslt_d(a, b) +pub fn lasx_xvslt_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvslt_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslti_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { +pub fn lasx_xvslti_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvslti_b(a, IMM_S5) + unsafe { __lasx_xvslti_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslti_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { +pub fn lasx_xvslti_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvslti_h(a, IMM_S5) + unsafe { __lasx_xvslti_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslti_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { +pub fn lasx_xvslti_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvslti_w(a, IMM_S5) + unsafe { __lasx_xvslti_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslti_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { +pub fn lasx_xvslti_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvslti_d(a, IMM_S5) + unsafe { __lasx_xvslti_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslt_bu(a: v32u8, b: v32u8) -> v32i8 { - __lasx_xvslt_bu(a, b) +pub fn lasx_xvslt_bu(a: v32u8, b: v32u8) -> v32i8 { + unsafe { __lasx_xvslt_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslt_hu(a: v16u16, b: v16u16) -> v16i16 { - __lasx_xvslt_hu(a, b) +pub fn lasx_xvslt_hu(a: v16u16, b: v16u16) -> v16i16 { + unsafe { __lasx_xvslt_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslt_wu(a: v8u32, b: v8u32) -> v8i32 { - __lasx_xvslt_wu(a, b) +pub fn lasx_xvslt_wu(a: v8u32, b: v8u32) -> v8i32 { + unsafe { __lasx_xvslt_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslt_du(a: v4u64, b: v4u64) -> v4i64 { - __lasx_xvslt_du(a, b) +pub fn lasx_xvslt_du(a: v4u64, b: v4u64) -> v4i64 { + unsafe { __lasx_xvslt_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslti_bu<const IMM5: u32>(a: v32u8) -> v32i8 { +pub fn lasx_xvslti_bu<const IMM5: u32>(a: v32u8) -> v32i8 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvslti_bu(a, IMM5) + unsafe { __lasx_xvslti_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslti_hu<const IMM5: u32>(a: v16u16) -> v16i16 { +pub fn lasx_xvslti_hu<const IMM5: u32>(a: v16u16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvslti_hu(a, IMM5) + unsafe { __lasx_xvslti_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslti_wu<const IMM5: u32>(a: v8u32) -> v8i32 { +pub fn lasx_xvslti_wu<const IMM5: u32>(a: v8u32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvslti_wu(a, IMM5) + unsafe { __lasx_xvslti_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslti_du<const IMM5: u32>(a: v4u64) -> v4i64 { +pub fn lasx_xvslti_du<const IMM5: u32>(a: v4u64) -> v4i64 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvslti_du(a, IMM5) + unsafe { __lasx_xvslti_du(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsle_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvsle_b(a, b) +pub fn lasx_xvsle_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvsle_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsle_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvsle_h(a, b) +pub fn lasx_xvsle_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvsle_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsle_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvsle_w(a, b) +pub fn lasx_xvsle_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvsle_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsle_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsle_d(a, b) +pub fn lasx_xvsle_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsle_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslei_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { +pub fn lasx_xvslei_b<const IMM_S5: i32>(a: v32i8) -> v32i8 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvslei_b(a, IMM_S5) + unsafe { __lasx_xvslei_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslei_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { +pub fn lasx_xvslei_h<const IMM_S5: i32>(a: v16i16) -> v16i16 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvslei_h(a, IMM_S5) + unsafe { __lasx_xvslei_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslei_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { +pub fn lasx_xvslei_w<const IMM_S5: i32>(a: v8i32) -> v8i32 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvslei_w(a, IMM_S5) + unsafe { __lasx_xvslei_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslei_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { +pub fn lasx_xvslei_d<const IMM_S5: i32>(a: v4i64) -> v4i64 { static_assert_simm_bits!(IMM_S5, 5); - __lasx_xvslei_d(a, IMM_S5) + unsafe { __lasx_xvslei_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsle_bu(a: v32u8, b: v32u8) -> v32i8 { - __lasx_xvsle_bu(a, b) +pub fn lasx_xvsle_bu(a: v32u8, b: v32u8) -> v32i8 { + unsafe { __lasx_xvsle_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsle_hu(a: v16u16, b: v16u16) -> v16i16 { - __lasx_xvsle_hu(a, b) +pub fn lasx_xvsle_hu(a: v16u16, b: v16u16) -> v16i16 { + unsafe { __lasx_xvsle_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsle_wu(a: v8u32, b: v8u32) -> v8i32 { - __lasx_xvsle_wu(a, b) +pub fn lasx_xvsle_wu(a: v8u32, b: v8u32) -> v8i32 { + unsafe { __lasx_xvsle_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsle_du(a: v4u64, b: v4u64) -> v4i64 { - __lasx_xvsle_du(a, b) +pub fn lasx_xvsle_du(a: v4u64, b: v4u64) -> v4i64 { + unsafe { __lasx_xvsle_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslei_bu<const IMM5: u32>(a: v32u8) -> v32i8 { +pub fn lasx_xvslei_bu<const IMM5: u32>(a: v32u8) -> v32i8 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvslei_bu(a, IMM5) + unsafe { __lasx_xvslei_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslei_hu<const IMM5: u32>(a: v16u16) -> v16i16 { +pub fn lasx_xvslei_hu<const IMM5: u32>(a: v16u16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvslei_hu(a, IMM5) + unsafe { __lasx_xvslei_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslei_wu<const IMM5: u32>(a: v8u32) -> v8i32 { +pub fn lasx_xvslei_wu<const IMM5: u32>(a: v8u32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvslei_wu(a, IMM5) + unsafe { __lasx_xvslei_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvslei_du<const IMM5: u32>(a: v4u64) -> v4i64 { +pub fn lasx_xvslei_du<const IMM5: u32>(a: v4u64) -> v4i64 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvslei_du(a, IMM5) + unsafe { __lasx_xvslei_du(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsat_b<const IMM3: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvsat_b<const IMM3: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvsat_b(a, IMM3) + unsafe { __lasx_xvsat_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsat_h<const IMM4: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvsat_h<const IMM4: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsat_h(a, IMM4) + unsafe { __lasx_xvsat_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsat_w<const IMM5: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvsat_w<const IMM5: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsat_w(a, IMM5) + unsafe { __lasx_xvsat_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsat_d<const IMM6: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvsat_d<const IMM6: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsat_d(a, IMM6) + unsafe { __lasx_xvsat_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsat_bu<const IMM3: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvsat_bu<const IMM3: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvsat_bu(a, IMM3) + unsafe { __lasx_xvsat_bu(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsat_hu<const IMM4: u32>(a: v16u16) -> v16u16 { +pub fn lasx_xvsat_hu<const IMM4: u32>(a: v16u16) -> v16u16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsat_hu(a, IMM4) + unsafe { __lasx_xvsat_hu(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsat_wu<const IMM5: u32>(a: v8u32) -> v8u32 { +pub fn lasx_xvsat_wu<const IMM5: u32>(a: v8u32) -> v8u32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsat_wu(a, IMM5) + unsafe { __lasx_xvsat_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsat_du<const IMM6: u32>(a: v4u64) -> v4u64 { +pub fn lasx_xvsat_du<const IMM6: u32>(a: v4u64) -> v4u64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsat_du(a, IMM6) + unsafe { __lasx_xvsat_du(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvadda_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvadda_b(a, b) +pub fn lasx_xvadda_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvadda_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvadda_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvadda_h(a, b) +pub fn lasx_xvadda_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvadda_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvadda_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvadda_w(a, b) +pub fn lasx_xvadda_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvadda_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvadda_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvadda_d(a, b) +pub fn lasx_xvadda_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvadda_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsadd_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvsadd_b(a, b) +pub fn lasx_xvsadd_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvsadd_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsadd_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvsadd_h(a, b) +pub fn lasx_xvsadd_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvsadd_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsadd_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvsadd_w(a, b) +pub fn lasx_xvsadd_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvsadd_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsadd_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsadd_d(a, b) +pub fn lasx_xvsadd_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsadd_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsadd_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvsadd_bu(a, b) +pub fn lasx_xvsadd_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvsadd_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsadd_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvsadd_hu(a, b) +pub fn lasx_xvsadd_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvsadd_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsadd_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvsadd_wu(a, b) +pub fn lasx_xvsadd_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvsadd_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsadd_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvsadd_du(a, b) +pub fn lasx_xvsadd_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvsadd_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavg_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvavg_b(a, b) +pub fn lasx_xvavg_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvavg_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavg_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvavg_h(a, b) +pub fn lasx_xvavg_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvavg_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavg_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvavg_w(a, b) +pub fn lasx_xvavg_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvavg_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavg_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvavg_d(a, b) +pub fn lasx_xvavg_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvavg_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavg_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvavg_bu(a, b) +pub fn lasx_xvavg_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvavg_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavg_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvavg_hu(a, b) +pub fn lasx_xvavg_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvavg_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavg_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvavg_wu(a, b) +pub fn lasx_xvavg_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvavg_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavg_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvavg_du(a, b) +pub fn lasx_xvavg_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvavg_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavgr_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvavgr_b(a, b) +pub fn lasx_xvavgr_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvavgr_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavgr_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvavgr_h(a, b) +pub fn lasx_xvavgr_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvavgr_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavgr_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvavgr_w(a, b) +pub fn lasx_xvavgr_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvavgr_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavgr_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvavgr_d(a, b) +pub fn lasx_xvavgr_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvavgr_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavgr_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvavgr_bu(a, b) +pub fn lasx_xvavgr_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvavgr_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavgr_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvavgr_hu(a, b) +pub fn lasx_xvavgr_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvavgr_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavgr_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvavgr_wu(a, b) +pub fn lasx_xvavgr_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvavgr_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvavgr_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvavgr_du(a, b) +pub fn lasx_xvavgr_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvavgr_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssub_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvssub_b(a, b) +pub fn lasx_xvssub_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvssub_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssub_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvssub_h(a, b) +pub fn lasx_xvssub_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvssub_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssub_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvssub_w(a, b) +pub fn lasx_xvssub_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvssub_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssub_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvssub_d(a, b) +pub fn lasx_xvssub_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvssub_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssub_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvssub_bu(a, b) +pub fn lasx_xvssub_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvssub_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssub_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvssub_hu(a, b) +pub fn lasx_xvssub_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvssub_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssub_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvssub_wu(a, b) +pub fn lasx_xvssub_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvssub_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssub_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvssub_du(a, b) +pub fn lasx_xvssub_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvssub_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvabsd_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvabsd_b(a, b) +pub fn lasx_xvabsd_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvabsd_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvabsd_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvabsd_h(a, b) +pub fn lasx_xvabsd_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvabsd_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvabsd_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvabsd_w(a, b) +pub fn lasx_xvabsd_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvabsd_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvabsd_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvabsd_d(a, b) +pub fn lasx_xvabsd_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvabsd_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvabsd_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvabsd_bu(a, b) +pub fn lasx_xvabsd_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvabsd_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvabsd_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvabsd_hu(a, b) +pub fn lasx_xvabsd_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvabsd_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvabsd_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvabsd_wu(a, b) +pub fn lasx_xvabsd_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvabsd_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvabsd_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvabsd_du(a, b) +pub fn lasx_xvabsd_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvabsd_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmul_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvmul_b(a, b) +pub fn lasx_xvmul_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvmul_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmul_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvmul_h(a, b) +pub fn lasx_xvmul_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvmul_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmul_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvmul_w(a, b) +pub fn lasx_xvmul_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvmul_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmul_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvmul_d(a, b) +pub fn lasx_xvmul_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvmul_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmadd_b(a: v32i8, b: v32i8, c: v32i8) -> v32i8 { - __lasx_xvmadd_b(a, b, c) +pub fn lasx_xvmadd_b(a: v32i8, b: v32i8, c: v32i8) -> v32i8 { + unsafe { __lasx_xvmadd_b(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmadd_h(a: v16i16, b: v16i16, c: v16i16) -> v16i16 { - __lasx_xvmadd_h(a, b, c) +pub fn lasx_xvmadd_h(a: v16i16, b: v16i16, c: v16i16) -> v16i16 { + unsafe { __lasx_xvmadd_h(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmadd_w(a: v8i32, b: v8i32, c: v8i32) -> v8i32 { - __lasx_xvmadd_w(a, b, c) +pub fn lasx_xvmadd_w(a: v8i32, b: v8i32, c: v8i32) -> v8i32 { + unsafe { __lasx_xvmadd_w(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmadd_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { - __lasx_xvmadd_d(a, b, c) +pub fn lasx_xvmadd_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { + unsafe { __lasx_xvmadd_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmsub_b(a: v32i8, b: v32i8, c: v32i8) -> v32i8 { - __lasx_xvmsub_b(a, b, c) +pub fn lasx_xvmsub_b(a: v32i8, b: v32i8, c: v32i8) -> v32i8 { + unsafe { __lasx_xvmsub_b(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmsub_h(a: v16i16, b: v16i16, c: v16i16) -> v16i16 { - __lasx_xvmsub_h(a, b, c) +pub fn lasx_xvmsub_h(a: v16i16, b: v16i16, c: v16i16) -> v16i16 { + unsafe { __lasx_xvmsub_h(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmsub_w(a: v8i32, b: v8i32, c: v8i32) -> v8i32 { - __lasx_xvmsub_w(a, b, c) +pub fn lasx_xvmsub_w(a: v8i32, b: v8i32, c: v8i32) -> v8i32 { + unsafe { __lasx_xvmsub_w(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmsub_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { - __lasx_xvmsub_d(a, b, c) +pub fn lasx_xvmsub_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { + unsafe { __lasx_xvmsub_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvdiv_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvdiv_b(a, b) +pub fn lasx_xvdiv_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvdiv_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvdiv_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvdiv_h(a, b) +pub fn lasx_xvdiv_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvdiv_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvdiv_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvdiv_w(a, b) +pub fn lasx_xvdiv_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvdiv_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvdiv_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvdiv_d(a, b) +pub fn lasx_xvdiv_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvdiv_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvdiv_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvdiv_bu(a, b) +pub fn lasx_xvdiv_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvdiv_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvdiv_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvdiv_hu(a, b) +pub fn lasx_xvdiv_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvdiv_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvdiv_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvdiv_wu(a, b) +pub fn lasx_xvdiv_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvdiv_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvdiv_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvdiv_du(a, b) +pub fn lasx_xvdiv_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvdiv_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhaddw_h_b(a: v32i8, b: v32i8) -> v16i16 { - __lasx_xvhaddw_h_b(a, b) +pub fn lasx_xvhaddw_h_b(a: v32i8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvhaddw_h_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhaddw_w_h(a: v16i16, b: v16i16) -> v8i32 { - __lasx_xvhaddw_w_h(a, b) +pub fn lasx_xvhaddw_w_h(a: v16i16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvhaddw_w_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhaddw_d_w(a: v8i32, b: v8i32) -> v4i64 { - __lasx_xvhaddw_d_w(a, b) +pub fn lasx_xvhaddw_d_w(a: v8i32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvhaddw_d_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhaddw_hu_bu(a: v32u8, b: v32u8) -> v16u16 { - __lasx_xvhaddw_hu_bu(a, b) +pub fn lasx_xvhaddw_hu_bu(a: v32u8, b: v32u8) -> v16u16 { + unsafe { __lasx_xvhaddw_hu_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhaddw_wu_hu(a: v16u16, b: v16u16) -> v8u32 { - __lasx_xvhaddw_wu_hu(a, b) +pub fn lasx_xvhaddw_wu_hu(a: v16u16, b: v16u16) -> v8u32 { + unsafe { __lasx_xvhaddw_wu_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhaddw_du_wu(a: v8u32, b: v8u32) -> v4u64 { - __lasx_xvhaddw_du_wu(a, b) +pub fn lasx_xvhaddw_du_wu(a: v8u32, b: v8u32) -> v4u64 { + unsafe { __lasx_xvhaddw_du_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhsubw_h_b(a: v32i8, b: v32i8) -> v16i16 { - __lasx_xvhsubw_h_b(a, b) +pub fn lasx_xvhsubw_h_b(a: v32i8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvhsubw_h_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhsubw_w_h(a: v16i16, b: v16i16) -> v8i32 { - __lasx_xvhsubw_w_h(a, b) +pub fn lasx_xvhsubw_w_h(a: v16i16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvhsubw_w_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhsubw_d_w(a: v8i32, b: v8i32) -> v4i64 { - __lasx_xvhsubw_d_w(a, b) +pub fn lasx_xvhsubw_d_w(a: v8i32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvhsubw_d_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhsubw_hu_bu(a: v32u8, b: v32u8) -> v16i16 { - __lasx_xvhsubw_hu_bu(a, b) +pub fn lasx_xvhsubw_hu_bu(a: v32u8, b: v32u8) -> v16i16 { + unsafe { __lasx_xvhsubw_hu_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhsubw_wu_hu(a: v16u16, b: v16u16) -> v8i32 { - __lasx_xvhsubw_wu_hu(a, b) +pub fn lasx_xvhsubw_wu_hu(a: v16u16, b: v16u16) -> v8i32 { + unsafe { __lasx_xvhsubw_wu_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhsubw_du_wu(a: v8u32, b: v8u32) -> v4i64 { - __lasx_xvhsubw_du_wu(a, b) +pub fn lasx_xvhsubw_du_wu(a: v8u32, b: v8u32) -> v4i64 { + unsafe { __lasx_xvhsubw_du_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmod_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvmod_b(a, b) +pub fn lasx_xvmod_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvmod_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmod_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvmod_h(a, b) +pub fn lasx_xvmod_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvmod_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmod_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvmod_w(a, b) +pub fn lasx_xvmod_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvmod_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmod_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvmod_d(a, b) +pub fn lasx_xvmod_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvmod_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmod_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvmod_bu(a, b) +pub fn lasx_xvmod_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvmod_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmod_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvmod_hu(a, b) +pub fn lasx_xvmod_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvmod_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmod_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvmod_wu(a, b) +pub fn lasx_xvmod_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvmod_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmod_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvmod_du(a, b) +pub fn lasx_xvmod_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvmod_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrepl128vei_b<const IMM4: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvrepl128vei_b<const IMM4: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvrepl128vei_b(a, IMM4) + unsafe { __lasx_xvrepl128vei_b(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrepl128vei_h<const IMM3: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvrepl128vei_h<const IMM3: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvrepl128vei_h(a, IMM3) + unsafe { __lasx_xvrepl128vei_h(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrepl128vei_w<const IMM2: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvrepl128vei_w<const IMM2: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM2, 2); - __lasx_xvrepl128vei_w(a, IMM2) + unsafe { __lasx_xvrepl128vei_w(a, IMM2) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrepl128vei_d<const IMM1: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvrepl128vei_d<const IMM1: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM1, 1); - __lasx_xvrepl128vei_d(a, IMM1) + unsafe { __lasx_xvrepl128vei_d(a, IMM1) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickev_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvpickev_b(a, b) +pub fn lasx_xvpickev_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvpickev_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickev_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvpickev_h(a, b) +pub fn lasx_xvpickev_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvpickev_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickev_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvpickev_w(a, b) +pub fn lasx_xvpickev_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvpickev_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickev_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvpickev_d(a, b) +pub fn lasx_xvpickev_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvpickev_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickod_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvpickod_b(a, b) +pub fn lasx_xvpickod_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvpickod_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickod_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvpickod_h(a, b) +pub fn lasx_xvpickod_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvpickod_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickod_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvpickod_w(a, b) +pub fn lasx_xvpickod_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvpickod_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickod_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvpickod_d(a, b) +pub fn lasx_xvpickod_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvpickod_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvilvh_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvilvh_b(a, b) +pub fn lasx_xvilvh_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvilvh_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvilvh_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvilvh_h(a, b) +pub fn lasx_xvilvh_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvilvh_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvilvh_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvilvh_w(a, b) +pub fn lasx_xvilvh_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvilvh_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvilvh_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvilvh_d(a, b) +pub fn lasx_xvilvh_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvilvh_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvilvl_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvilvl_b(a, b) +pub fn lasx_xvilvl_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvilvl_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvilvl_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvilvl_h(a, b) +pub fn lasx_xvilvl_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvilvl_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvilvl_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvilvl_w(a, b) +pub fn lasx_xvilvl_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvilvl_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvilvl_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvilvl_d(a, b) +pub fn lasx_xvilvl_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvilvl_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpackev_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvpackev_b(a, b) +pub fn lasx_xvpackev_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvpackev_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpackev_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvpackev_h(a, b) +pub fn lasx_xvpackev_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvpackev_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpackev_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvpackev_w(a, b) +pub fn lasx_xvpackev_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvpackev_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpackev_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvpackev_d(a, b) +pub fn lasx_xvpackev_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvpackev_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpackod_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvpackod_b(a, b) +pub fn lasx_xvpackod_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvpackod_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpackod_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvpackod_h(a, b) +pub fn lasx_xvpackod_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvpackod_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpackod_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvpackod_w(a, b) +pub fn lasx_xvpackod_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvpackod_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpackod_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvpackod_d(a, b) +pub fn lasx_xvpackod_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvpackod_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvshuf_b(a: v32i8, b: v32i8, c: v32i8) -> v32i8 { - __lasx_xvshuf_b(a, b, c) +pub fn lasx_xvshuf_b(a: v32i8, b: v32i8, c: v32i8) -> v32i8 { + unsafe { __lasx_xvshuf_b(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvshuf_h(a: v16i16, b: v16i16, c: v16i16) -> v16i16 { - __lasx_xvshuf_h(a, b, c) +pub fn lasx_xvshuf_h(a: v16i16, b: v16i16, c: v16i16) -> v16i16 { + unsafe { __lasx_xvshuf_h(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvshuf_w(a: v8i32, b: v8i32, c: v8i32) -> v8i32 { - __lasx_xvshuf_w(a, b, c) +pub fn lasx_xvshuf_w(a: v8i32, b: v8i32, c: v8i32) -> v8i32 { + unsafe { __lasx_xvshuf_w(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvshuf_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { - __lasx_xvshuf_d(a, b, c) +pub fn lasx_xvshuf_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { + unsafe { __lasx_xvshuf_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvand_v(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvand_v(a, b) +pub fn lasx_xvand_v(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvand_v(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvandi_b<const IMM8: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvandi_b<const IMM8: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvandi_b(a, IMM8) + unsafe { __lasx_xvandi_b(a, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvor_v(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvor_v(a, b) +pub fn lasx_xvor_v(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvor_v(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvori_b<const IMM8: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvori_b<const IMM8: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvori_b(a, IMM8) + unsafe { __lasx_xvori_b(a, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvnor_v(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvnor_v(a, b) +pub fn lasx_xvnor_v(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvnor_v(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvnori_b<const IMM8: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvnori_b<const IMM8: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvnori_b(a, IMM8) + unsafe { __lasx_xvnori_b(a, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvxor_v(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvxor_v(a, b) +pub fn lasx_xvxor_v(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvxor_v(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvxori_b<const IMM8: u32>(a: v32u8) -> v32u8 { +pub fn lasx_xvxori_b<const IMM8: u32>(a: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvxori_b(a, IMM8) + unsafe { __lasx_xvxori_b(a, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitsel_v(a: v32u8, b: v32u8, c: v32u8) -> v32u8 { - __lasx_xvbitsel_v(a, b, c) +pub fn lasx_xvbitsel_v(a: v32u8, b: v32u8, c: v32u8) -> v32u8 { + unsafe { __lasx_xvbitsel_v(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbitseli_b<const IMM8: u32>(a: v32u8, b: v32u8) -> v32u8 { +pub fn lasx_xvbitseli_b<const IMM8: u32>(a: v32u8, b: v32u8) -> v32u8 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvbitseli_b(a, b, IMM8) + unsafe { __lasx_xvbitseli_b(a, b, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvshuf4i_b<const IMM8: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvshuf4i_b<const IMM8: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvshuf4i_b(a, IMM8) + unsafe { __lasx_xvshuf4i_b(a, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvshuf4i_h<const IMM8: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvshuf4i_h<const IMM8: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvshuf4i_h(a, IMM8) + unsafe { __lasx_xvshuf4i_h(a, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvshuf4i_w<const IMM8: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvshuf4i_w<const IMM8: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvshuf4i_w(a, IMM8) + unsafe { __lasx_xvshuf4i_w(a, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplgr2vr_b(a: i32) -> v32i8 { - __lasx_xvreplgr2vr_b(a) +pub fn lasx_xvreplgr2vr_b(a: i32) -> v32i8 { + unsafe { __lasx_xvreplgr2vr_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplgr2vr_h(a: i32) -> v16i16 { - __lasx_xvreplgr2vr_h(a) +pub fn lasx_xvreplgr2vr_h(a: i32) -> v16i16 { + unsafe { __lasx_xvreplgr2vr_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplgr2vr_w(a: i32) -> v8i32 { - __lasx_xvreplgr2vr_w(a) +pub fn lasx_xvreplgr2vr_w(a: i32) -> v8i32 { + unsafe { __lasx_xvreplgr2vr_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplgr2vr_d(a: i64) -> v4i64 { - __lasx_xvreplgr2vr_d(a) +pub fn lasx_xvreplgr2vr_d(a: i64) -> v4i64 { + unsafe { __lasx_xvreplgr2vr_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpcnt_b(a: v32i8) -> v32i8 { - __lasx_xvpcnt_b(a) +pub fn lasx_xvpcnt_b(a: v32i8) -> v32i8 { + unsafe { __lasx_xvpcnt_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpcnt_h(a: v16i16) -> v16i16 { - __lasx_xvpcnt_h(a) +pub fn lasx_xvpcnt_h(a: v16i16) -> v16i16 { + unsafe { __lasx_xvpcnt_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpcnt_w(a: v8i32) -> v8i32 { - __lasx_xvpcnt_w(a) +pub fn lasx_xvpcnt_w(a: v8i32) -> v8i32 { + unsafe { __lasx_xvpcnt_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpcnt_d(a: v4i64) -> v4i64 { - __lasx_xvpcnt_d(a) +pub fn lasx_xvpcnt_d(a: v4i64) -> v4i64 { + unsafe { __lasx_xvpcnt_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvclo_b(a: v32i8) -> v32i8 { - __lasx_xvclo_b(a) +pub fn lasx_xvclo_b(a: v32i8) -> v32i8 { + unsafe { __lasx_xvclo_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvclo_h(a: v16i16) -> v16i16 { - __lasx_xvclo_h(a) +pub fn lasx_xvclo_h(a: v16i16) -> v16i16 { + unsafe { __lasx_xvclo_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvclo_w(a: v8i32) -> v8i32 { - __lasx_xvclo_w(a) +pub fn lasx_xvclo_w(a: v8i32) -> v8i32 { + unsafe { __lasx_xvclo_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvclo_d(a: v4i64) -> v4i64 { - __lasx_xvclo_d(a) +pub fn lasx_xvclo_d(a: v4i64) -> v4i64 { + unsafe { __lasx_xvclo_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvclz_b(a: v32i8) -> v32i8 { - __lasx_xvclz_b(a) +pub fn lasx_xvclz_b(a: v32i8) -> v32i8 { + unsafe { __lasx_xvclz_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvclz_h(a: v16i16) -> v16i16 { - __lasx_xvclz_h(a) +pub fn lasx_xvclz_h(a: v16i16) -> v16i16 { + unsafe { __lasx_xvclz_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvclz_w(a: v8i32) -> v8i32 { - __lasx_xvclz_w(a) +pub fn lasx_xvclz_w(a: v8i32) -> v8i32 { + unsafe { __lasx_xvclz_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvclz_d(a: v4i64) -> v4i64 { - __lasx_xvclz_d(a) +pub fn lasx_xvclz_d(a: v4i64) -> v4i64 { + unsafe { __lasx_xvclz_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfadd_s(a: v8f32, b: v8f32) -> v8f32 { - __lasx_xvfadd_s(a, b) +pub fn lasx_xvfadd_s(a: v8f32, b: v8f32) -> v8f32 { + unsafe { __lasx_xvfadd_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfadd_d(a: v4f64, b: v4f64) -> v4f64 { - __lasx_xvfadd_d(a, b) +pub fn lasx_xvfadd_d(a: v4f64, b: v4f64) -> v4f64 { + unsafe { __lasx_xvfadd_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfsub_s(a: v8f32, b: v8f32) -> v8f32 { - __lasx_xvfsub_s(a, b) +pub fn lasx_xvfsub_s(a: v8f32, b: v8f32) -> v8f32 { + unsafe { __lasx_xvfsub_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfsub_d(a: v4f64, b: v4f64) -> v4f64 { - __lasx_xvfsub_d(a, b) +pub fn lasx_xvfsub_d(a: v4f64, b: v4f64) -> v4f64 { + unsafe { __lasx_xvfsub_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmul_s(a: v8f32, b: v8f32) -> v8f32 { - __lasx_xvfmul_s(a, b) +pub fn lasx_xvfmul_s(a: v8f32, b: v8f32) -> v8f32 { + unsafe { __lasx_xvfmul_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmul_d(a: v4f64, b: v4f64) -> v4f64 { - __lasx_xvfmul_d(a, b) +pub fn lasx_xvfmul_d(a: v4f64, b: v4f64) -> v4f64 { + unsafe { __lasx_xvfmul_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfdiv_s(a: v8f32, b: v8f32) -> v8f32 { - __lasx_xvfdiv_s(a, b) +pub fn lasx_xvfdiv_s(a: v8f32, b: v8f32) -> v8f32 { + unsafe { __lasx_xvfdiv_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfdiv_d(a: v4f64, b: v4f64) -> v4f64 { - __lasx_xvfdiv_d(a, b) +pub fn lasx_xvfdiv_d(a: v4f64, b: v4f64) -> v4f64 { + unsafe { __lasx_xvfdiv_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcvt_h_s(a: v8f32, b: v8f32) -> v16i16 { - __lasx_xvfcvt_h_s(a, b) +pub fn lasx_xvfcvt_h_s(a: v8f32, b: v8f32) -> v16i16 { + unsafe { __lasx_xvfcvt_h_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcvt_s_d(a: v4f64, b: v4f64) -> v8f32 { - __lasx_xvfcvt_s_d(a, b) +pub fn lasx_xvfcvt_s_d(a: v4f64, b: v4f64) -> v8f32 { + unsafe { __lasx_xvfcvt_s_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmin_s(a: v8f32, b: v8f32) -> v8f32 { - __lasx_xvfmin_s(a, b) +pub fn lasx_xvfmin_s(a: v8f32, b: v8f32) -> v8f32 { + unsafe { __lasx_xvfmin_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmin_d(a: v4f64, b: v4f64) -> v4f64 { - __lasx_xvfmin_d(a, b) +pub fn lasx_xvfmin_d(a: v4f64, b: v4f64) -> v4f64 { + unsafe { __lasx_xvfmin_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmina_s(a: v8f32, b: v8f32) -> v8f32 { - __lasx_xvfmina_s(a, b) +pub fn lasx_xvfmina_s(a: v8f32, b: v8f32) -> v8f32 { + unsafe { __lasx_xvfmina_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmina_d(a: v4f64, b: v4f64) -> v4f64 { - __lasx_xvfmina_d(a, b) +pub fn lasx_xvfmina_d(a: v4f64, b: v4f64) -> v4f64 { + unsafe { __lasx_xvfmina_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmax_s(a: v8f32, b: v8f32) -> v8f32 { - __lasx_xvfmax_s(a, b) +pub fn lasx_xvfmax_s(a: v8f32, b: v8f32) -> v8f32 { + unsafe { __lasx_xvfmax_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmax_d(a: v4f64, b: v4f64) -> v4f64 { - __lasx_xvfmax_d(a, b) +pub fn lasx_xvfmax_d(a: v4f64, b: v4f64) -> v4f64 { + unsafe { __lasx_xvfmax_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmaxa_s(a: v8f32, b: v8f32) -> v8f32 { - __lasx_xvfmaxa_s(a, b) +pub fn lasx_xvfmaxa_s(a: v8f32, b: v8f32) -> v8f32 { + unsafe { __lasx_xvfmaxa_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmaxa_d(a: v4f64, b: v4f64) -> v4f64 { - __lasx_xvfmaxa_d(a, b) +pub fn lasx_xvfmaxa_d(a: v4f64, b: v4f64) -> v4f64 { + unsafe { __lasx_xvfmaxa_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfclass_s(a: v8f32) -> v8i32 { - __lasx_xvfclass_s(a) +pub fn lasx_xvfclass_s(a: v8f32) -> v8i32 { + unsafe { __lasx_xvfclass_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfclass_d(a: v4f64) -> v4i64 { - __lasx_xvfclass_d(a) +pub fn lasx_xvfclass_d(a: v4f64) -> v4i64 { + unsafe { __lasx_xvfclass_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfsqrt_s(a: v8f32) -> v8f32 { - __lasx_xvfsqrt_s(a) +pub fn lasx_xvfsqrt_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfsqrt_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfsqrt_d(a: v4f64) -> v4f64 { - __lasx_xvfsqrt_d(a) +pub fn lasx_xvfsqrt_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfsqrt_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrecip_s(a: v8f32) -> v8f32 { - __lasx_xvfrecip_s(a) +pub fn lasx_xvfrecip_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfrecip_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrecip_d(a: v4f64) -> v4f64 { - __lasx_xvfrecip_d(a) +pub fn lasx_xvfrecip_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfrecip_d(a) } } #[inline] #[target_feature(enable = "lasx,frecipe")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrecipe_s(a: v8f32) -> v8f32 { - __lasx_xvfrecipe_s(a) +pub fn lasx_xvfrecipe_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfrecipe_s(a) } } #[inline] #[target_feature(enable = "lasx,frecipe")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrecipe_d(a: v4f64) -> v4f64 { - __lasx_xvfrecipe_d(a) +pub fn lasx_xvfrecipe_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfrecipe_d(a) } } #[inline] #[target_feature(enable = "lasx,frecipe")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrsqrte_s(a: v8f32) -> v8f32 { - __lasx_xvfrsqrte_s(a) +pub fn lasx_xvfrsqrte_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfrsqrte_s(a) } } #[inline] #[target_feature(enable = "lasx,frecipe")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrsqrte_d(a: v4f64) -> v4f64 { - __lasx_xvfrsqrte_d(a) +pub fn lasx_xvfrsqrte_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfrsqrte_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrint_s(a: v8f32) -> v8f32 { - __lasx_xvfrint_s(a) +pub fn lasx_xvfrint_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfrint_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrint_d(a: v4f64) -> v4f64 { - __lasx_xvfrint_d(a) +pub fn lasx_xvfrint_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfrint_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrsqrt_s(a: v8f32) -> v8f32 { - __lasx_xvfrsqrt_s(a) +pub fn lasx_xvfrsqrt_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfrsqrt_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrsqrt_d(a: v4f64) -> v4f64 { - __lasx_xvfrsqrt_d(a) +pub fn lasx_xvfrsqrt_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfrsqrt_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvflogb_s(a: v8f32) -> v8f32 { - __lasx_xvflogb_s(a) +pub fn lasx_xvflogb_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvflogb_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvflogb_d(a: v4f64) -> v4f64 { - __lasx_xvflogb_d(a) +pub fn lasx_xvflogb_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvflogb_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcvth_s_h(a: v16i16) -> v8f32 { - __lasx_xvfcvth_s_h(a) +pub fn lasx_xvfcvth_s_h(a: v16i16) -> v8f32 { + unsafe { __lasx_xvfcvth_s_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcvth_d_s(a: v8f32) -> v4f64 { - __lasx_xvfcvth_d_s(a) +pub fn lasx_xvfcvth_d_s(a: v8f32) -> v4f64 { + unsafe { __lasx_xvfcvth_d_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcvtl_s_h(a: v16i16) -> v8f32 { - __lasx_xvfcvtl_s_h(a) +pub fn lasx_xvfcvtl_s_h(a: v16i16) -> v8f32 { + unsafe { __lasx_xvfcvtl_s_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcvtl_d_s(a: v8f32) -> v4f64 { - __lasx_xvfcvtl_d_s(a) +pub fn lasx_xvfcvtl_d_s(a: v8f32) -> v4f64 { + unsafe { __lasx_xvfcvtl_d_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftint_w_s(a: v8f32) -> v8i32 { - __lasx_xvftint_w_s(a) +pub fn lasx_xvftint_w_s(a: v8f32) -> v8i32 { + unsafe { __lasx_xvftint_w_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftint_l_d(a: v4f64) -> v4i64 { - __lasx_xvftint_l_d(a) +pub fn lasx_xvftint_l_d(a: v4f64) -> v4i64 { + unsafe { __lasx_xvftint_l_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftint_wu_s(a: v8f32) -> v8u32 { - __lasx_xvftint_wu_s(a) +pub fn lasx_xvftint_wu_s(a: v8f32) -> v8u32 { + unsafe { __lasx_xvftint_wu_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftint_lu_d(a: v4f64) -> v4u64 { - __lasx_xvftint_lu_d(a) +pub fn lasx_xvftint_lu_d(a: v4f64) -> v4u64 { + unsafe { __lasx_xvftint_lu_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrz_w_s(a: v8f32) -> v8i32 { - __lasx_xvftintrz_w_s(a) +pub fn lasx_xvftintrz_w_s(a: v8f32) -> v8i32 { + unsafe { __lasx_xvftintrz_w_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrz_l_d(a: v4f64) -> v4i64 { - __lasx_xvftintrz_l_d(a) +pub fn lasx_xvftintrz_l_d(a: v4f64) -> v4i64 { + unsafe { __lasx_xvftintrz_l_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrz_wu_s(a: v8f32) -> v8u32 { - __lasx_xvftintrz_wu_s(a) +pub fn lasx_xvftintrz_wu_s(a: v8f32) -> v8u32 { + unsafe { __lasx_xvftintrz_wu_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrz_lu_d(a: v4f64) -> v4u64 { - __lasx_xvftintrz_lu_d(a) +pub fn lasx_xvftintrz_lu_d(a: v4f64) -> v4u64 { + unsafe { __lasx_xvftintrz_lu_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvffint_s_w(a: v8i32) -> v8f32 { - __lasx_xvffint_s_w(a) +pub fn lasx_xvffint_s_w(a: v8i32) -> v8f32 { + unsafe { __lasx_xvffint_s_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvffint_d_l(a: v4i64) -> v4f64 { - __lasx_xvffint_d_l(a) +pub fn lasx_xvffint_d_l(a: v4i64) -> v4f64 { + unsafe { __lasx_xvffint_d_l(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvffint_s_wu(a: v8u32) -> v8f32 { - __lasx_xvffint_s_wu(a) +pub fn lasx_xvffint_s_wu(a: v8u32) -> v8f32 { + unsafe { __lasx_xvffint_s_wu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvffint_d_lu(a: v4u64) -> v4f64 { - __lasx_xvffint_d_lu(a) +pub fn lasx_xvffint_d_lu(a: v4u64) -> v4f64 { + unsafe { __lasx_xvffint_d_lu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplve_b(a: v32i8, b: i32) -> v32i8 { - __lasx_xvreplve_b(a, b) +pub fn lasx_xvreplve_b(a: v32i8, b: i32) -> v32i8 { + unsafe { __lasx_xvreplve_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplve_h(a: v16i16, b: i32) -> v16i16 { - __lasx_xvreplve_h(a, b) +pub fn lasx_xvreplve_h(a: v16i16, b: i32) -> v16i16 { + unsafe { __lasx_xvreplve_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplve_w(a: v8i32, b: i32) -> v8i32 { - __lasx_xvreplve_w(a, b) +pub fn lasx_xvreplve_w(a: v8i32, b: i32) -> v8i32 { + unsafe { __lasx_xvreplve_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplve_d(a: v4i64, b: i32) -> v4i64 { - __lasx_xvreplve_d(a, b) +pub fn lasx_xvreplve_d(a: v4i64, b: i32) -> v4i64 { + unsafe { __lasx_xvreplve_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpermi_w<const IMM8: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvpermi_w<const IMM8: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvpermi_w(a, b, IMM8) + unsafe { __lasx_xvpermi_w(a, b, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvandn_v(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvandn_v(a, b) +pub fn lasx_xvandn_v(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvandn_v(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvneg_b(a: v32i8) -> v32i8 { - __lasx_xvneg_b(a) +pub fn lasx_xvneg_b(a: v32i8) -> v32i8 { + unsafe { __lasx_xvneg_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvneg_h(a: v16i16) -> v16i16 { - __lasx_xvneg_h(a) +pub fn lasx_xvneg_h(a: v16i16) -> v16i16 { + unsafe { __lasx_xvneg_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvneg_w(a: v8i32) -> v8i32 { - __lasx_xvneg_w(a) +pub fn lasx_xvneg_w(a: v8i32) -> v8i32 { + unsafe { __lasx_xvneg_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvneg_d(a: v4i64) -> v4i64 { - __lasx_xvneg_d(a) +pub fn lasx_xvneg_d(a: v4i64) -> v4i64 { + unsafe { __lasx_xvneg_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmuh_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvmuh_b(a, b) +pub fn lasx_xvmuh_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvmuh_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmuh_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvmuh_h(a, b) +pub fn lasx_xvmuh_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvmuh_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmuh_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvmuh_w(a, b) +pub fn lasx_xvmuh_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvmuh_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmuh_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvmuh_d(a, b) +pub fn lasx_xvmuh_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvmuh_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmuh_bu(a: v32u8, b: v32u8) -> v32u8 { - __lasx_xvmuh_bu(a, b) +pub fn lasx_xvmuh_bu(a: v32u8, b: v32u8) -> v32u8 { + unsafe { __lasx_xvmuh_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmuh_hu(a: v16u16, b: v16u16) -> v16u16 { - __lasx_xvmuh_hu(a, b) +pub fn lasx_xvmuh_hu(a: v16u16, b: v16u16) -> v16u16 { + unsafe { __lasx_xvmuh_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmuh_wu(a: v8u32, b: v8u32) -> v8u32 { - __lasx_xvmuh_wu(a, b) +pub fn lasx_xvmuh_wu(a: v8u32, b: v8u32) -> v8u32 { + unsafe { __lasx_xvmuh_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmuh_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvmuh_du(a, b) +pub fn lasx_xvmuh_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvmuh_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsllwil_h_b<const IMM3: u32>(a: v32i8) -> v16i16 { +pub fn lasx_xvsllwil_h_b<const IMM3: u32>(a: v32i8) -> v16i16 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvsllwil_h_b(a, IMM3) + unsafe { __lasx_xvsllwil_h_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsllwil_w_h<const IMM4: u32>(a: v16i16) -> v8i32 { +pub fn lasx_xvsllwil_w_h<const IMM4: u32>(a: v16i16) -> v8i32 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsllwil_w_h(a, IMM4) + unsafe { __lasx_xvsllwil_w_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsllwil_d_w<const IMM5: u32>(a: v8i32) -> v4i64 { +pub fn lasx_xvsllwil_d_w<const IMM5: u32>(a: v8i32) -> v4i64 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsllwil_d_w(a, IMM5) + unsafe { __lasx_xvsllwil_d_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsllwil_hu_bu<const IMM3: u32>(a: v32u8) -> v16u16 { +pub fn lasx_xvsllwil_hu_bu<const IMM3: u32>(a: v32u8) -> v16u16 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvsllwil_hu_bu(a, IMM3) + unsafe { __lasx_xvsllwil_hu_bu(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsllwil_wu_hu<const IMM4: u32>(a: v16u16) -> v8u32 { +pub fn lasx_xvsllwil_wu_hu<const IMM4: u32>(a: v16u16) -> v8u32 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsllwil_wu_hu(a, IMM4) + unsafe { __lasx_xvsllwil_wu_hu(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsllwil_du_wu<const IMM5: u32>(a: v8u32) -> v4u64 { +pub fn lasx_xvsllwil_du_wu<const IMM5: u32>(a: v8u32) -> v4u64 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsllwil_du_wu(a, IMM5) + unsafe { __lasx_xvsllwil_du_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsran_b_h(a: v16i16, b: v16i16) -> v32i8 { - __lasx_xvsran_b_h(a, b) +pub fn lasx_xvsran_b_h(a: v16i16, b: v16i16) -> v32i8 { + unsafe { __lasx_xvsran_b_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsran_h_w(a: v8i32, b: v8i32) -> v16i16 { - __lasx_xvsran_h_w(a, b) +pub fn lasx_xvsran_h_w(a: v8i32, b: v8i32) -> v16i16 { + unsafe { __lasx_xvsran_h_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsran_w_d(a: v4i64, b: v4i64) -> v8i32 { - __lasx_xvsran_w_d(a, b) +pub fn lasx_xvsran_w_d(a: v4i64, b: v4i64) -> v8i32 { + unsafe { __lasx_xvsran_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssran_b_h(a: v16i16, b: v16i16) -> v32i8 { - __lasx_xvssran_b_h(a, b) +pub fn lasx_xvssran_b_h(a: v16i16, b: v16i16) -> v32i8 { + unsafe { __lasx_xvssran_b_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssran_h_w(a: v8i32, b: v8i32) -> v16i16 { - __lasx_xvssran_h_w(a, b) +pub fn lasx_xvssran_h_w(a: v8i32, b: v8i32) -> v16i16 { + unsafe { __lasx_xvssran_h_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssran_w_d(a: v4i64, b: v4i64) -> v8i32 { - __lasx_xvssran_w_d(a, b) +pub fn lasx_xvssran_w_d(a: v4i64, b: v4i64) -> v8i32 { + unsafe { __lasx_xvssran_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssran_bu_h(a: v16u16, b: v16u16) -> v32u8 { - __lasx_xvssran_bu_h(a, b) +pub fn lasx_xvssran_bu_h(a: v16u16, b: v16u16) -> v32u8 { + unsafe { __lasx_xvssran_bu_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssran_hu_w(a: v8u32, b: v8u32) -> v16u16 { - __lasx_xvssran_hu_w(a, b) +pub fn lasx_xvssran_hu_w(a: v8u32, b: v8u32) -> v16u16 { + unsafe { __lasx_xvssran_hu_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssran_wu_d(a: v4u64, b: v4u64) -> v8u32 { - __lasx_xvssran_wu_d(a, b) +pub fn lasx_xvssran_wu_d(a: v4u64, b: v4u64) -> v8u32 { + unsafe { __lasx_xvssran_wu_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrarn_b_h(a: v16i16, b: v16i16) -> v32i8 { - __lasx_xvsrarn_b_h(a, b) +pub fn lasx_xvsrarn_b_h(a: v16i16, b: v16i16) -> v32i8 { + unsafe { __lasx_xvsrarn_b_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrarn_h_w(a: v8i32, b: v8i32) -> v16i16 { - __lasx_xvsrarn_h_w(a, b) +pub fn lasx_xvsrarn_h_w(a: v8i32, b: v8i32) -> v16i16 { + unsafe { __lasx_xvsrarn_h_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrarn_w_d(a: v4i64, b: v4i64) -> v8i32 { - __lasx_xvsrarn_w_d(a, b) +pub fn lasx_xvsrarn_w_d(a: v4i64, b: v4i64) -> v8i32 { + unsafe { __lasx_xvsrarn_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarn_b_h(a: v16i16, b: v16i16) -> v32i8 { - __lasx_xvssrarn_b_h(a, b) +pub fn lasx_xvssrarn_b_h(a: v16i16, b: v16i16) -> v32i8 { + unsafe { __lasx_xvssrarn_b_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarn_h_w(a: v8i32, b: v8i32) -> v16i16 { - __lasx_xvssrarn_h_w(a, b) +pub fn lasx_xvssrarn_h_w(a: v8i32, b: v8i32) -> v16i16 { + unsafe { __lasx_xvssrarn_h_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarn_w_d(a: v4i64, b: v4i64) -> v8i32 { - __lasx_xvssrarn_w_d(a, b) +pub fn lasx_xvssrarn_w_d(a: v4i64, b: v4i64) -> v8i32 { + unsafe { __lasx_xvssrarn_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarn_bu_h(a: v16u16, b: v16u16) -> v32u8 { - __lasx_xvssrarn_bu_h(a, b) +pub fn lasx_xvssrarn_bu_h(a: v16u16, b: v16u16) -> v32u8 { + unsafe { __lasx_xvssrarn_bu_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarn_hu_w(a: v8u32, b: v8u32) -> v16u16 { - __lasx_xvssrarn_hu_w(a, b) +pub fn lasx_xvssrarn_hu_w(a: v8u32, b: v8u32) -> v16u16 { + unsafe { __lasx_xvssrarn_hu_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarn_wu_d(a: v4u64, b: v4u64) -> v8u32 { - __lasx_xvssrarn_wu_d(a, b) +pub fn lasx_xvssrarn_wu_d(a: v4u64, b: v4u64) -> v8u32 { + unsafe { __lasx_xvssrarn_wu_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrln_b_h(a: v16i16, b: v16i16) -> v32i8 { - __lasx_xvsrln_b_h(a, b) +pub fn lasx_xvsrln_b_h(a: v16i16, b: v16i16) -> v32i8 { + unsafe { __lasx_xvsrln_b_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrln_h_w(a: v8i32, b: v8i32) -> v16i16 { - __lasx_xvsrln_h_w(a, b) +pub fn lasx_xvsrln_h_w(a: v8i32, b: v8i32) -> v16i16 { + unsafe { __lasx_xvsrln_h_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrln_w_d(a: v4i64, b: v4i64) -> v8i32 { - __lasx_xvsrln_w_d(a, b) +pub fn lasx_xvsrln_w_d(a: v4i64, b: v4i64) -> v8i32 { + unsafe { __lasx_xvsrln_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrln_bu_h(a: v16u16, b: v16u16) -> v32u8 { - __lasx_xvssrln_bu_h(a, b) +pub fn lasx_xvssrln_bu_h(a: v16u16, b: v16u16) -> v32u8 { + unsafe { __lasx_xvssrln_bu_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrln_hu_w(a: v8u32, b: v8u32) -> v16u16 { - __lasx_xvssrln_hu_w(a, b) +pub fn lasx_xvssrln_hu_w(a: v8u32, b: v8u32) -> v16u16 { + unsafe { __lasx_xvssrln_hu_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrln_wu_d(a: v4u64, b: v4u64) -> v8u32 { - __lasx_xvssrln_wu_d(a, b) +pub fn lasx_xvssrln_wu_d(a: v4u64, b: v4u64) -> v8u32 { + unsafe { __lasx_xvssrln_wu_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlrn_b_h(a: v16i16, b: v16i16) -> v32i8 { - __lasx_xvsrlrn_b_h(a, b) +pub fn lasx_xvsrlrn_b_h(a: v16i16, b: v16i16) -> v32i8 { + unsafe { __lasx_xvsrlrn_b_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlrn_h_w(a: v8i32, b: v8i32) -> v16i16 { - __lasx_xvsrlrn_h_w(a, b) +pub fn lasx_xvsrlrn_h_w(a: v8i32, b: v8i32) -> v16i16 { + unsafe { __lasx_xvsrlrn_h_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlrn_w_d(a: v4i64, b: v4i64) -> v8i32 { - __lasx_xvsrlrn_w_d(a, b) +pub fn lasx_xvsrlrn_w_d(a: v4i64, b: v4i64) -> v8i32 { + unsafe { __lasx_xvsrlrn_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrn_bu_h(a: v16u16, b: v16u16) -> v32u8 { - __lasx_xvssrlrn_bu_h(a, b) +pub fn lasx_xvssrlrn_bu_h(a: v16u16, b: v16u16) -> v32u8 { + unsafe { __lasx_xvssrlrn_bu_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrn_hu_w(a: v8u32, b: v8u32) -> v16u16 { - __lasx_xvssrlrn_hu_w(a, b) +pub fn lasx_xvssrlrn_hu_w(a: v8u32, b: v8u32) -> v16u16 { + unsafe { __lasx_xvssrlrn_hu_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrn_wu_d(a: v4u64, b: v4u64) -> v8u32 { - __lasx_xvssrlrn_wu_d(a, b) +pub fn lasx_xvssrlrn_wu_d(a: v4u64, b: v4u64) -> v8u32 { + unsafe { __lasx_xvssrlrn_wu_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrstpi_b<const IMM5: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvfrstpi_b<const IMM5: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvfrstpi_b(a, b, IMM5) + unsafe { __lasx_xvfrstpi_b(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrstpi_h<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvfrstpi_h<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvfrstpi_h(a, b, IMM5) + unsafe { __lasx_xvfrstpi_h(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrstp_b(a: v32i8, b: v32i8, c: v32i8) -> v32i8 { - __lasx_xvfrstp_b(a, b, c) +pub fn lasx_xvfrstp_b(a: v32i8, b: v32i8, c: v32i8) -> v32i8 { + unsafe { __lasx_xvfrstp_b(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrstp_h(a: v16i16, b: v16i16, c: v16i16) -> v16i16 { - __lasx_xvfrstp_h(a, b, c) +pub fn lasx_xvfrstp_h(a: v16i16, b: v16i16, c: v16i16) -> v16i16 { + unsafe { __lasx_xvfrstp_h(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvshuf4i_d<const IMM8: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvshuf4i_d<const IMM8: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvshuf4i_d(a, b, IMM8) + unsafe { __lasx_xvshuf4i_d(a, b, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbsrl_v<const IMM5: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvbsrl_v<const IMM5: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvbsrl_v(a, IMM5) + unsafe { __lasx_xvbsrl_v(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvbsll_v<const IMM5: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvbsll_v<const IMM5: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvbsll_v(a, IMM5) + unsafe { __lasx_xvbsll_v(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvextrins_b<const IMM8: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvextrins_b<const IMM8: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvextrins_b(a, b, IMM8) + unsafe { __lasx_xvextrins_b(a, b, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvextrins_h<const IMM8: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvextrins_h<const IMM8: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvextrins_h(a, b, IMM8) + unsafe { __lasx_xvextrins_h(a, b, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvextrins_w<const IMM8: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvextrins_w<const IMM8: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvextrins_w(a, b, IMM8) + unsafe { __lasx_xvextrins_w(a, b, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvextrins_d<const IMM8: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvextrins_d<const IMM8: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvextrins_d(a, b, IMM8) + unsafe { __lasx_xvextrins_d(a, b, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmskltz_b(a: v32i8) -> v32i8 { - __lasx_xvmskltz_b(a) +pub fn lasx_xvmskltz_b(a: v32i8) -> v32i8 { + unsafe { __lasx_xvmskltz_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmskltz_h(a: v16i16) -> v16i16 { - __lasx_xvmskltz_h(a) +pub fn lasx_xvmskltz_h(a: v16i16) -> v16i16 { + unsafe { __lasx_xvmskltz_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmskltz_w(a: v8i32) -> v8i32 { - __lasx_xvmskltz_w(a) +pub fn lasx_xvmskltz_w(a: v8i32) -> v8i32 { + unsafe { __lasx_xvmskltz_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmskltz_d(a: v4i64) -> v4i64 { - __lasx_xvmskltz_d(a) +pub fn lasx_xvmskltz_d(a: v4i64) -> v4i64 { + unsafe { __lasx_xvmskltz_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsigncov_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvsigncov_b(a, b) +pub fn lasx_xvsigncov_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvsigncov_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsigncov_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvsigncov_h(a, b) +pub fn lasx_xvsigncov_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvsigncov_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsigncov_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvsigncov_w(a, b) +pub fn lasx_xvsigncov_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvsigncov_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsigncov_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsigncov_d(a, b) +pub fn lasx_xvsigncov_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsigncov_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmadd_s(a: v8f32, b: v8f32, c: v8f32) -> v8f32 { - __lasx_xvfmadd_s(a, b, c) +pub fn lasx_xvfmadd_s(a: v8f32, b: v8f32, c: v8f32) -> v8f32 { + unsafe { __lasx_xvfmadd_s(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmadd_d(a: v4f64, b: v4f64, c: v4f64) -> v4f64 { - __lasx_xvfmadd_d(a, b, c) +pub fn lasx_xvfmadd_d(a: v4f64, b: v4f64, c: v4f64) -> v4f64 { + unsafe { __lasx_xvfmadd_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmsub_s(a: v8f32, b: v8f32, c: v8f32) -> v8f32 { - __lasx_xvfmsub_s(a, b, c) +pub fn lasx_xvfmsub_s(a: v8f32, b: v8f32, c: v8f32) -> v8f32 { + unsafe { __lasx_xvfmsub_s(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfmsub_d(a: v4f64, b: v4f64, c: v4f64) -> v4f64 { - __lasx_xvfmsub_d(a, b, c) +pub fn lasx_xvfmsub_d(a: v4f64, b: v4f64, c: v4f64) -> v4f64 { + unsafe { __lasx_xvfmsub_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfnmadd_s(a: v8f32, b: v8f32, c: v8f32) -> v8f32 { - __lasx_xvfnmadd_s(a, b, c) +pub fn lasx_xvfnmadd_s(a: v8f32, b: v8f32, c: v8f32) -> v8f32 { + unsafe { __lasx_xvfnmadd_s(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfnmadd_d(a: v4f64, b: v4f64, c: v4f64) -> v4f64 { - __lasx_xvfnmadd_d(a, b, c) +pub fn lasx_xvfnmadd_d(a: v4f64, b: v4f64, c: v4f64) -> v4f64 { + unsafe { __lasx_xvfnmadd_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfnmsub_s(a: v8f32, b: v8f32, c: v8f32) -> v8f32 { - __lasx_xvfnmsub_s(a, b, c) +pub fn lasx_xvfnmsub_s(a: v8f32, b: v8f32, c: v8f32) -> v8f32 { + unsafe { __lasx_xvfnmsub_s(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfnmsub_d(a: v4f64, b: v4f64, c: v4f64) -> v4f64 { - __lasx_xvfnmsub_d(a, b, c) +pub fn lasx_xvfnmsub_d(a: v4f64, b: v4f64, c: v4f64) -> v4f64 { + unsafe { __lasx_xvfnmsub_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrne_w_s(a: v8f32) -> v8i32 { - __lasx_xvftintrne_w_s(a) +pub fn lasx_xvftintrne_w_s(a: v8f32) -> v8i32 { + unsafe { __lasx_xvftintrne_w_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrne_l_d(a: v4f64) -> v4i64 { - __lasx_xvftintrne_l_d(a) +pub fn lasx_xvftintrne_l_d(a: v4f64) -> v4i64 { + unsafe { __lasx_xvftintrne_l_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrp_w_s(a: v8f32) -> v8i32 { - __lasx_xvftintrp_w_s(a) +pub fn lasx_xvftintrp_w_s(a: v8f32) -> v8i32 { + unsafe { __lasx_xvftintrp_w_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrp_l_d(a: v4f64) -> v4i64 { - __lasx_xvftintrp_l_d(a) +pub fn lasx_xvftintrp_l_d(a: v4f64) -> v4i64 { + unsafe { __lasx_xvftintrp_l_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrm_w_s(a: v8f32) -> v8i32 { - __lasx_xvftintrm_w_s(a) +pub fn lasx_xvftintrm_w_s(a: v8f32) -> v8i32 { + unsafe { __lasx_xvftintrm_w_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrm_l_d(a: v4f64) -> v4i64 { - __lasx_xvftintrm_l_d(a) +pub fn lasx_xvftintrm_l_d(a: v4f64) -> v4i64 { + unsafe { __lasx_xvftintrm_l_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftint_w_d(a: v4f64, b: v4f64) -> v8i32 { - __lasx_xvftint_w_d(a, b) +pub fn lasx_xvftint_w_d(a: v4f64, b: v4f64) -> v8i32 { + unsafe { __lasx_xvftint_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvffint_s_l(a: v4i64, b: v4i64) -> v8f32 { - __lasx_xvffint_s_l(a, b) +pub fn lasx_xvffint_s_l(a: v4i64, b: v4i64) -> v8f32 { + unsafe { __lasx_xvffint_s_l(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrz_w_d(a: v4f64, b: v4f64) -> v8i32 { - __lasx_xvftintrz_w_d(a, b) +pub fn lasx_xvftintrz_w_d(a: v4f64, b: v4f64) -> v8i32 { + unsafe { __lasx_xvftintrz_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrp_w_d(a: v4f64, b: v4f64) -> v8i32 { - __lasx_xvftintrp_w_d(a, b) +pub fn lasx_xvftintrp_w_d(a: v4f64, b: v4f64) -> v8i32 { + unsafe { __lasx_xvftintrp_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrm_w_d(a: v4f64, b: v4f64) -> v8i32 { - __lasx_xvftintrm_w_d(a, b) +pub fn lasx_xvftintrm_w_d(a: v4f64, b: v4f64) -> v8i32 { + unsafe { __lasx_xvftintrm_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrne_w_d(a: v4f64, b: v4f64) -> v8i32 { - __lasx_xvftintrne_w_d(a, b) +pub fn lasx_xvftintrne_w_d(a: v4f64, b: v4f64) -> v8i32 { + unsafe { __lasx_xvftintrne_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftinth_l_s(a: v8f32) -> v4i64 { - __lasx_xvftinth_l_s(a) +pub fn lasx_xvftinth_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftinth_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintl_l_s(a: v8f32) -> v4i64 { - __lasx_xvftintl_l_s(a) +pub fn lasx_xvftintl_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftintl_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvffinth_d_w(a: v8i32) -> v4f64 { - __lasx_xvffinth_d_w(a) +pub fn lasx_xvffinth_d_w(a: v8i32) -> v4f64 { + unsafe { __lasx_xvffinth_d_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvffintl_d_w(a: v8i32) -> v4f64 { - __lasx_xvffintl_d_w(a) +pub fn lasx_xvffintl_d_w(a: v8i32) -> v4f64 { + unsafe { __lasx_xvffintl_d_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrzh_l_s(a: v8f32) -> v4i64 { - __lasx_xvftintrzh_l_s(a) +pub fn lasx_xvftintrzh_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftintrzh_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrzl_l_s(a: v8f32) -> v4i64 { - __lasx_xvftintrzl_l_s(a) +pub fn lasx_xvftintrzl_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftintrzl_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrph_l_s(a: v8f32) -> v4i64 { - __lasx_xvftintrph_l_s(a) +pub fn lasx_xvftintrph_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftintrph_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrpl_l_s(a: v8f32) -> v4i64 { - __lasx_xvftintrpl_l_s(a) +pub fn lasx_xvftintrpl_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftintrpl_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrmh_l_s(a: v8f32) -> v4i64 { - __lasx_xvftintrmh_l_s(a) +pub fn lasx_xvftintrmh_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftintrmh_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrml_l_s(a: v8f32) -> v4i64 { - __lasx_xvftintrml_l_s(a) +pub fn lasx_xvftintrml_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftintrml_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrneh_l_s(a: v8f32) -> v4i64 { - __lasx_xvftintrneh_l_s(a) +pub fn lasx_xvftintrneh_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftintrneh_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvftintrnel_l_s(a: v8f32) -> v4i64 { - __lasx_xvftintrnel_l_s(a) +pub fn lasx_xvftintrnel_l_s(a: v8f32) -> v4i64 { + unsafe { __lasx_xvftintrnel_l_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrintrne_s(a: v8f32) -> v8f32 { - __lasx_xvfrintrne_s(a) +pub fn lasx_xvfrintrne_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfrintrne_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrintrne_d(a: v4f64) -> v4f64 { - __lasx_xvfrintrne_d(a) +pub fn lasx_xvfrintrne_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfrintrne_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrintrz_s(a: v8f32) -> v8f32 { - __lasx_xvfrintrz_s(a) +pub fn lasx_xvfrintrz_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfrintrz_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrintrz_d(a: v4f64) -> v4f64 { - __lasx_xvfrintrz_d(a) +pub fn lasx_xvfrintrz_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfrintrz_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrintrp_s(a: v8f32) -> v8f32 { - __lasx_xvfrintrp_s(a) +pub fn lasx_xvfrintrp_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfrintrp_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrintrp_d(a: v4f64) -> v4f64 { - __lasx_xvfrintrp_d(a) +pub fn lasx_xvfrintrp_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfrintrp_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrintrm_s(a: v8f32) -> v8f32 { - __lasx_xvfrintrm_s(a) +pub fn lasx_xvfrintrm_s(a: v8f32) -> v8f32 { + unsafe { __lasx_xvfrintrm_s(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfrintrm_d(a: v4f64) -> v4f64 { - __lasx_xvfrintrm_d(a) +pub fn lasx_xvfrintrm_d(a: v4f64) -> v4f64 { + unsafe { __lasx_xvfrintrm_d(a) } } #[inline] @@ -5054,94 +5054,94 @@ pub unsafe fn lasx_xvstelm_d<const IMM_S8: i32, const IMM1: u32>(a: v4i64, mem_a #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvinsve0_w<const IMM3: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvinsve0_w<const IMM3: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvinsve0_w(a, b, IMM3) + unsafe { __lasx_xvinsve0_w(a, b, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvinsve0_d<const IMM2: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvinsve0_d<const IMM2: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM2, 2); - __lasx_xvinsve0_d(a, b, IMM2) + unsafe { __lasx_xvinsve0_d(a, b, IMM2) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickve_w<const IMM3: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvpickve_w<const IMM3: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvpickve_w(a, IMM3) + unsafe { __lasx_xvpickve_w(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickve_d<const IMM2: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvpickve_d<const IMM2: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM2, 2); - __lasx_xvpickve_d(a, IMM2) + unsafe { __lasx_xvpickve_d(a, IMM2) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrn_b_h(a: v16i16, b: v16i16) -> v32i8 { - __lasx_xvssrlrn_b_h(a, b) +pub fn lasx_xvssrlrn_b_h(a: v16i16, b: v16i16) -> v32i8 { + unsafe { __lasx_xvssrlrn_b_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrn_h_w(a: v8i32, b: v8i32) -> v16i16 { - __lasx_xvssrlrn_h_w(a, b) +pub fn lasx_xvssrlrn_h_w(a: v8i32, b: v8i32) -> v16i16 { + unsafe { __lasx_xvssrlrn_h_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrn_w_d(a: v4i64, b: v4i64) -> v8i32 { - __lasx_xvssrlrn_w_d(a, b) +pub fn lasx_xvssrlrn_w_d(a: v4i64, b: v4i64) -> v8i32 { + unsafe { __lasx_xvssrlrn_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrln_b_h(a: v16i16, b: v16i16) -> v32i8 { - __lasx_xvssrln_b_h(a, b) +pub fn lasx_xvssrln_b_h(a: v16i16, b: v16i16) -> v32i8 { + unsafe { __lasx_xvssrln_b_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrln_h_w(a: v8i32, b: v8i32) -> v16i16 { - __lasx_xvssrln_h_w(a, b) +pub fn lasx_xvssrln_h_w(a: v8i32, b: v8i32) -> v16i16 { + unsafe { __lasx_xvssrln_h_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrln_w_d(a: v4i64, b: v4i64) -> v8i32 { - __lasx_xvssrln_w_d(a, b) +pub fn lasx_xvssrln_w_d(a: v4i64, b: v4i64) -> v8i32 { + unsafe { __lasx_xvssrln_w_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvorn_v(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvorn_v(a, b) +pub fn lasx_xvorn_v(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvorn_v(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvldi<const IMM_S13: i32>() -> v4i64 { +pub fn lasx_xvldi<const IMM_S13: i32>() -> v4i64 { static_assert_simm_bits!(IMM_S13, 13); - __lasx_xvldi(IMM_S13) + unsafe { __lasx_xvldi(IMM_S13) } } #[inline] @@ -5161,170 +5161,170 @@ pub unsafe fn lasx_xvstx(a: v32i8, mem_addr: *mut i8, b: i64) { #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvextl_qu_du(a: v4u64) -> v4u64 { - __lasx_xvextl_qu_du(a) +pub fn lasx_xvextl_qu_du(a: v4u64) -> v4u64 { + unsafe { __lasx_xvextl_qu_du(a) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvinsgr2vr_w<const IMM3: u32>(a: v8i32, b: i32) -> v8i32 { +pub fn lasx_xvinsgr2vr_w<const IMM3: u32>(a: v8i32, b: i32) -> v8i32 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvinsgr2vr_w(a, b, IMM3) + unsafe { __lasx_xvinsgr2vr_w(a, b, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvinsgr2vr_d<const IMM2: u32>(a: v4i64, b: i64) -> v4i64 { +pub fn lasx_xvinsgr2vr_d<const IMM2: u32>(a: v4i64, b: i64) -> v4i64 { static_assert_uimm_bits!(IMM2, 2); - __lasx_xvinsgr2vr_d(a, b, IMM2) + unsafe { __lasx_xvinsgr2vr_d(a, b, IMM2) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplve0_b(a: v32i8) -> v32i8 { - __lasx_xvreplve0_b(a) +pub fn lasx_xvreplve0_b(a: v32i8) -> v32i8 { + unsafe { __lasx_xvreplve0_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplve0_h(a: v16i16) -> v16i16 { - __lasx_xvreplve0_h(a) +pub fn lasx_xvreplve0_h(a: v16i16) -> v16i16 { + unsafe { __lasx_xvreplve0_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplve0_w(a: v8i32) -> v8i32 { - __lasx_xvreplve0_w(a) +pub fn lasx_xvreplve0_w(a: v8i32) -> v8i32 { + unsafe { __lasx_xvreplve0_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplve0_d(a: v4i64) -> v4i64 { - __lasx_xvreplve0_d(a) +pub fn lasx_xvreplve0_d(a: v4i64) -> v4i64 { + unsafe { __lasx_xvreplve0_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvreplve0_q(a: v32i8) -> v32i8 { - __lasx_xvreplve0_q(a) +pub fn lasx_xvreplve0_q(a: v32i8) -> v32i8 { + unsafe { __lasx_xvreplve0_q(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_h_b(a: v32i8) -> v16i16 { - __lasx_vext2xv_h_b(a) +pub fn lasx_vext2xv_h_b(a: v32i8) -> v16i16 { + unsafe { __lasx_vext2xv_h_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_w_h(a: v16i16) -> v8i32 { - __lasx_vext2xv_w_h(a) +pub fn lasx_vext2xv_w_h(a: v16i16) -> v8i32 { + unsafe { __lasx_vext2xv_w_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_d_w(a: v8i32) -> v4i64 { - __lasx_vext2xv_d_w(a) +pub fn lasx_vext2xv_d_w(a: v8i32) -> v4i64 { + unsafe { __lasx_vext2xv_d_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_w_b(a: v32i8) -> v8i32 { - __lasx_vext2xv_w_b(a) +pub fn lasx_vext2xv_w_b(a: v32i8) -> v8i32 { + unsafe { __lasx_vext2xv_w_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_d_h(a: v16i16) -> v4i64 { - __lasx_vext2xv_d_h(a) +pub fn lasx_vext2xv_d_h(a: v16i16) -> v4i64 { + unsafe { __lasx_vext2xv_d_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_d_b(a: v32i8) -> v4i64 { - __lasx_vext2xv_d_b(a) +pub fn lasx_vext2xv_d_b(a: v32i8) -> v4i64 { + unsafe { __lasx_vext2xv_d_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_hu_bu(a: v32i8) -> v16i16 { - __lasx_vext2xv_hu_bu(a) +pub fn lasx_vext2xv_hu_bu(a: v32i8) -> v16i16 { + unsafe { __lasx_vext2xv_hu_bu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_wu_hu(a: v16i16) -> v8i32 { - __lasx_vext2xv_wu_hu(a) +pub fn lasx_vext2xv_wu_hu(a: v16i16) -> v8i32 { + unsafe { __lasx_vext2xv_wu_hu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_du_wu(a: v8i32) -> v4i64 { - __lasx_vext2xv_du_wu(a) +pub fn lasx_vext2xv_du_wu(a: v8i32) -> v4i64 { + unsafe { __lasx_vext2xv_du_wu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_wu_bu(a: v32i8) -> v8i32 { - __lasx_vext2xv_wu_bu(a) +pub fn lasx_vext2xv_wu_bu(a: v32i8) -> v8i32 { + unsafe { __lasx_vext2xv_wu_bu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_du_hu(a: v16i16) -> v4i64 { - __lasx_vext2xv_du_hu(a) +pub fn lasx_vext2xv_du_hu(a: v16i16) -> v4i64 { + unsafe { __lasx_vext2xv_du_hu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_vext2xv_du_bu(a: v32i8) -> v4i64 { - __lasx_vext2xv_du_bu(a) +pub fn lasx_vext2xv_du_bu(a: v32i8) -> v4i64 { + unsafe { __lasx_vext2xv_du_bu(a) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpermi_q<const IMM8: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvpermi_q<const IMM8: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvpermi_q(a, b, IMM8) + unsafe { __lasx_xvpermi_q(a, b, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpermi_d<const IMM8: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvpermi_d<const IMM8: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM8, 8); - __lasx_xvpermi_d(a, IMM8) + unsafe { __lasx_xvpermi_d(a, IMM8) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvperm_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvperm_w(a, b) +pub fn lasx_xvperm_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvperm_w(a, b) } } #[inline] @@ -5367,1697 +5367,1697 @@ pub unsafe fn lasx_xvldrepl_d<const IMM_S9: i32>(mem_addr: *const i8) -> v4i64 { #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickve2gr_w<const IMM3: u32>(a: v8i32) -> i32 { +pub fn lasx_xvpickve2gr_w<const IMM3: u32>(a: v8i32) -> i32 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvpickve2gr_w(a, IMM3) + unsafe { __lasx_xvpickve2gr_w(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickve2gr_wu<const IMM3: u32>(a: v8i32) -> u32 { +pub fn lasx_xvpickve2gr_wu<const IMM3: u32>(a: v8i32) -> u32 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvpickve2gr_wu(a, IMM3) + unsafe { __lasx_xvpickve2gr_wu(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickve2gr_d<const IMM2: u32>(a: v4i64) -> i64 { +pub fn lasx_xvpickve2gr_d<const IMM2: u32>(a: v4i64) -> i64 { static_assert_uimm_bits!(IMM2, 2); - __lasx_xvpickve2gr_d(a, IMM2) + unsafe { __lasx_xvpickve2gr_d(a, IMM2) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickve2gr_du<const IMM2: u32>(a: v4i64) -> u64 { +pub fn lasx_xvpickve2gr_du<const IMM2: u32>(a: v4i64) -> u64 { static_assert_uimm_bits!(IMM2, 2); - __lasx_xvpickve2gr_du(a, IMM2) + unsafe { __lasx_xvpickve2gr_du(a, IMM2) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_q_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvaddwev_q_d(a, b) +pub fn lasx_xvaddwev_q_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvaddwev_q_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_d_w(a: v8i32, b: v8i32) -> v4i64 { - __lasx_xvaddwev_d_w(a, b) +pub fn lasx_xvaddwev_d_w(a: v8i32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvaddwev_d_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_w_h(a: v16i16, b: v16i16) -> v8i32 { - __lasx_xvaddwev_w_h(a, b) +pub fn lasx_xvaddwev_w_h(a: v16i16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvaddwev_w_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_h_b(a: v32i8, b: v32i8) -> v16i16 { - __lasx_xvaddwev_h_b(a, b) +pub fn lasx_xvaddwev_h_b(a: v32i8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvaddwev_h_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_q_du(a: v4u64, b: v4u64) -> v4i64 { - __lasx_xvaddwev_q_du(a, b) +pub fn lasx_xvaddwev_q_du(a: v4u64, b: v4u64) -> v4i64 { + unsafe { __lasx_xvaddwev_q_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_d_wu(a: v8u32, b: v8u32) -> v4i64 { - __lasx_xvaddwev_d_wu(a, b) +pub fn lasx_xvaddwev_d_wu(a: v8u32, b: v8u32) -> v4i64 { + unsafe { __lasx_xvaddwev_d_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_w_hu(a: v16u16, b: v16u16) -> v8i32 { - __lasx_xvaddwev_w_hu(a, b) +pub fn lasx_xvaddwev_w_hu(a: v16u16, b: v16u16) -> v8i32 { + unsafe { __lasx_xvaddwev_w_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_h_bu(a: v32u8, b: v32u8) -> v16i16 { - __lasx_xvaddwev_h_bu(a, b) +pub fn lasx_xvaddwev_h_bu(a: v32u8, b: v32u8) -> v16i16 { + unsafe { __lasx_xvaddwev_h_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwev_q_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsubwev_q_d(a, b) +pub fn lasx_xvsubwev_q_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsubwev_q_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwev_d_w(a: v8i32, b: v8i32) -> v4i64 { - __lasx_xvsubwev_d_w(a, b) +pub fn lasx_xvsubwev_d_w(a: v8i32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvsubwev_d_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwev_w_h(a: v16i16, b: v16i16) -> v8i32 { - __lasx_xvsubwev_w_h(a, b) +pub fn lasx_xvsubwev_w_h(a: v16i16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvsubwev_w_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwev_h_b(a: v32i8, b: v32i8) -> v16i16 { - __lasx_xvsubwev_h_b(a, b) +pub fn lasx_xvsubwev_h_b(a: v32i8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvsubwev_h_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwev_q_du(a: v4u64, b: v4u64) -> v4i64 { - __lasx_xvsubwev_q_du(a, b) +pub fn lasx_xvsubwev_q_du(a: v4u64, b: v4u64) -> v4i64 { + unsafe { __lasx_xvsubwev_q_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwev_d_wu(a: v8u32, b: v8u32) -> v4i64 { - __lasx_xvsubwev_d_wu(a, b) +pub fn lasx_xvsubwev_d_wu(a: v8u32, b: v8u32) -> v4i64 { + unsafe { __lasx_xvsubwev_d_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwev_w_hu(a: v16u16, b: v16u16) -> v8i32 { - __lasx_xvsubwev_w_hu(a, b) +pub fn lasx_xvsubwev_w_hu(a: v16u16, b: v16u16) -> v8i32 { + unsafe { __lasx_xvsubwev_w_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwev_h_bu(a: v32u8, b: v32u8) -> v16i16 { - __lasx_xvsubwev_h_bu(a, b) +pub fn lasx_xvsubwev_h_bu(a: v32u8, b: v32u8) -> v16i16 { + unsafe { __lasx_xvsubwev_h_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_q_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvmulwev_q_d(a, b) +pub fn lasx_xvmulwev_q_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvmulwev_q_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_d_w(a: v8i32, b: v8i32) -> v4i64 { - __lasx_xvmulwev_d_w(a, b) +pub fn lasx_xvmulwev_d_w(a: v8i32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvmulwev_d_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_w_h(a: v16i16, b: v16i16) -> v8i32 { - __lasx_xvmulwev_w_h(a, b) +pub fn lasx_xvmulwev_w_h(a: v16i16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvmulwev_w_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_h_b(a: v32i8, b: v32i8) -> v16i16 { - __lasx_xvmulwev_h_b(a, b) +pub fn lasx_xvmulwev_h_b(a: v32i8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvmulwev_h_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_q_du(a: v4u64, b: v4u64) -> v4i64 { - __lasx_xvmulwev_q_du(a, b) +pub fn lasx_xvmulwev_q_du(a: v4u64, b: v4u64) -> v4i64 { + unsafe { __lasx_xvmulwev_q_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_d_wu(a: v8u32, b: v8u32) -> v4i64 { - __lasx_xvmulwev_d_wu(a, b) +pub fn lasx_xvmulwev_d_wu(a: v8u32, b: v8u32) -> v4i64 { + unsafe { __lasx_xvmulwev_d_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_w_hu(a: v16u16, b: v16u16) -> v8i32 { - __lasx_xvmulwev_w_hu(a, b) +pub fn lasx_xvmulwev_w_hu(a: v16u16, b: v16u16) -> v8i32 { + unsafe { __lasx_xvmulwev_w_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_h_bu(a: v32u8, b: v32u8) -> v16i16 { - __lasx_xvmulwev_h_bu(a, b) +pub fn lasx_xvmulwev_h_bu(a: v32u8, b: v32u8) -> v16i16 { + unsafe { __lasx_xvmulwev_h_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_q_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvaddwod_q_d(a, b) +pub fn lasx_xvaddwod_q_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvaddwod_q_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_d_w(a: v8i32, b: v8i32) -> v4i64 { - __lasx_xvaddwod_d_w(a, b) +pub fn lasx_xvaddwod_d_w(a: v8i32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvaddwod_d_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_w_h(a: v16i16, b: v16i16) -> v8i32 { - __lasx_xvaddwod_w_h(a, b) +pub fn lasx_xvaddwod_w_h(a: v16i16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvaddwod_w_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_h_b(a: v32i8, b: v32i8) -> v16i16 { - __lasx_xvaddwod_h_b(a, b) +pub fn lasx_xvaddwod_h_b(a: v32i8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvaddwod_h_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_q_du(a: v4u64, b: v4u64) -> v4i64 { - __lasx_xvaddwod_q_du(a, b) +pub fn lasx_xvaddwod_q_du(a: v4u64, b: v4u64) -> v4i64 { + unsafe { __lasx_xvaddwod_q_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_d_wu(a: v8u32, b: v8u32) -> v4i64 { - __lasx_xvaddwod_d_wu(a, b) +pub fn lasx_xvaddwod_d_wu(a: v8u32, b: v8u32) -> v4i64 { + unsafe { __lasx_xvaddwod_d_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_w_hu(a: v16u16, b: v16u16) -> v8i32 { - __lasx_xvaddwod_w_hu(a, b) +pub fn lasx_xvaddwod_w_hu(a: v16u16, b: v16u16) -> v8i32 { + unsafe { __lasx_xvaddwod_w_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_h_bu(a: v32u8, b: v32u8) -> v16i16 { - __lasx_xvaddwod_h_bu(a, b) +pub fn lasx_xvaddwod_h_bu(a: v32u8, b: v32u8) -> v16i16 { + unsafe { __lasx_xvaddwod_h_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwod_q_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsubwod_q_d(a, b) +pub fn lasx_xvsubwod_q_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsubwod_q_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwod_d_w(a: v8i32, b: v8i32) -> v4i64 { - __lasx_xvsubwod_d_w(a, b) +pub fn lasx_xvsubwod_d_w(a: v8i32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvsubwod_d_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwod_w_h(a: v16i16, b: v16i16) -> v8i32 { - __lasx_xvsubwod_w_h(a, b) +pub fn lasx_xvsubwod_w_h(a: v16i16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvsubwod_w_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwod_h_b(a: v32i8, b: v32i8) -> v16i16 { - __lasx_xvsubwod_h_b(a, b) +pub fn lasx_xvsubwod_h_b(a: v32i8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvsubwod_h_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwod_q_du(a: v4u64, b: v4u64) -> v4i64 { - __lasx_xvsubwod_q_du(a, b) +pub fn lasx_xvsubwod_q_du(a: v4u64, b: v4u64) -> v4i64 { + unsafe { __lasx_xvsubwod_q_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwod_d_wu(a: v8u32, b: v8u32) -> v4i64 { - __lasx_xvsubwod_d_wu(a, b) +pub fn lasx_xvsubwod_d_wu(a: v8u32, b: v8u32) -> v4i64 { + unsafe { __lasx_xvsubwod_d_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwod_w_hu(a: v16u16, b: v16u16) -> v8i32 { - __lasx_xvsubwod_w_hu(a, b) +pub fn lasx_xvsubwod_w_hu(a: v16u16, b: v16u16) -> v8i32 { + unsafe { __lasx_xvsubwod_w_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsubwod_h_bu(a: v32u8, b: v32u8) -> v16i16 { - __lasx_xvsubwod_h_bu(a, b) +pub fn lasx_xvsubwod_h_bu(a: v32u8, b: v32u8) -> v16i16 { + unsafe { __lasx_xvsubwod_h_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_q_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvmulwod_q_d(a, b) +pub fn lasx_xvmulwod_q_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvmulwod_q_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_d_w(a: v8i32, b: v8i32) -> v4i64 { - __lasx_xvmulwod_d_w(a, b) +pub fn lasx_xvmulwod_d_w(a: v8i32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvmulwod_d_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_w_h(a: v16i16, b: v16i16) -> v8i32 { - __lasx_xvmulwod_w_h(a, b) +pub fn lasx_xvmulwod_w_h(a: v16i16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvmulwod_w_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_h_b(a: v32i8, b: v32i8) -> v16i16 { - __lasx_xvmulwod_h_b(a, b) +pub fn lasx_xvmulwod_h_b(a: v32i8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvmulwod_h_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_q_du(a: v4u64, b: v4u64) -> v4i64 { - __lasx_xvmulwod_q_du(a, b) +pub fn lasx_xvmulwod_q_du(a: v4u64, b: v4u64) -> v4i64 { + unsafe { __lasx_xvmulwod_q_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_d_wu(a: v8u32, b: v8u32) -> v4i64 { - __lasx_xvmulwod_d_wu(a, b) +pub fn lasx_xvmulwod_d_wu(a: v8u32, b: v8u32) -> v4i64 { + unsafe { __lasx_xvmulwod_d_wu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_w_hu(a: v16u16, b: v16u16) -> v8i32 { - __lasx_xvmulwod_w_hu(a, b) +pub fn lasx_xvmulwod_w_hu(a: v16u16, b: v16u16) -> v8i32 { + unsafe { __lasx_xvmulwod_w_hu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_h_bu(a: v32u8, b: v32u8) -> v16i16 { - __lasx_xvmulwod_h_bu(a, b) +pub fn lasx_xvmulwod_h_bu(a: v32u8, b: v32u8) -> v16i16 { + unsafe { __lasx_xvmulwod_h_bu(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_d_wu_w(a: v8u32, b: v8i32) -> v4i64 { - __lasx_xvaddwev_d_wu_w(a, b) +pub fn lasx_xvaddwev_d_wu_w(a: v8u32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvaddwev_d_wu_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_w_hu_h(a: v16u16, b: v16i16) -> v8i32 { - __lasx_xvaddwev_w_hu_h(a, b) +pub fn lasx_xvaddwev_w_hu_h(a: v16u16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvaddwev_w_hu_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_h_bu_b(a: v32u8, b: v32i8) -> v16i16 { - __lasx_xvaddwev_h_bu_b(a, b) +pub fn lasx_xvaddwev_h_bu_b(a: v32u8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvaddwev_h_bu_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_d_wu_w(a: v8u32, b: v8i32) -> v4i64 { - __lasx_xvmulwev_d_wu_w(a, b) +pub fn lasx_xvmulwev_d_wu_w(a: v8u32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvmulwev_d_wu_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_w_hu_h(a: v16u16, b: v16i16) -> v8i32 { - __lasx_xvmulwev_w_hu_h(a, b) +pub fn lasx_xvmulwev_w_hu_h(a: v16u16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvmulwev_w_hu_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_h_bu_b(a: v32u8, b: v32i8) -> v16i16 { - __lasx_xvmulwev_h_bu_b(a, b) +pub fn lasx_xvmulwev_h_bu_b(a: v32u8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvmulwev_h_bu_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_d_wu_w(a: v8u32, b: v8i32) -> v4i64 { - __lasx_xvaddwod_d_wu_w(a, b) +pub fn lasx_xvaddwod_d_wu_w(a: v8u32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvaddwod_d_wu_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_w_hu_h(a: v16u16, b: v16i16) -> v8i32 { - __lasx_xvaddwod_w_hu_h(a, b) +pub fn lasx_xvaddwod_w_hu_h(a: v16u16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvaddwod_w_hu_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_h_bu_b(a: v32u8, b: v32i8) -> v16i16 { - __lasx_xvaddwod_h_bu_b(a, b) +pub fn lasx_xvaddwod_h_bu_b(a: v32u8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvaddwod_h_bu_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_d_wu_w(a: v8u32, b: v8i32) -> v4i64 { - __lasx_xvmulwod_d_wu_w(a, b) +pub fn lasx_xvmulwod_d_wu_w(a: v8u32, b: v8i32) -> v4i64 { + unsafe { __lasx_xvmulwod_d_wu_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_w_hu_h(a: v16u16, b: v16i16) -> v8i32 { - __lasx_xvmulwod_w_hu_h(a, b) +pub fn lasx_xvmulwod_w_hu_h(a: v16u16, b: v16i16) -> v8i32 { + unsafe { __lasx_xvmulwod_w_hu_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_h_bu_b(a: v32u8, b: v32i8) -> v16i16 { - __lasx_xvmulwod_h_bu_b(a, b) +pub fn lasx_xvmulwod_h_bu_b(a: v32u8, b: v32i8) -> v16i16 { + unsafe { __lasx_xvmulwod_h_bu_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhaddw_q_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvhaddw_q_d(a, b) +pub fn lasx_xvhaddw_q_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvhaddw_q_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhaddw_qu_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvhaddw_qu_du(a, b) +pub fn lasx_xvhaddw_qu_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvhaddw_qu_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhsubw_q_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvhsubw_q_d(a, b) +pub fn lasx_xvhsubw_q_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvhsubw_q_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvhsubw_qu_du(a: v4u64, b: v4u64) -> v4u64 { - __lasx_xvhsubw_qu_du(a, b) +pub fn lasx_xvhsubw_qu_du(a: v4u64, b: v4u64) -> v4u64 { + unsafe { __lasx_xvhsubw_qu_du(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_q_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { - __lasx_xvmaddwev_q_d(a, b, c) +pub fn lasx_xvmaddwev_q_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { + unsafe { __lasx_xvmaddwev_q_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_d_w(a: v4i64, b: v8i32, c: v8i32) -> v4i64 { - __lasx_xvmaddwev_d_w(a, b, c) +pub fn lasx_xvmaddwev_d_w(a: v4i64, b: v8i32, c: v8i32) -> v4i64 { + unsafe { __lasx_xvmaddwev_d_w(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_w_h(a: v8i32, b: v16i16, c: v16i16) -> v8i32 { - __lasx_xvmaddwev_w_h(a, b, c) +pub fn lasx_xvmaddwev_w_h(a: v8i32, b: v16i16, c: v16i16) -> v8i32 { + unsafe { __lasx_xvmaddwev_w_h(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_h_b(a: v16i16, b: v32i8, c: v32i8) -> v16i16 { - __lasx_xvmaddwev_h_b(a, b, c) +pub fn lasx_xvmaddwev_h_b(a: v16i16, b: v32i8, c: v32i8) -> v16i16 { + unsafe { __lasx_xvmaddwev_h_b(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_q_du(a: v4u64, b: v4u64, c: v4u64) -> v4u64 { - __lasx_xvmaddwev_q_du(a, b, c) +pub fn lasx_xvmaddwev_q_du(a: v4u64, b: v4u64, c: v4u64) -> v4u64 { + unsafe { __lasx_xvmaddwev_q_du(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_d_wu(a: v4u64, b: v8u32, c: v8u32) -> v4u64 { - __lasx_xvmaddwev_d_wu(a, b, c) +pub fn lasx_xvmaddwev_d_wu(a: v4u64, b: v8u32, c: v8u32) -> v4u64 { + unsafe { __lasx_xvmaddwev_d_wu(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_w_hu(a: v8u32, b: v16u16, c: v16u16) -> v8u32 { - __lasx_xvmaddwev_w_hu(a, b, c) +pub fn lasx_xvmaddwev_w_hu(a: v8u32, b: v16u16, c: v16u16) -> v8u32 { + unsafe { __lasx_xvmaddwev_w_hu(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_h_bu(a: v16u16, b: v32u8, c: v32u8) -> v16u16 { - __lasx_xvmaddwev_h_bu(a, b, c) +pub fn lasx_xvmaddwev_h_bu(a: v16u16, b: v32u8, c: v32u8) -> v16u16 { + unsafe { __lasx_xvmaddwev_h_bu(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_q_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { - __lasx_xvmaddwod_q_d(a, b, c) +pub fn lasx_xvmaddwod_q_d(a: v4i64, b: v4i64, c: v4i64) -> v4i64 { + unsafe { __lasx_xvmaddwod_q_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_d_w(a: v4i64, b: v8i32, c: v8i32) -> v4i64 { - __lasx_xvmaddwod_d_w(a, b, c) +pub fn lasx_xvmaddwod_d_w(a: v4i64, b: v8i32, c: v8i32) -> v4i64 { + unsafe { __lasx_xvmaddwod_d_w(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_w_h(a: v8i32, b: v16i16, c: v16i16) -> v8i32 { - __lasx_xvmaddwod_w_h(a, b, c) +pub fn lasx_xvmaddwod_w_h(a: v8i32, b: v16i16, c: v16i16) -> v8i32 { + unsafe { __lasx_xvmaddwod_w_h(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_h_b(a: v16i16, b: v32i8, c: v32i8) -> v16i16 { - __lasx_xvmaddwod_h_b(a, b, c) +pub fn lasx_xvmaddwod_h_b(a: v16i16, b: v32i8, c: v32i8) -> v16i16 { + unsafe { __lasx_xvmaddwod_h_b(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_q_du(a: v4u64, b: v4u64, c: v4u64) -> v4u64 { - __lasx_xvmaddwod_q_du(a, b, c) +pub fn lasx_xvmaddwod_q_du(a: v4u64, b: v4u64, c: v4u64) -> v4u64 { + unsafe { __lasx_xvmaddwod_q_du(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_d_wu(a: v4u64, b: v8u32, c: v8u32) -> v4u64 { - __lasx_xvmaddwod_d_wu(a, b, c) +pub fn lasx_xvmaddwod_d_wu(a: v4u64, b: v8u32, c: v8u32) -> v4u64 { + unsafe { __lasx_xvmaddwod_d_wu(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_w_hu(a: v8u32, b: v16u16, c: v16u16) -> v8u32 { - __lasx_xvmaddwod_w_hu(a, b, c) +pub fn lasx_xvmaddwod_w_hu(a: v8u32, b: v16u16, c: v16u16) -> v8u32 { + unsafe { __lasx_xvmaddwod_w_hu(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_h_bu(a: v16u16, b: v32u8, c: v32u8) -> v16u16 { - __lasx_xvmaddwod_h_bu(a, b, c) +pub fn lasx_xvmaddwod_h_bu(a: v16u16, b: v32u8, c: v32u8) -> v16u16 { + unsafe { __lasx_xvmaddwod_h_bu(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_q_du_d(a: v4i64, b: v4u64, c: v4i64) -> v4i64 { - __lasx_xvmaddwev_q_du_d(a, b, c) +pub fn lasx_xvmaddwev_q_du_d(a: v4i64, b: v4u64, c: v4i64) -> v4i64 { + unsafe { __lasx_xvmaddwev_q_du_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_d_wu_w(a: v4i64, b: v8u32, c: v8i32) -> v4i64 { - __lasx_xvmaddwev_d_wu_w(a, b, c) +pub fn lasx_xvmaddwev_d_wu_w(a: v4i64, b: v8u32, c: v8i32) -> v4i64 { + unsafe { __lasx_xvmaddwev_d_wu_w(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_w_hu_h(a: v8i32, b: v16u16, c: v16i16) -> v8i32 { - __lasx_xvmaddwev_w_hu_h(a, b, c) +pub fn lasx_xvmaddwev_w_hu_h(a: v8i32, b: v16u16, c: v16i16) -> v8i32 { + unsafe { __lasx_xvmaddwev_w_hu_h(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwev_h_bu_b(a: v16i16, b: v32u8, c: v32i8) -> v16i16 { - __lasx_xvmaddwev_h_bu_b(a, b, c) +pub fn lasx_xvmaddwev_h_bu_b(a: v16i16, b: v32u8, c: v32i8) -> v16i16 { + unsafe { __lasx_xvmaddwev_h_bu_b(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_q_du_d(a: v4i64, b: v4u64, c: v4i64) -> v4i64 { - __lasx_xvmaddwod_q_du_d(a, b, c) +pub fn lasx_xvmaddwod_q_du_d(a: v4i64, b: v4u64, c: v4i64) -> v4i64 { + unsafe { __lasx_xvmaddwod_q_du_d(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_d_wu_w(a: v4i64, b: v8u32, c: v8i32) -> v4i64 { - __lasx_xvmaddwod_d_wu_w(a, b, c) +pub fn lasx_xvmaddwod_d_wu_w(a: v4i64, b: v8u32, c: v8i32) -> v4i64 { + unsafe { __lasx_xvmaddwod_d_wu_w(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_w_hu_h(a: v8i32, b: v16u16, c: v16i16) -> v8i32 { - __lasx_xvmaddwod_w_hu_h(a, b, c) +pub fn lasx_xvmaddwod_w_hu_h(a: v8i32, b: v16u16, c: v16i16) -> v8i32 { + unsafe { __lasx_xvmaddwod_w_hu_h(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmaddwod_h_bu_b(a: v16i16, b: v32u8, c: v32i8) -> v16i16 { - __lasx_xvmaddwod_h_bu_b(a, b, c) +pub fn lasx_xvmaddwod_h_bu_b(a: v16i16, b: v32u8, c: v32i8) -> v16i16 { + unsafe { __lasx_xvmaddwod_h_bu_b(a, b, c) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrotr_b(a: v32i8, b: v32i8) -> v32i8 { - __lasx_xvrotr_b(a, b) +pub fn lasx_xvrotr_b(a: v32i8, b: v32i8) -> v32i8 { + unsafe { __lasx_xvrotr_b(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrotr_h(a: v16i16, b: v16i16) -> v16i16 { - __lasx_xvrotr_h(a, b) +pub fn lasx_xvrotr_h(a: v16i16, b: v16i16) -> v16i16 { + unsafe { __lasx_xvrotr_h(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrotr_w(a: v8i32, b: v8i32) -> v8i32 { - __lasx_xvrotr_w(a, b) +pub fn lasx_xvrotr_w(a: v8i32, b: v8i32) -> v8i32 { + unsafe { __lasx_xvrotr_w(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrotr_d(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvrotr_d(a, b) +pub fn lasx_xvrotr_d(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvrotr_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvadd_q(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvadd_q(a, b) +pub fn lasx_xvadd_q(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvadd_q(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsub_q(a: v4i64, b: v4i64) -> v4i64 { - __lasx_xvsub_q(a, b) +pub fn lasx_xvsub_q(a: v4i64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvsub_q(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwev_q_du_d(a: v4u64, b: v4i64) -> v4i64 { - __lasx_xvaddwev_q_du_d(a, b) +pub fn lasx_xvaddwev_q_du_d(a: v4u64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvaddwev_q_du_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvaddwod_q_du_d(a: v4u64, b: v4i64) -> v4i64 { - __lasx_xvaddwod_q_du_d(a, b) +pub fn lasx_xvaddwod_q_du_d(a: v4u64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvaddwod_q_du_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwev_q_du_d(a: v4u64, b: v4i64) -> v4i64 { - __lasx_xvmulwev_q_du_d(a, b) +pub fn lasx_xvmulwev_q_du_d(a: v4u64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvmulwev_q_du_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmulwod_q_du_d(a: v4u64, b: v4i64) -> v4i64 { - __lasx_xvmulwod_q_du_d(a, b) +pub fn lasx_xvmulwod_q_du_d(a: v4u64, b: v4i64) -> v4i64 { + unsafe { __lasx_xvmulwod_q_du_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmskgez_b(a: v32i8) -> v32i8 { - __lasx_xvmskgez_b(a) +pub fn lasx_xvmskgez_b(a: v32i8) -> v32i8 { + unsafe { __lasx_xvmskgez_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvmsknz_b(a: v32i8) -> v32i8 { - __lasx_xvmsknz_b(a) +pub fn lasx_xvmsknz_b(a: v32i8) -> v32i8 { + unsafe { __lasx_xvmsknz_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvexth_h_b(a: v32i8) -> v16i16 { - __lasx_xvexth_h_b(a) +pub fn lasx_xvexth_h_b(a: v32i8) -> v16i16 { + unsafe { __lasx_xvexth_h_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvexth_w_h(a: v16i16) -> v8i32 { - __lasx_xvexth_w_h(a) +pub fn lasx_xvexth_w_h(a: v16i16) -> v8i32 { + unsafe { __lasx_xvexth_w_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvexth_d_w(a: v8i32) -> v4i64 { - __lasx_xvexth_d_w(a) +pub fn lasx_xvexth_d_w(a: v8i32) -> v4i64 { + unsafe { __lasx_xvexth_d_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvexth_q_d(a: v4i64) -> v4i64 { - __lasx_xvexth_q_d(a) +pub fn lasx_xvexth_q_d(a: v4i64) -> v4i64 { + unsafe { __lasx_xvexth_q_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvexth_hu_bu(a: v32u8) -> v16u16 { - __lasx_xvexth_hu_bu(a) +pub fn lasx_xvexth_hu_bu(a: v32u8) -> v16u16 { + unsafe { __lasx_xvexth_hu_bu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvexth_wu_hu(a: v16u16) -> v8u32 { - __lasx_xvexth_wu_hu(a) +pub fn lasx_xvexth_wu_hu(a: v16u16) -> v8u32 { + unsafe { __lasx_xvexth_wu_hu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvexth_du_wu(a: v8u32) -> v4u64 { - __lasx_xvexth_du_wu(a) +pub fn lasx_xvexth_du_wu(a: v8u32) -> v4u64 { + unsafe { __lasx_xvexth_du_wu(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvexth_qu_du(a: v4u64) -> v4u64 { - __lasx_xvexth_qu_du(a) +pub fn lasx_xvexth_qu_du(a: v4u64) -> v4u64 { + unsafe { __lasx_xvexth_qu_du(a) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrotri_b<const IMM3: u32>(a: v32i8) -> v32i8 { +pub fn lasx_xvrotri_b<const IMM3: u32>(a: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvrotri_b(a, IMM3) + unsafe { __lasx_xvrotri_b(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrotri_h<const IMM4: u32>(a: v16i16) -> v16i16 { +pub fn lasx_xvrotri_h<const IMM4: u32>(a: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvrotri_h(a, IMM4) + unsafe { __lasx_xvrotri_h(a, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrotri_w<const IMM5: u32>(a: v8i32) -> v8i32 { +pub fn lasx_xvrotri_w<const IMM5: u32>(a: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvrotri_w(a, IMM5) + unsafe { __lasx_xvrotri_w(a, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrotri_d<const IMM6: u32>(a: v4i64) -> v4i64 { +pub fn lasx_xvrotri_d<const IMM6: u32>(a: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvrotri_d(a, IMM6) + unsafe { __lasx_xvrotri_d(a, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvextl_q_d(a: v4i64) -> v4i64 { - __lasx_xvextl_q_d(a) +pub fn lasx_xvextl_q_d(a: v4i64) -> v4i64 { + unsafe { __lasx_xvextl_q_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvsrlni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsrlni_b_h(a, b, IMM4) + unsafe { __lasx_xvsrlni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvsrlni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsrlni_h_w(a, b, IMM5) + unsafe { __lasx_xvsrlni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvsrlni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsrlni_w_d(a, b, IMM6) + unsafe { __lasx_xvsrlni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvsrlni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvsrlni_d_q(a, b, IMM7) + unsafe { __lasx_xvsrlni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlrni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvsrlrni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsrlrni_b_h(a, b, IMM4) + unsafe { __lasx_xvsrlrni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlrni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvsrlrni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsrlrni_h_w(a, b, IMM5) + unsafe { __lasx_xvsrlrni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlrni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvsrlrni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsrlrni_w_d(a, b, IMM6) + unsafe { __lasx_xvsrlrni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrlrni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvsrlrni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvsrlrni_d_q(a, b, IMM7) + unsafe { __lasx_xvsrlrni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvssrlni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvssrlni_b_h(a, b, IMM4) + unsafe { __lasx_xvssrlni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvssrlni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvssrlni_h_w(a, b, IMM5) + unsafe { __lasx_xvssrlni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvssrlni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvssrlni_w_d(a, b, IMM6) + unsafe { __lasx_xvssrlni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvssrlni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvssrlni_d_q(a, b, IMM7) + unsafe { __lasx_xvssrlni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlni_bu_h<const IMM4: u32>(a: v32u8, b: v32i8) -> v32u8 { +pub fn lasx_xvssrlni_bu_h<const IMM4: u32>(a: v32u8, b: v32i8) -> v32u8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvssrlni_bu_h(a, b, IMM4) + unsafe { __lasx_xvssrlni_bu_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlni_hu_w<const IMM5: u32>(a: v16u16, b: v16i16) -> v16u16 { +pub fn lasx_xvssrlni_hu_w<const IMM5: u32>(a: v16u16, b: v16i16) -> v16u16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvssrlni_hu_w(a, b, IMM5) + unsafe { __lasx_xvssrlni_hu_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlni_wu_d<const IMM6: u32>(a: v8u32, b: v8i32) -> v8u32 { +pub fn lasx_xvssrlni_wu_d<const IMM6: u32>(a: v8u32, b: v8i32) -> v8u32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvssrlni_wu_d(a, b, IMM6) + unsafe { __lasx_xvssrlni_wu_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlni_du_q<const IMM7: u32>(a: v4u64, b: v4i64) -> v4u64 { +pub fn lasx_xvssrlni_du_q<const IMM7: u32>(a: v4u64, b: v4i64) -> v4u64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvssrlni_du_q(a, b, IMM7) + unsafe { __lasx_xvssrlni_du_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvssrlrni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvssrlrni_b_h(a, b, IMM4) + unsafe { __lasx_xvssrlrni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvssrlrni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvssrlrni_h_w(a, b, IMM5) + unsafe { __lasx_xvssrlrni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvssrlrni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvssrlrni_w_d(a, b, IMM6) + unsafe { __lasx_xvssrlrni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvssrlrni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvssrlrni_d_q(a, b, IMM7) + unsafe { __lasx_xvssrlrni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrni_bu_h<const IMM4: u32>(a: v32u8, b: v32i8) -> v32u8 { +pub fn lasx_xvssrlrni_bu_h<const IMM4: u32>(a: v32u8, b: v32i8) -> v32u8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvssrlrni_bu_h(a, b, IMM4) + unsafe { __lasx_xvssrlrni_bu_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrni_hu_w<const IMM5: u32>(a: v16u16, b: v16i16) -> v16u16 { +pub fn lasx_xvssrlrni_hu_w<const IMM5: u32>(a: v16u16, b: v16i16) -> v16u16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvssrlrni_hu_w(a, b, IMM5) + unsafe { __lasx_xvssrlrni_hu_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrni_wu_d<const IMM6: u32>(a: v8u32, b: v8i32) -> v8u32 { +pub fn lasx_xvssrlrni_wu_d<const IMM6: u32>(a: v8u32, b: v8i32) -> v8u32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvssrlrni_wu_d(a, b, IMM6) + unsafe { __lasx_xvssrlrni_wu_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrlrni_du_q<const IMM7: u32>(a: v4u64, b: v4i64) -> v4u64 { +pub fn lasx_xvssrlrni_du_q<const IMM7: u32>(a: v4u64, b: v4i64) -> v4u64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvssrlrni_du_q(a, b, IMM7) + unsafe { __lasx_xvssrlrni_du_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrani_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvsrani_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsrani_b_h(a, b, IMM4) + unsafe { __lasx_xvsrani_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrani_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvsrani_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsrani_h_w(a, b, IMM5) + unsafe { __lasx_xvsrani_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrani_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvsrani_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsrani_w_d(a, b, IMM6) + unsafe { __lasx_xvsrani_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrani_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvsrani_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvsrani_d_q(a, b, IMM7) + unsafe { __lasx_xvsrani_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrarni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvsrarni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvsrarni_b_h(a, b, IMM4) + unsafe { __lasx_xvsrarni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrarni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvsrarni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvsrarni_h_w(a, b, IMM5) + unsafe { __lasx_xvsrarni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrarni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvsrarni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvsrarni_w_d(a, b, IMM6) + unsafe { __lasx_xvsrarni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvsrarni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvsrarni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvsrarni_d_q(a, b, IMM7) + unsafe { __lasx_xvsrarni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrani_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvssrani_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvssrani_b_h(a, b, IMM4) + unsafe { __lasx_xvssrani_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrani_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvssrani_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvssrani_h_w(a, b, IMM5) + unsafe { __lasx_xvssrani_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrani_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvssrani_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvssrani_w_d(a, b, IMM6) + unsafe { __lasx_xvssrani_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrani_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvssrani_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvssrani_d_q(a, b, IMM7) + unsafe { __lasx_xvssrani_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrani_bu_h<const IMM4: u32>(a: v32u8, b: v32i8) -> v32u8 { +pub fn lasx_xvssrani_bu_h<const IMM4: u32>(a: v32u8, b: v32i8) -> v32u8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvssrani_bu_h(a, b, IMM4) + unsafe { __lasx_xvssrani_bu_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrani_hu_w<const IMM5: u32>(a: v16u16, b: v16i16) -> v16u16 { +pub fn lasx_xvssrani_hu_w<const IMM5: u32>(a: v16u16, b: v16i16) -> v16u16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvssrani_hu_w(a, b, IMM5) + unsafe { __lasx_xvssrani_hu_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrani_wu_d<const IMM6: u32>(a: v8u32, b: v8i32) -> v8u32 { +pub fn lasx_xvssrani_wu_d<const IMM6: u32>(a: v8u32, b: v8i32) -> v8u32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvssrani_wu_d(a, b, IMM6) + unsafe { __lasx_xvssrani_wu_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrani_du_q<const IMM7: u32>(a: v4u64, b: v4i64) -> v4u64 { +pub fn lasx_xvssrani_du_q<const IMM7: u32>(a: v4u64, b: v4i64) -> v4u64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvssrani_du_q(a, b, IMM7) + unsafe { __lasx_xvssrani_du_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { +pub fn lasx_xvssrarni_b_h<const IMM4: u32>(a: v32i8, b: v32i8) -> v32i8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvssrarni_b_h(a, b, IMM4) + unsafe { __lasx_xvssrarni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { +pub fn lasx_xvssrarni_h_w<const IMM5: u32>(a: v16i16, b: v16i16) -> v16i16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvssrarni_h_w(a, b, IMM5) + unsafe { __lasx_xvssrarni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { +pub fn lasx_xvssrarni_w_d<const IMM6: u32>(a: v8i32, b: v8i32) -> v8i32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvssrarni_w_d(a, b, IMM6) + unsafe { __lasx_xvssrarni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { +pub fn lasx_xvssrarni_d_q<const IMM7: u32>(a: v4i64, b: v4i64) -> v4i64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvssrarni_d_q(a, b, IMM7) + unsafe { __lasx_xvssrarni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarni_bu_h<const IMM4: u32>(a: v32u8, b: v32i8) -> v32u8 { +pub fn lasx_xvssrarni_bu_h<const IMM4: u32>(a: v32u8, b: v32i8) -> v32u8 { static_assert_uimm_bits!(IMM4, 4); - __lasx_xvssrarni_bu_h(a, b, IMM4) + unsafe { __lasx_xvssrarni_bu_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarni_hu_w<const IMM5: u32>(a: v16u16, b: v16i16) -> v16u16 { +pub fn lasx_xvssrarni_hu_w<const IMM5: u32>(a: v16u16, b: v16i16) -> v16u16 { static_assert_uimm_bits!(IMM5, 5); - __lasx_xvssrarni_hu_w(a, b, IMM5) + unsafe { __lasx_xvssrarni_hu_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarni_wu_d<const IMM6: u32>(a: v8u32, b: v8i32) -> v8u32 { +pub fn lasx_xvssrarni_wu_d<const IMM6: u32>(a: v8u32, b: v8i32) -> v8u32 { static_assert_uimm_bits!(IMM6, 6); - __lasx_xvssrarni_wu_d(a, b, IMM6) + unsafe { __lasx_xvssrarni_wu_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvssrarni_du_q<const IMM7: u32>(a: v4u64, b: v4i64) -> v4u64 { +pub fn lasx_xvssrarni_du_q<const IMM7: u32>(a: v4u64, b: v4i64) -> v4u64 { static_assert_uimm_bits!(IMM7, 7); - __lasx_xvssrarni_du_q(a, b, IMM7) + unsafe { __lasx_xvssrarni_du_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbnz_b(a: v32u8) -> i32 { - __lasx_xbnz_b(a) +pub fn lasx_xbnz_b(a: v32u8) -> i32 { + unsafe { __lasx_xbnz_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbnz_d(a: v4u64) -> i32 { - __lasx_xbnz_d(a) +pub fn lasx_xbnz_d(a: v4u64) -> i32 { + unsafe { __lasx_xbnz_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbnz_h(a: v16u16) -> i32 { - __lasx_xbnz_h(a) +pub fn lasx_xbnz_h(a: v16u16) -> i32 { + unsafe { __lasx_xbnz_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbnz_v(a: v32u8) -> i32 { - __lasx_xbnz_v(a) +pub fn lasx_xbnz_v(a: v32u8) -> i32 { + unsafe { __lasx_xbnz_v(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbnz_w(a: v8u32) -> i32 { - __lasx_xbnz_w(a) +pub fn lasx_xbnz_w(a: v8u32) -> i32 { + unsafe { __lasx_xbnz_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbz_b(a: v32u8) -> i32 { - __lasx_xbz_b(a) +pub fn lasx_xbz_b(a: v32u8) -> i32 { + unsafe { __lasx_xbz_b(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbz_d(a: v4u64) -> i32 { - __lasx_xbz_d(a) +pub fn lasx_xbz_d(a: v4u64) -> i32 { + unsafe { __lasx_xbz_d(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbz_h(a: v16u16) -> i32 { - __lasx_xbz_h(a) +pub fn lasx_xbz_h(a: v16u16) -> i32 { + unsafe { __lasx_xbz_h(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbz_v(a: v32u8) -> i32 { - __lasx_xbz_v(a) +pub fn lasx_xbz_v(a: v32u8) -> i32 { + unsafe { __lasx_xbz_v(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xbz_w(a: v8u32) -> i32 { - __lasx_xbz_w(a) +pub fn lasx_xbz_w(a: v8u32) -> i32 { + unsafe { __lasx_xbz_w(a) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_caf_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_caf_d(a, b) +pub fn lasx_xvfcmp_caf_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_caf_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_caf_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_caf_s(a, b) +pub fn lasx_xvfcmp_caf_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_caf_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_ceq_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_ceq_d(a, b) +pub fn lasx_xvfcmp_ceq_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_ceq_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_ceq_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_ceq_s(a, b) +pub fn lasx_xvfcmp_ceq_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_ceq_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cle_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_cle_d(a, b) +pub fn lasx_xvfcmp_cle_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_cle_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cle_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_cle_s(a, b) +pub fn lasx_xvfcmp_cle_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_cle_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_clt_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_clt_d(a, b) +pub fn lasx_xvfcmp_clt_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_clt_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_clt_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_clt_s(a, b) +pub fn lasx_xvfcmp_clt_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_clt_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cne_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_cne_d(a, b) +pub fn lasx_xvfcmp_cne_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_cne_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cne_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_cne_s(a, b) +pub fn lasx_xvfcmp_cne_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_cne_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cor_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_cor_d(a, b) +pub fn lasx_xvfcmp_cor_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_cor_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cor_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_cor_s(a, b) +pub fn lasx_xvfcmp_cor_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_cor_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cueq_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_cueq_d(a, b) +pub fn lasx_xvfcmp_cueq_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_cueq_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cueq_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_cueq_s(a, b) +pub fn lasx_xvfcmp_cueq_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_cueq_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cule_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_cule_d(a, b) +pub fn lasx_xvfcmp_cule_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_cule_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cule_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_cule_s(a, b) +pub fn lasx_xvfcmp_cule_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_cule_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cult_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_cult_d(a, b) +pub fn lasx_xvfcmp_cult_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_cult_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cult_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_cult_s(a, b) +pub fn lasx_xvfcmp_cult_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_cult_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cun_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_cun_d(a, b) +pub fn lasx_xvfcmp_cun_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_cun_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cune_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_cune_d(a, b) +pub fn lasx_xvfcmp_cune_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_cune_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cune_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_cune_s(a, b) +pub fn lasx_xvfcmp_cune_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_cune_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_cun_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_cun_s(a, b) +pub fn lasx_xvfcmp_cun_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_cun_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_saf_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_saf_d(a, b) +pub fn lasx_xvfcmp_saf_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_saf_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_saf_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_saf_s(a, b) +pub fn lasx_xvfcmp_saf_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_saf_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_seq_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_seq_d(a, b) +pub fn lasx_xvfcmp_seq_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_seq_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_seq_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_seq_s(a, b) +pub fn lasx_xvfcmp_seq_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_seq_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sle_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_sle_d(a, b) +pub fn lasx_xvfcmp_sle_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_sle_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sle_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_sle_s(a, b) +pub fn lasx_xvfcmp_sle_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_sle_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_slt_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_slt_d(a, b) +pub fn lasx_xvfcmp_slt_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_slt_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_slt_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_slt_s(a, b) +pub fn lasx_xvfcmp_slt_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_slt_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sne_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_sne_d(a, b) +pub fn lasx_xvfcmp_sne_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_sne_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sne_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_sne_s(a, b) +pub fn lasx_xvfcmp_sne_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_sne_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sor_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_sor_d(a, b) +pub fn lasx_xvfcmp_sor_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_sor_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sor_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_sor_s(a, b) +pub fn lasx_xvfcmp_sor_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_sor_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sueq_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_sueq_d(a, b) +pub fn lasx_xvfcmp_sueq_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_sueq_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sueq_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_sueq_s(a, b) +pub fn lasx_xvfcmp_sueq_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_sueq_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sule_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_sule_d(a, b) +pub fn lasx_xvfcmp_sule_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_sule_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sule_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_sule_s(a, b) +pub fn lasx_xvfcmp_sule_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_sule_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sult_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_sult_d(a, b) +pub fn lasx_xvfcmp_sult_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_sult_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sult_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_sult_s(a, b) +pub fn lasx_xvfcmp_sult_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_sult_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sun_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_sun_d(a, b) +pub fn lasx_xvfcmp_sun_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_sun_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sune_d(a: v4f64, b: v4f64) -> v4i64 { - __lasx_xvfcmp_sune_d(a, b) +pub fn lasx_xvfcmp_sune_d(a: v4f64, b: v4f64) -> v4i64 { + unsafe { __lasx_xvfcmp_sune_d(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sune_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_sune_s(a, b) +pub fn lasx_xvfcmp_sune_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_sune_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvfcmp_sun_s(a: v8f32, b: v8f32) -> v8i32 { - __lasx_xvfcmp_sun_s(a, b) +pub fn lasx_xvfcmp_sun_s(a: v8f32, b: v8f32) -> v8i32 { + unsafe { __lasx_xvfcmp_sun_s(a, b) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickve_d_f<const IMM2: u32>(a: v4f64) -> v4f64 { +pub fn lasx_xvpickve_d_f<const IMM2: u32>(a: v4f64) -> v4f64 { static_assert_uimm_bits!(IMM2, 2); - __lasx_xvpickve_d_f(a, IMM2) + unsafe { __lasx_xvpickve_d_f(a, IMM2) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvpickve_w_f<const IMM3: u32>(a: v8f32) -> v8f32 { +pub fn lasx_xvpickve_w_f<const IMM3: u32>(a: v8f32) -> v8f32 { static_assert_uimm_bits!(IMM3, 3); - __lasx_xvpickve_w_f(a, IMM3) + unsafe { __lasx_xvpickve_w_f(a, IMM3) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrepli_b<const IMM_S10: i32>() -> v32i8 { +pub fn lasx_xvrepli_b<const IMM_S10: i32>() -> v32i8 { static_assert_simm_bits!(IMM_S10, 10); - __lasx_xvrepli_b(IMM_S10) + unsafe { __lasx_xvrepli_b(IMM_S10) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrepli_d<const IMM_S10: i32>() -> v4i64 { +pub fn lasx_xvrepli_d<const IMM_S10: i32>() -> v4i64 { static_assert_simm_bits!(IMM_S10, 10); - __lasx_xvrepli_d(IMM_S10) + unsafe { __lasx_xvrepli_d(IMM_S10) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrepli_h<const IMM_S10: i32>() -> v16i16 { +pub fn lasx_xvrepli_h<const IMM_S10: i32>() -> v16i16 { static_assert_simm_bits!(IMM_S10, 10); - __lasx_xvrepli_h(IMM_S10) + unsafe { __lasx_xvrepli_h(IMM_S10) } } #[inline] #[target_feature(enable = "lasx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lasx_xvrepli_w<const IMM_S10: i32>() -> v8i32 { +pub fn lasx_xvrepli_w<const IMM_S10: i32>() -> v8i32 { static_assert_simm_bits!(IMM_S10, 10); - __lasx_xvrepli_w(IMM_S10) + unsafe { __lasx_xvrepli_w(IMM_S10) } } diff --git a/library/stdarch/crates/core_arch/src/loongarch64/lsx/generated.rs b/library/stdarch/crates/core_arch/src/loongarch64/lsx/generated.rs index 2bc364f3e06..ba821a3e3dc 100644 --- a/library/stdarch/crates/core_arch/src/loongarch64/lsx/generated.rs +++ b/library/stdarch/crates/core_arch/src/loongarch64/lsx/generated.rs @@ -1455,3593 +1455,3593 @@ unsafe extern "unadjusted" { #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsll_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vsll_b(a, b) +pub fn lsx_vsll_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vsll_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsll_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vsll_h(a, b) +pub fn lsx_vsll_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vsll_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsll_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vsll_w(a, b) +pub fn lsx_vsll_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vsll_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsll_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsll_d(a, b) +pub fn lsx_vsll_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsll_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslli_b<const IMM3: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vslli_b<const IMM3: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vslli_b(a, IMM3) + unsafe { __lsx_vslli_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslli_h<const IMM4: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vslli_h<const IMM4: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vslli_h(a, IMM4) + unsafe { __lsx_vslli_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslli_w<const IMM5: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vslli_w<const IMM5: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vslli_w(a, IMM5) + unsafe { __lsx_vslli_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslli_d<const IMM6: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vslli_d<const IMM6: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vslli_d(a, IMM6) + unsafe { __lsx_vslli_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsra_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vsra_b(a, b) +pub fn lsx_vsra_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vsra_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsra_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vsra_h(a, b) +pub fn lsx_vsra_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vsra_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsra_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vsra_w(a, b) +pub fn lsx_vsra_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vsra_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsra_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsra_d(a, b) +pub fn lsx_vsra_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsra_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrai_b<const IMM3: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vsrai_b<const IMM3: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vsrai_b(a, IMM3) + unsafe { __lsx_vsrai_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrai_h<const IMM4: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vsrai_h<const IMM4: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsrai_h(a, IMM4) + unsafe { __lsx_vsrai_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrai_w<const IMM5: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vsrai_w<const IMM5: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsrai_w(a, IMM5) + unsafe { __lsx_vsrai_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrai_d<const IMM6: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vsrai_d<const IMM6: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsrai_d(a, IMM6) + unsafe { __lsx_vsrai_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrar_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vsrar_b(a, b) +pub fn lsx_vsrar_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vsrar_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrar_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vsrar_h(a, b) +pub fn lsx_vsrar_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vsrar_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrar_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vsrar_w(a, b) +pub fn lsx_vsrar_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vsrar_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrar_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsrar_d(a, b) +pub fn lsx_vsrar_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsrar_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrari_b<const IMM3: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vsrari_b<const IMM3: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vsrari_b(a, IMM3) + unsafe { __lsx_vsrari_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrari_h<const IMM4: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vsrari_h<const IMM4: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsrari_h(a, IMM4) + unsafe { __lsx_vsrari_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrari_w<const IMM5: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vsrari_w<const IMM5: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsrari_w(a, IMM5) + unsafe { __lsx_vsrari_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrari_d<const IMM6: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vsrari_d<const IMM6: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsrari_d(a, IMM6) + unsafe { __lsx_vsrari_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrl_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vsrl_b(a, b) +pub fn lsx_vsrl_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vsrl_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrl_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vsrl_h(a, b) +pub fn lsx_vsrl_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vsrl_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrl_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vsrl_w(a, b) +pub fn lsx_vsrl_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vsrl_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrl_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsrl_d(a, b) +pub fn lsx_vsrl_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsrl_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrli_b<const IMM3: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vsrli_b<const IMM3: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vsrli_b(a, IMM3) + unsafe { __lsx_vsrli_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrli_h<const IMM4: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vsrli_h<const IMM4: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsrli_h(a, IMM4) + unsafe { __lsx_vsrli_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrli_w<const IMM5: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vsrli_w<const IMM5: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsrli_w(a, IMM5) + unsafe { __lsx_vsrli_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrli_d<const IMM6: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vsrli_d<const IMM6: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsrli_d(a, IMM6) + unsafe { __lsx_vsrli_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlr_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vsrlr_b(a, b) +pub fn lsx_vsrlr_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vsrlr_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlr_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vsrlr_h(a, b) +pub fn lsx_vsrlr_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vsrlr_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlr_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vsrlr_w(a, b) +pub fn lsx_vsrlr_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vsrlr_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlr_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsrlr_d(a, b) +pub fn lsx_vsrlr_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsrlr_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlri_b<const IMM3: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vsrlri_b<const IMM3: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vsrlri_b(a, IMM3) + unsafe { __lsx_vsrlri_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlri_h<const IMM4: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vsrlri_h<const IMM4: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsrlri_h(a, IMM4) + unsafe { __lsx_vsrlri_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlri_w<const IMM5: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vsrlri_w<const IMM5: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsrlri_w(a, IMM5) + unsafe { __lsx_vsrlri_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlri_d<const IMM6: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vsrlri_d<const IMM6: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsrlri_d(a, IMM6) + unsafe { __lsx_vsrlri_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitclr_b(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vbitclr_b(a, b) +pub fn lsx_vbitclr_b(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vbitclr_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitclr_h(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vbitclr_h(a, b) +pub fn lsx_vbitclr_h(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vbitclr_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitclr_w(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vbitclr_w(a, b) +pub fn lsx_vbitclr_w(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vbitclr_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitclr_d(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vbitclr_d(a, b) +pub fn lsx_vbitclr_d(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vbitclr_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitclri_b<const IMM3: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vbitclri_b<const IMM3: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vbitclri_b(a, IMM3) + unsafe { __lsx_vbitclri_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitclri_h<const IMM4: u32>(a: v8u16) -> v8u16 { +pub fn lsx_vbitclri_h<const IMM4: u32>(a: v8u16) -> v8u16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vbitclri_h(a, IMM4) + unsafe { __lsx_vbitclri_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitclri_w<const IMM5: u32>(a: v4u32) -> v4u32 { +pub fn lsx_vbitclri_w<const IMM5: u32>(a: v4u32) -> v4u32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vbitclri_w(a, IMM5) + unsafe { __lsx_vbitclri_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitclri_d<const IMM6: u32>(a: v2u64) -> v2u64 { +pub fn lsx_vbitclri_d<const IMM6: u32>(a: v2u64) -> v2u64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vbitclri_d(a, IMM6) + unsafe { __lsx_vbitclri_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitset_b(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vbitset_b(a, b) +pub fn lsx_vbitset_b(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vbitset_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitset_h(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vbitset_h(a, b) +pub fn lsx_vbitset_h(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vbitset_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitset_w(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vbitset_w(a, b) +pub fn lsx_vbitset_w(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vbitset_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitset_d(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vbitset_d(a, b) +pub fn lsx_vbitset_d(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vbitset_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitseti_b<const IMM3: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vbitseti_b<const IMM3: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vbitseti_b(a, IMM3) + unsafe { __lsx_vbitseti_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitseti_h<const IMM4: u32>(a: v8u16) -> v8u16 { +pub fn lsx_vbitseti_h<const IMM4: u32>(a: v8u16) -> v8u16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vbitseti_h(a, IMM4) + unsafe { __lsx_vbitseti_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitseti_w<const IMM5: u32>(a: v4u32) -> v4u32 { +pub fn lsx_vbitseti_w<const IMM5: u32>(a: v4u32) -> v4u32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vbitseti_w(a, IMM5) + unsafe { __lsx_vbitseti_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitseti_d<const IMM6: u32>(a: v2u64) -> v2u64 { +pub fn lsx_vbitseti_d<const IMM6: u32>(a: v2u64) -> v2u64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vbitseti_d(a, IMM6) + unsafe { __lsx_vbitseti_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitrev_b(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vbitrev_b(a, b) +pub fn lsx_vbitrev_b(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vbitrev_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitrev_h(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vbitrev_h(a, b) +pub fn lsx_vbitrev_h(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vbitrev_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitrev_w(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vbitrev_w(a, b) +pub fn lsx_vbitrev_w(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vbitrev_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitrev_d(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vbitrev_d(a, b) +pub fn lsx_vbitrev_d(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vbitrev_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitrevi_b<const IMM3: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vbitrevi_b<const IMM3: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vbitrevi_b(a, IMM3) + unsafe { __lsx_vbitrevi_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitrevi_h<const IMM4: u32>(a: v8u16) -> v8u16 { +pub fn lsx_vbitrevi_h<const IMM4: u32>(a: v8u16) -> v8u16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vbitrevi_h(a, IMM4) + unsafe { __lsx_vbitrevi_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitrevi_w<const IMM5: u32>(a: v4u32) -> v4u32 { +pub fn lsx_vbitrevi_w<const IMM5: u32>(a: v4u32) -> v4u32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vbitrevi_w(a, IMM5) + unsafe { __lsx_vbitrevi_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitrevi_d<const IMM6: u32>(a: v2u64) -> v2u64 { +pub fn lsx_vbitrevi_d<const IMM6: u32>(a: v2u64) -> v2u64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vbitrevi_d(a, IMM6) + unsafe { __lsx_vbitrevi_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vadd_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vadd_b(a, b) +pub fn lsx_vadd_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vadd_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vadd_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vadd_h(a, b) +pub fn lsx_vadd_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vadd_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vadd_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vadd_w(a, b) +pub fn lsx_vadd_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vadd_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vadd_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vadd_d(a, b) +pub fn lsx_vadd_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vadd_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddi_bu<const IMM5: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vaddi_bu<const IMM5: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vaddi_bu(a, IMM5) + unsafe { __lsx_vaddi_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddi_hu<const IMM5: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vaddi_hu<const IMM5: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vaddi_hu(a, IMM5) + unsafe { __lsx_vaddi_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddi_wu<const IMM5: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vaddi_wu<const IMM5: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vaddi_wu(a, IMM5) + unsafe { __lsx_vaddi_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddi_du<const IMM5: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vaddi_du<const IMM5: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vaddi_du(a, IMM5) + unsafe { __lsx_vaddi_du(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsub_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vsub_b(a, b) +pub fn lsx_vsub_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vsub_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsub_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vsub_h(a, b) +pub fn lsx_vsub_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vsub_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsub_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vsub_w(a, b) +pub fn lsx_vsub_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vsub_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsub_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsub_d(a, b) +pub fn lsx_vsub_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsub_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubi_bu<const IMM5: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vsubi_bu<const IMM5: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsubi_bu(a, IMM5) + unsafe { __lsx_vsubi_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubi_hu<const IMM5: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vsubi_hu<const IMM5: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsubi_hu(a, IMM5) + unsafe { __lsx_vsubi_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubi_wu<const IMM5: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vsubi_wu<const IMM5: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsubi_wu(a, IMM5) + unsafe { __lsx_vsubi_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubi_du<const IMM5: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vsubi_du<const IMM5: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsubi_du(a, IMM5) + unsafe { __lsx_vsubi_du(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmax_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vmax_b(a, b) +pub fn lsx_vmax_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vmax_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmax_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vmax_h(a, b) +pub fn lsx_vmax_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vmax_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmax_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vmax_w(a, b) +pub fn lsx_vmax_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vmax_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmax_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vmax_d(a, b) +pub fn lsx_vmax_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vmax_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaxi_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { +pub fn lsx_vmaxi_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vmaxi_b(a, IMM_S5) + unsafe { __lsx_vmaxi_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaxi_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { +pub fn lsx_vmaxi_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vmaxi_h(a, IMM_S5) + unsafe { __lsx_vmaxi_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaxi_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { +pub fn lsx_vmaxi_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vmaxi_w(a, IMM_S5) + unsafe { __lsx_vmaxi_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaxi_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { +pub fn lsx_vmaxi_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vmaxi_d(a, IMM_S5) + unsafe { __lsx_vmaxi_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmax_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vmax_bu(a, b) +pub fn lsx_vmax_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vmax_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmax_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vmax_hu(a, b) +pub fn lsx_vmax_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vmax_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmax_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vmax_wu(a, b) +pub fn lsx_vmax_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vmax_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmax_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vmax_du(a, b) +pub fn lsx_vmax_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vmax_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaxi_bu<const IMM5: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vmaxi_bu<const IMM5: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vmaxi_bu(a, IMM5) + unsafe { __lsx_vmaxi_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaxi_hu<const IMM5: u32>(a: v8u16) -> v8u16 { +pub fn lsx_vmaxi_hu<const IMM5: u32>(a: v8u16) -> v8u16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vmaxi_hu(a, IMM5) + unsafe { __lsx_vmaxi_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaxi_wu<const IMM5: u32>(a: v4u32) -> v4u32 { +pub fn lsx_vmaxi_wu<const IMM5: u32>(a: v4u32) -> v4u32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vmaxi_wu(a, IMM5) + unsafe { __lsx_vmaxi_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaxi_du<const IMM5: u32>(a: v2u64) -> v2u64 { +pub fn lsx_vmaxi_du<const IMM5: u32>(a: v2u64) -> v2u64 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vmaxi_du(a, IMM5) + unsafe { __lsx_vmaxi_du(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmin_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vmin_b(a, b) +pub fn lsx_vmin_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vmin_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmin_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vmin_h(a, b) +pub fn lsx_vmin_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vmin_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmin_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vmin_w(a, b) +pub fn lsx_vmin_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vmin_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmin_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vmin_d(a, b) +pub fn lsx_vmin_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vmin_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmini_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { +pub fn lsx_vmini_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vmini_b(a, IMM_S5) + unsafe { __lsx_vmini_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmini_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { +pub fn lsx_vmini_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vmini_h(a, IMM_S5) + unsafe { __lsx_vmini_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmini_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { +pub fn lsx_vmini_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vmini_w(a, IMM_S5) + unsafe { __lsx_vmini_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmini_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { +pub fn lsx_vmini_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vmini_d(a, IMM_S5) + unsafe { __lsx_vmini_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmin_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vmin_bu(a, b) +pub fn lsx_vmin_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vmin_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmin_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vmin_hu(a, b) +pub fn lsx_vmin_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vmin_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmin_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vmin_wu(a, b) +pub fn lsx_vmin_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vmin_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmin_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vmin_du(a, b) +pub fn lsx_vmin_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vmin_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmini_bu<const IMM5: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vmini_bu<const IMM5: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vmini_bu(a, IMM5) + unsafe { __lsx_vmini_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmini_hu<const IMM5: u32>(a: v8u16) -> v8u16 { +pub fn lsx_vmini_hu<const IMM5: u32>(a: v8u16) -> v8u16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vmini_hu(a, IMM5) + unsafe { __lsx_vmini_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmini_wu<const IMM5: u32>(a: v4u32) -> v4u32 { +pub fn lsx_vmini_wu<const IMM5: u32>(a: v4u32) -> v4u32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vmini_wu(a, IMM5) + unsafe { __lsx_vmini_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmini_du<const IMM5: u32>(a: v2u64) -> v2u64 { +pub fn lsx_vmini_du<const IMM5: u32>(a: v2u64) -> v2u64 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vmini_du(a, IMM5) + unsafe { __lsx_vmini_du(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vseq_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vseq_b(a, b) +pub fn lsx_vseq_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vseq_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vseq_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vseq_h(a, b) +pub fn lsx_vseq_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vseq_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vseq_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vseq_w(a, b) +pub fn lsx_vseq_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vseq_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vseq_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vseq_d(a, b) +pub fn lsx_vseq_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vseq_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vseqi_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { +pub fn lsx_vseqi_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vseqi_b(a, IMM_S5) + unsafe { __lsx_vseqi_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vseqi_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { +pub fn lsx_vseqi_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vseqi_h(a, IMM_S5) + unsafe { __lsx_vseqi_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vseqi_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { +pub fn lsx_vseqi_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vseqi_w(a, IMM_S5) + unsafe { __lsx_vseqi_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vseqi_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { +pub fn lsx_vseqi_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vseqi_d(a, IMM_S5) + unsafe { __lsx_vseqi_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslti_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { +pub fn lsx_vslti_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vslti_b(a, IMM_S5) + unsafe { __lsx_vslti_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslt_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vslt_b(a, b) +pub fn lsx_vslt_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vslt_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslt_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vslt_h(a, b) +pub fn lsx_vslt_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vslt_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslt_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vslt_w(a, b) +pub fn lsx_vslt_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vslt_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslt_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vslt_d(a, b) +pub fn lsx_vslt_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vslt_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslti_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { +pub fn lsx_vslti_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vslti_h(a, IMM_S5) + unsafe { __lsx_vslti_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslti_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { +pub fn lsx_vslti_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vslti_w(a, IMM_S5) + unsafe { __lsx_vslti_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslti_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { +pub fn lsx_vslti_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vslti_d(a, IMM_S5) + unsafe { __lsx_vslti_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslt_bu(a: v16u8, b: v16u8) -> v16i8 { - __lsx_vslt_bu(a, b) +pub fn lsx_vslt_bu(a: v16u8, b: v16u8) -> v16i8 { + unsafe { __lsx_vslt_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslt_hu(a: v8u16, b: v8u16) -> v8i16 { - __lsx_vslt_hu(a, b) +pub fn lsx_vslt_hu(a: v8u16, b: v8u16) -> v8i16 { + unsafe { __lsx_vslt_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslt_wu(a: v4u32, b: v4u32) -> v4i32 { - __lsx_vslt_wu(a, b) +pub fn lsx_vslt_wu(a: v4u32, b: v4u32) -> v4i32 { + unsafe { __lsx_vslt_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslt_du(a: v2u64, b: v2u64) -> v2i64 { - __lsx_vslt_du(a, b) +pub fn lsx_vslt_du(a: v2u64, b: v2u64) -> v2i64 { + unsafe { __lsx_vslt_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslti_bu<const IMM5: u32>(a: v16u8) -> v16i8 { +pub fn lsx_vslti_bu<const IMM5: u32>(a: v16u8) -> v16i8 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vslti_bu(a, IMM5) + unsafe { __lsx_vslti_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslti_hu<const IMM5: u32>(a: v8u16) -> v8i16 { +pub fn lsx_vslti_hu<const IMM5: u32>(a: v8u16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vslti_hu(a, IMM5) + unsafe { __lsx_vslti_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslti_wu<const IMM5: u32>(a: v4u32) -> v4i32 { +pub fn lsx_vslti_wu<const IMM5: u32>(a: v4u32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vslti_wu(a, IMM5) + unsafe { __lsx_vslti_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslti_du<const IMM5: u32>(a: v2u64) -> v2i64 { +pub fn lsx_vslti_du<const IMM5: u32>(a: v2u64) -> v2i64 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vslti_du(a, IMM5) + unsafe { __lsx_vslti_du(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsle_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vsle_b(a, b) +pub fn lsx_vsle_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vsle_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsle_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vsle_h(a, b) +pub fn lsx_vsle_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vsle_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsle_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vsle_w(a, b) +pub fn lsx_vsle_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vsle_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsle_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsle_d(a, b) +pub fn lsx_vsle_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsle_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslei_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { +pub fn lsx_vslei_b<const IMM_S5: i32>(a: v16i8) -> v16i8 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vslei_b(a, IMM_S5) + unsafe { __lsx_vslei_b(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslei_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { +pub fn lsx_vslei_h<const IMM_S5: i32>(a: v8i16) -> v8i16 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vslei_h(a, IMM_S5) + unsafe { __lsx_vslei_h(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslei_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { +pub fn lsx_vslei_w<const IMM_S5: i32>(a: v4i32) -> v4i32 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vslei_w(a, IMM_S5) + unsafe { __lsx_vslei_w(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslei_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { +pub fn lsx_vslei_d<const IMM_S5: i32>(a: v2i64) -> v2i64 { static_assert_simm_bits!(IMM_S5, 5); - __lsx_vslei_d(a, IMM_S5) + unsafe { __lsx_vslei_d(a, IMM_S5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsle_bu(a: v16u8, b: v16u8) -> v16i8 { - __lsx_vsle_bu(a, b) +pub fn lsx_vsle_bu(a: v16u8, b: v16u8) -> v16i8 { + unsafe { __lsx_vsle_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsle_hu(a: v8u16, b: v8u16) -> v8i16 { - __lsx_vsle_hu(a, b) +pub fn lsx_vsle_hu(a: v8u16, b: v8u16) -> v8i16 { + unsafe { __lsx_vsle_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsle_wu(a: v4u32, b: v4u32) -> v4i32 { - __lsx_vsle_wu(a, b) +pub fn lsx_vsle_wu(a: v4u32, b: v4u32) -> v4i32 { + unsafe { __lsx_vsle_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsle_du(a: v2u64, b: v2u64) -> v2i64 { - __lsx_vsle_du(a, b) +pub fn lsx_vsle_du(a: v2u64, b: v2u64) -> v2i64 { + unsafe { __lsx_vsle_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslei_bu<const IMM5: u32>(a: v16u8) -> v16i8 { +pub fn lsx_vslei_bu<const IMM5: u32>(a: v16u8) -> v16i8 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vslei_bu(a, IMM5) + unsafe { __lsx_vslei_bu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslei_hu<const IMM5: u32>(a: v8u16) -> v8i16 { +pub fn lsx_vslei_hu<const IMM5: u32>(a: v8u16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vslei_hu(a, IMM5) + unsafe { __lsx_vslei_hu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslei_wu<const IMM5: u32>(a: v4u32) -> v4i32 { +pub fn lsx_vslei_wu<const IMM5: u32>(a: v4u32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vslei_wu(a, IMM5) + unsafe { __lsx_vslei_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vslei_du<const IMM5: u32>(a: v2u64) -> v2i64 { +pub fn lsx_vslei_du<const IMM5: u32>(a: v2u64) -> v2i64 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vslei_du(a, IMM5) + unsafe { __lsx_vslei_du(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsat_b<const IMM3: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vsat_b<const IMM3: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vsat_b(a, IMM3) + unsafe { __lsx_vsat_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsat_h<const IMM4: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vsat_h<const IMM4: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsat_h(a, IMM4) + unsafe { __lsx_vsat_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsat_w<const IMM5: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vsat_w<const IMM5: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsat_w(a, IMM5) + unsafe { __lsx_vsat_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsat_d<const IMM6: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vsat_d<const IMM6: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsat_d(a, IMM6) + unsafe { __lsx_vsat_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsat_bu<const IMM3: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vsat_bu<const IMM3: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vsat_bu(a, IMM3) + unsafe { __lsx_vsat_bu(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsat_hu<const IMM4: u32>(a: v8u16) -> v8u16 { +pub fn lsx_vsat_hu<const IMM4: u32>(a: v8u16) -> v8u16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsat_hu(a, IMM4) + unsafe { __lsx_vsat_hu(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsat_wu<const IMM5: u32>(a: v4u32) -> v4u32 { +pub fn lsx_vsat_wu<const IMM5: u32>(a: v4u32) -> v4u32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsat_wu(a, IMM5) + unsafe { __lsx_vsat_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsat_du<const IMM6: u32>(a: v2u64) -> v2u64 { +pub fn lsx_vsat_du<const IMM6: u32>(a: v2u64) -> v2u64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsat_du(a, IMM6) + unsafe { __lsx_vsat_du(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vadda_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vadda_b(a, b) +pub fn lsx_vadda_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vadda_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vadda_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vadda_h(a, b) +pub fn lsx_vadda_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vadda_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vadda_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vadda_w(a, b) +pub fn lsx_vadda_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vadda_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vadda_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vadda_d(a, b) +pub fn lsx_vadda_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vadda_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsadd_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vsadd_b(a, b) +pub fn lsx_vsadd_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vsadd_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsadd_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vsadd_h(a, b) +pub fn lsx_vsadd_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vsadd_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsadd_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vsadd_w(a, b) +pub fn lsx_vsadd_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vsadd_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsadd_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsadd_d(a, b) +pub fn lsx_vsadd_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsadd_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsadd_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vsadd_bu(a, b) +pub fn lsx_vsadd_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vsadd_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsadd_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vsadd_hu(a, b) +pub fn lsx_vsadd_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vsadd_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsadd_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vsadd_wu(a, b) +pub fn lsx_vsadd_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vsadd_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsadd_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vsadd_du(a, b) +pub fn lsx_vsadd_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vsadd_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavg_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vavg_b(a, b) +pub fn lsx_vavg_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vavg_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavg_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vavg_h(a, b) +pub fn lsx_vavg_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vavg_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavg_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vavg_w(a, b) +pub fn lsx_vavg_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vavg_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavg_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vavg_d(a, b) +pub fn lsx_vavg_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vavg_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavg_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vavg_bu(a, b) +pub fn lsx_vavg_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vavg_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavg_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vavg_hu(a, b) +pub fn lsx_vavg_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vavg_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavg_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vavg_wu(a, b) +pub fn lsx_vavg_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vavg_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavg_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vavg_du(a, b) +pub fn lsx_vavg_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vavg_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavgr_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vavgr_b(a, b) +pub fn lsx_vavgr_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vavgr_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavgr_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vavgr_h(a, b) +pub fn lsx_vavgr_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vavgr_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavgr_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vavgr_w(a, b) +pub fn lsx_vavgr_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vavgr_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavgr_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vavgr_d(a, b) +pub fn lsx_vavgr_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vavgr_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavgr_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vavgr_bu(a, b) +pub fn lsx_vavgr_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vavgr_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavgr_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vavgr_hu(a, b) +pub fn lsx_vavgr_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vavgr_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavgr_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vavgr_wu(a, b) +pub fn lsx_vavgr_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vavgr_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vavgr_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vavgr_du(a, b) +pub fn lsx_vavgr_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vavgr_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssub_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vssub_b(a, b) +pub fn lsx_vssub_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vssub_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssub_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vssub_h(a, b) +pub fn lsx_vssub_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vssub_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssub_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vssub_w(a, b) +pub fn lsx_vssub_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vssub_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssub_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vssub_d(a, b) +pub fn lsx_vssub_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vssub_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssub_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vssub_bu(a, b) +pub fn lsx_vssub_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vssub_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssub_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vssub_hu(a, b) +pub fn lsx_vssub_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vssub_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssub_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vssub_wu(a, b) +pub fn lsx_vssub_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vssub_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssub_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vssub_du(a, b) +pub fn lsx_vssub_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vssub_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vabsd_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vabsd_b(a, b) +pub fn lsx_vabsd_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vabsd_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vabsd_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vabsd_h(a, b) +pub fn lsx_vabsd_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vabsd_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vabsd_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vabsd_w(a, b) +pub fn lsx_vabsd_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vabsd_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vabsd_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vabsd_d(a, b) +pub fn lsx_vabsd_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vabsd_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vabsd_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vabsd_bu(a, b) +pub fn lsx_vabsd_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vabsd_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vabsd_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vabsd_hu(a, b) +pub fn lsx_vabsd_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vabsd_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vabsd_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vabsd_wu(a, b) +pub fn lsx_vabsd_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vabsd_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vabsd_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vabsd_du(a, b) +pub fn lsx_vabsd_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vabsd_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmul_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vmul_b(a, b) +pub fn lsx_vmul_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vmul_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmul_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vmul_h(a, b) +pub fn lsx_vmul_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vmul_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmul_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vmul_w(a, b) +pub fn lsx_vmul_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vmul_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmul_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vmul_d(a, b) +pub fn lsx_vmul_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vmul_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmadd_b(a: v16i8, b: v16i8, c: v16i8) -> v16i8 { - __lsx_vmadd_b(a, b, c) +pub fn lsx_vmadd_b(a: v16i8, b: v16i8, c: v16i8) -> v16i8 { + unsafe { __lsx_vmadd_b(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmadd_h(a: v8i16, b: v8i16, c: v8i16) -> v8i16 { - __lsx_vmadd_h(a, b, c) +pub fn lsx_vmadd_h(a: v8i16, b: v8i16, c: v8i16) -> v8i16 { + unsafe { __lsx_vmadd_h(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmadd_w(a: v4i32, b: v4i32, c: v4i32) -> v4i32 { - __lsx_vmadd_w(a, b, c) +pub fn lsx_vmadd_w(a: v4i32, b: v4i32, c: v4i32) -> v4i32 { + unsafe { __lsx_vmadd_w(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmadd_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { - __lsx_vmadd_d(a, b, c) +pub fn lsx_vmadd_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { + unsafe { __lsx_vmadd_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmsub_b(a: v16i8, b: v16i8, c: v16i8) -> v16i8 { - __lsx_vmsub_b(a, b, c) +pub fn lsx_vmsub_b(a: v16i8, b: v16i8, c: v16i8) -> v16i8 { + unsafe { __lsx_vmsub_b(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmsub_h(a: v8i16, b: v8i16, c: v8i16) -> v8i16 { - __lsx_vmsub_h(a, b, c) +pub fn lsx_vmsub_h(a: v8i16, b: v8i16, c: v8i16) -> v8i16 { + unsafe { __lsx_vmsub_h(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmsub_w(a: v4i32, b: v4i32, c: v4i32) -> v4i32 { - __lsx_vmsub_w(a, b, c) +pub fn lsx_vmsub_w(a: v4i32, b: v4i32, c: v4i32) -> v4i32 { + unsafe { __lsx_vmsub_w(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmsub_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { - __lsx_vmsub_d(a, b, c) +pub fn lsx_vmsub_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { + unsafe { __lsx_vmsub_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vdiv_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vdiv_b(a, b) +pub fn lsx_vdiv_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vdiv_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vdiv_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vdiv_h(a, b) +pub fn lsx_vdiv_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vdiv_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vdiv_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vdiv_w(a, b) +pub fn lsx_vdiv_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vdiv_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vdiv_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vdiv_d(a, b) +pub fn lsx_vdiv_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vdiv_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vdiv_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vdiv_bu(a, b) +pub fn lsx_vdiv_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vdiv_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vdiv_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vdiv_hu(a, b) +pub fn lsx_vdiv_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vdiv_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vdiv_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vdiv_wu(a, b) +pub fn lsx_vdiv_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vdiv_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vdiv_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vdiv_du(a, b) +pub fn lsx_vdiv_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vdiv_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhaddw_h_b(a: v16i8, b: v16i8) -> v8i16 { - __lsx_vhaddw_h_b(a, b) +pub fn lsx_vhaddw_h_b(a: v16i8, b: v16i8) -> v8i16 { + unsafe { __lsx_vhaddw_h_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhaddw_w_h(a: v8i16, b: v8i16) -> v4i32 { - __lsx_vhaddw_w_h(a, b) +pub fn lsx_vhaddw_w_h(a: v8i16, b: v8i16) -> v4i32 { + unsafe { __lsx_vhaddw_w_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhaddw_d_w(a: v4i32, b: v4i32) -> v2i64 { - __lsx_vhaddw_d_w(a, b) +pub fn lsx_vhaddw_d_w(a: v4i32, b: v4i32) -> v2i64 { + unsafe { __lsx_vhaddw_d_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhaddw_hu_bu(a: v16u8, b: v16u8) -> v8u16 { - __lsx_vhaddw_hu_bu(a, b) +pub fn lsx_vhaddw_hu_bu(a: v16u8, b: v16u8) -> v8u16 { + unsafe { __lsx_vhaddw_hu_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhaddw_wu_hu(a: v8u16, b: v8u16) -> v4u32 { - __lsx_vhaddw_wu_hu(a, b) +pub fn lsx_vhaddw_wu_hu(a: v8u16, b: v8u16) -> v4u32 { + unsafe { __lsx_vhaddw_wu_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhaddw_du_wu(a: v4u32, b: v4u32) -> v2u64 { - __lsx_vhaddw_du_wu(a, b) +pub fn lsx_vhaddw_du_wu(a: v4u32, b: v4u32) -> v2u64 { + unsafe { __lsx_vhaddw_du_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhsubw_h_b(a: v16i8, b: v16i8) -> v8i16 { - __lsx_vhsubw_h_b(a, b) +pub fn lsx_vhsubw_h_b(a: v16i8, b: v16i8) -> v8i16 { + unsafe { __lsx_vhsubw_h_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhsubw_w_h(a: v8i16, b: v8i16) -> v4i32 { - __lsx_vhsubw_w_h(a, b) +pub fn lsx_vhsubw_w_h(a: v8i16, b: v8i16) -> v4i32 { + unsafe { __lsx_vhsubw_w_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhsubw_d_w(a: v4i32, b: v4i32) -> v2i64 { - __lsx_vhsubw_d_w(a, b) +pub fn lsx_vhsubw_d_w(a: v4i32, b: v4i32) -> v2i64 { + unsafe { __lsx_vhsubw_d_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhsubw_hu_bu(a: v16u8, b: v16u8) -> v8i16 { - __lsx_vhsubw_hu_bu(a, b) +pub fn lsx_vhsubw_hu_bu(a: v16u8, b: v16u8) -> v8i16 { + unsafe { __lsx_vhsubw_hu_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhsubw_wu_hu(a: v8u16, b: v8u16) -> v4i32 { - __lsx_vhsubw_wu_hu(a, b) +pub fn lsx_vhsubw_wu_hu(a: v8u16, b: v8u16) -> v4i32 { + unsafe { __lsx_vhsubw_wu_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhsubw_du_wu(a: v4u32, b: v4u32) -> v2i64 { - __lsx_vhsubw_du_wu(a, b) +pub fn lsx_vhsubw_du_wu(a: v4u32, b: v4u32) -> v2i64 { + unsafe { __lsx_vhsubw_du_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmod_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vmod_b(a, b) +pub fn lsx_vmod_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vmod_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmod_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vmod_h(a, b) +pub fn lsx_vmod_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vmod_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmod_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vmod_w(a, b) +pub fn lsx_vmod_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vmod_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmod_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vmod_d(a, b) +pub fn lsx_vmod_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vmod_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmod_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vmod_bu(a, b) +pub fn lsx_vmod_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vmod_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmod_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vmod_hu(a, b) +pub fn lsx_vmod_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vmod_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmod_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vmod_wu(a, b) +pub fn lsx_vmod_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vmod_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmod_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vmod_du(a, b) +pub fn lsx_vmod_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vmod_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplve_b(a: v16i8, b: i32) -> v16i8 { - __lsx_vreplve_b(a, b) +pub fn lsx_vreplve_b(a: v16i8, b: i32) -> v16i8 { + unsafe { __lsx_vreplve_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplve_h(a: v8i16, b: i32) -> v8i16 { - __lsx_vreplve_h(a, b) +pub fn lsx_vreplve_h(a: v8i16, b: i32) -> v8i16 { + unsafe { __lsx_vreplve_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplve_w(a: v4i32, b: i32) -> v4i32 { - __lsx_vreplve_w(a, b) +pub fn lsx_vreplve_w(a: v4i32, b: i32) -> v4i32 { + unsafe { __lsx_vreplve_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplve_d(a: v2i64, b: i32) -> v2i64 { - __lsx_vreplve_d(a, b) +pub fn lsx_vreplve_d(a: v2i64, b: i32) -> v2i64 { + unsafe { __lsx_vreplve_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplvei_b<const IMM4: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vreplvei_b<const IMM4: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vreplvei_b(a, IMM4) + unsafe { __lsx_vreplvei_b(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplvei_h<const IMM3: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vreplvei_h<const IMM3: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vreplvei_h(a, IMM3) + unsafe { __lsx_vreplvei_h(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplvei_w<const IMM2: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vreplvei_w<const IMM2: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM2, 2); - __lsx_vreplvei_w(a, IMM2) + unsafe { __lsx_vreplvei_w(a, IMM2) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplvei_d<const IMM1: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vreplvei_d<const IMM1: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM1, 1); - __lsx_vreplvei_d(a, IMM1) + unsafe { __lsx_vreplvei_d(a, IMM1) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickev_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vpickev_b(a, b) +pub fn lsx_vpickev_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vpickev_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickev_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vpickev_h(a, b) +pub fn lsx_vpickev_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vpickev_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickev_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vpickev_w(a, b) +pub fn lsx_vpickev_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vpickev_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickev_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vpickev_d(a, b) +pub fn lsx_vpickev_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vpickev_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickod_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vpickod_b(a, b) +pub fn lsx_vpickod_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vpickod_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickod_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vpickod_h(a, b) +pub fn lsx_vpickod_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vpickod_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickod_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vpickod_w(a, b) +pub fn lsx_vpickod_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vpickod_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickod_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vpickod_d(a, b) +pub fn lsx_vpickod_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vpickod_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vilvh_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vilvh_b(a, b) +pub fn lsx_vilvh_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vilvh_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vilvh_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vilvh_h(a, b) +pub fn lsx_vilvh_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vilvh_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vilvh_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vilvh_w(a, b) +pub fn lsx_vilvh_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vilvh_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vilvh_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vilvh_d(a, b) +pub fn lsx_vilvh_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vilvh_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vilvl_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vilvl_b(a, b) +pub fn lsx_vilvl_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vilvl_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vilvl_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vilvl_h(a, b) +pub fn lsx_vilvl_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vilvl_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vilvl_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vilvl_w(a, b) +pub fn lsx_vilvl_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vilvl_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vilvl_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vilvl_d(a, b) +pub fn lsx_vilvl_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vilvl_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpackev_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vpackev_b(a, b) +pub fn lsx_vpackev_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vpackev_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpackev_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vpackev_h(a, b) +pub fn lsx_vpackev_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vpackev_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpackev_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vpackev_w(a, b) +pub fn lsx_vpackev_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vpackev_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpackev_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vpackev_d(a, b) +pub fn lsx_vpackev_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vpackev_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpackod_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vpackod_b(a, b) +pub fn lsx_vpackod_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vpackod_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpackod_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vpackod_h(a, b) +pub fn lsx_vpackod_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vpackod_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpackod_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vpackod_w(a, b) +pub fn lsx_vpackod_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vpackod_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpackod_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vpackod_d(a, b) +pub fn lsx_vpackod_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vpackod_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vshuf_h(a: v8i16, b: v8i16, c: v8i16) -> v8i16 { - __lsx_vshuf_h(a, b, c) +pub fn lsx_vshuf_h(a: v8i16, b: v8i16, c: v8i16) -> v8i16 { + unsafe { __lsx_vshuf_h(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vshuf_w(a: v4i32, b: v4i32, c: v4i32) -> v4i32 { - __lsx_vshuf_w(a, b, c) +pub fn lsx_vshuf_w(a: v4i32, b: v4i32, c: v4i32) -> v4i32 { + unsafe { __lsx_vshuf_w(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vshuf_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { - __lsx_vshuf_d(a, b, c) +pub fn lsx_vshuf_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { + unsafe { __lsx_vshuf_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vand_v(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vand_v(a, b) +pub fn lsx_vand_v(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vand_v(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vandi_b<const IMM8: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vandi_b<const IMM8: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vandi_b(a, IMM8) + unsafe { __lsx_vandi_b(a, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vor_v(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vor_v(a, b) +pub fn lsx_vor_v(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vor_v(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vori_b<const IMM8: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vori_b<const IMM8: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vori_b(a, IMM8) + unsafe { __lsx_vori_b(a, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vnor_v(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vnor_v(a, b) +pub fn lsx_vnor_v(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vnor_v(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vnori_b<const IMM8: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vnori_b<const IMM8: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vnori_b(a, IMM8) + unsafe { __lsx_vnori_b(a, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vxor_v(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vxor_v(a, b) +pub fn lsx_vxor_v(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vxor_v(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vxori_b<const IMM8: u32>(a: v16u8) -> v16u8 { +pub fn lsx_vxori_b<const IMM8: u32>(a: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vxori_b(a, IMM8) + unsafe { __lsx_vxori_b(a, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitsel_v(a: v16u8, b: v16u8, c: v16u8) -> v16u8 { - __lsx_vbitsel_v(a, b, c) +pub fn lsx_vbitsel_v(a: v16u8, b: v16u8, c: v16u8) -> v16u8 { + unsafe { __lsx_vbitsel_v(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbitseli_b<const IMM8: u32>(a: v16u8, b: v16u8) -> v16u8 { +pub fn lsx_vbitseli_b<const IMM8: u32>(a: v16u8, b: v16u8) -> v16u8 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vbitseli_b(a, b, IMM8) + unsafe { __lsx_vbitseli_b(a, b, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vshuf4i_b<const IMM8: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vshuf4i_b<const IMM8: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vshuf4i_b(a, IMM8) + unsafe { __lsx_vshuf4i_b(a, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vshuf4i_h<const IMM8: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vshuf4i_h<const IMM8: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vshuf4i_h(a, IMM8) + unsafe { __lsx_vshuf4i_h(a, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vshuf4i_w<const IMM8: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vshuf4i_w<const IMM8: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vshuf4i_w(a, IMM8) + unsafe { __lsx_vshuf4i_w(a, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplgr2vr_b(a: i32) -> v16i8 { - __lsx_vreplgr2vr_b(a) +pub fn lsx_vreplgr2vr_b(a: i32) -> v16i8 { + unsafe { __lsx_vreplgr2vr_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplgr2vr_h(a: i32) -> v8i16 { - __lsx_vreplgr2vr_h(a) +pub fn lsx_vreplgr2vr_h(a: i32) -> v8i16 { + unsafe { __lsx_vreplgr2vr_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplgr2vr_w(a: i32) -> v4i32 { - __lsx_vreplgr2vr_w(a) +pub fn lsx_vreplgr2vr_w(a: i32) -> v4i32 { + unsafe { __lsx_vreplgr2vr_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vreplgr2vr_d(a: i64) -> v2i64 { - __lsx_vreplgr2vr_d(a) +pub fn lsx_vreplgr2vr_d(a: i64) -> v2i64 { + unsafe { __lsx_vreplgr2vr_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpcnt_b(a: v16i8) -> v16i8 { - __lsx_vpcnt_b(a) +pub fn lsx_vpcnt_b(a: v16i8) -> v16i8 { + unsafe { __lsx_vpcnt_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpcnt_h(a: v8i16) -> v8i16 { - __lsx_vpcnt_h(a) +pub fn lsx_vpcnt_h(a: v8i16) -> v8i16 { + unsafe { __lsx_vpcnt_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpcnt_w(a: v4i32) -> v4i32 { - __lsx_vpcnt_w(a) +pub fn lsx_vpcnt_w(a: v4i32) -> v4i32 { + unsafe { __lsx_vpcnt_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpcnt_d(a: v2i64) -> v2i64 { - __lsx_vpcnt_d(a) +pub fn lsx_vpcnt_d(a: v2i64) -> v2i64 { + unsafe { __lsx_vpcnt_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vclo_b(a: v16i8) -> v16i8 { - __lsx_vclo_b(a) +pub fn lsx_vclo_b(a: v16i8) -> v16i8 { + unsafe { __lsx_vclo_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vclo_h(a: v8i16) -> v8i16 { - __lsx_vclo_h(a) +pub fn lsx_vclo_h(a: v8i16) -> v8i16 { + unsafe { __lsx_vclo_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vclo_w(a: v4i32) -> v4i32 { - __lsx_vclo_w(a) +pub fn lsx_vclo_w(a: v4i32) -> v4i32 { + unsafe { __lsx_vclo_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vclo_d(a: v2i64) -> v2i64 { - __lsx_vclo_d(a) +pub fn lsx_vclo_d(a: v2i64) -> v2i64 { + unsafe { __lsx_vclo_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vclz_b(a: v16i8) -> v16i8 { - __lsx_vclz_b(a) +pub fn lsx_vclz_b(a: v16i8) -> v16i8 { + unsafe { __lsx_vclz_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vclz_h(a: v8i16) -> v8i16 { - __lsx_vclz_h(a) +pub fn lsx_vclz_h(a: v8i16) -> v8i16 { + unsafe { __lsx_vclz_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vclz_w(a: v4i32) -> v4i32 { - __lsx_vclz_w(a) +pub fn lsx_vclz_w(a: v4i32) -> v4i32 { + unsafe { __lsx_vclz_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vclz_d(a: v2i64) -> v2i64 { - __lsx_vclz_d(a) +pub fn lsx_vclz_d(a: v2i64) -> v2i64 { + unsafe { __lsx_vclz_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickve2gr_b<const IMM4: u32>(a: v16i8) -> i32 { +pub fn lsx_vpickve2gr_b<const IMM4: u32>(a: v16i8) -> i32 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vpickve2gr_b(a, IMM4) + unsafe { __lsx_vpickve2gr_b(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickve2gr_h<const IMM3: u32>(a: v8i16) -> i32 { +pub fn lsx_vpickve2gr_h<const IMM3: u32>(a: v8i16) -> i32 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vpickve2gr_h(a, IMM3) + unsafe { __lsx_vpickve2gr_h(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickve2gr_w<const IMM2: u32>(a: v4i32) -> i32 { +pub fn lsx_vpickve2gr_w<const IMM2: u32>(a: v4i32) -> i32 { static_assert_uimm_bits!(IMM2, 2); - __lsx_vpickve2gr_w(a, IMM2) + unsafe { __lsx_vpickve2gr_w(a, IMM2) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickve2gr_d<const IMM1: u32>(a: v2i64) -> i64 { +pub fn lsx_vpickve2gr_d<const IMM1: u32>(a: v2i64) -> i64 { static_assert_uimm_bits!(IMM1, 1); - __lsx_vpickve2gr_d(a, IMM1) + unsafe { __lsx_vpickve2gr_d(a, IMM1) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickve2gr_bu<const IMM4: u32>(a: v16i8) -> u32 { +pub fn lsx_vpickve2gr_bu<const IMM4: u32>(a: v16i8) -> u32 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vpickve2gr_bu(a, IMM4) + unsafe { __lsx_vpickve2gr_bu(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickve2gr_hu<const IMM3: u32>(a: v8i16) -> u32 { +pub fn lsx_vpickve2gr_hu<const IMM3: u32>(a: v8i16) -> u32 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vpickve2gr_hu(a, IMM3) + unsafe { __lsx_vpickve2gr_hu(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickve2gr_wu<const IMM2: u32>(a: v4i32) -> u32 { +pub fn lsx_vpickve2gr_wu<const IMM2: u32>(a: v4i32) -> u32 { static_assert_uimm_bits!(IMM2, 2); - __lsx_vpickve2gr_wu(a, IMM2) + unsafe { __lsx_vpickve2gr_wu(a, IMM2) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpickve2gr_du<const IMM1: u32>(a: v2i64) -> u64 { +pub fn lsx_vpickve2gr_du<const IMM1: u32>(a: v2i64) -> u64 { static_assert_uimm_bits!(IMM1, 1); - __lsx_vpickve2gr_du(a, IMM1) + unsafe { __lsx_vpickve2gr_du(a, IMM1) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vinsgr2vr_b<const IMM4: u32>(a: v16i8, b: i32) -> v16i8 { +pub fn lsx_vinsgr2vr_b<const IMM4: u32>(a: v16i8, b: i32) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vinsgr2vr_b(a, b, IMM4) + unsafe { __lsx_vinsgr2vr_b(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vinsgr2vr_h<const IMM3: u32>(a: v8i16, b: i32) -> v8i16 { +pub fn lsx_vinsgr2vr_h<const IMM3: u32>(a: v8i16, b: i32) -> v8i16 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vinsgr2vr_h(a, b, IMM3) + unsafe { __lsx_vinsgr2vr_h(a, b, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vinsgr2vr_w<const IMM2: u32>(a: v4i32, b: i32) -> v4i32 { +pub fn lsx_vinsgr2vr_w<const IMM2: u32>(a: v4i32, b: i32) -> v4i32 { static_assert_uimm_bits!(IMM2, 2); - __lsx_vinsgr2vr_w(a, b, IMM2) + unsafe { __lsx_vinsgr2vr_w(a, b, IMM2) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vinsgr2vr_d<const IMM1: u32>(a: v2i64, b: i64) -> v2i64 { +pub fn lsx_vinsgr2vr_d<const IMM1: u32>(a: v2i64, b: i64) -> v2i64 { static_assert_uimm_bits!(IMM1, 1); - __lsx_vinsgr2vr_d(a, b, IMM1) + unsafe { __lsx_vinsgr2vr_d(a, b, IMM1) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfadd_s(a: v4f32, b: v4f32) -> v4f32 { - __lsx_vfadd_s(a, b) +pub fn lsx_vfadd_s(a: v4f32, b: v4f32) -> v4f32 { + unsafe { __lsx_vfadd_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfadd_d(a: v2f64, b: v2f64) -> v2f64 { - __lsx_vfadd_d(a, b) +pub fn lsx_vfadd_d(a: v2f64, b: v2f64) -> v2f64 { + unsafe { __lsx_vfadd_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfsub_s(a: v4f32, b: v4f32) -> v4f32 { - __lsx_vfsub_s(a, b) +pub fn lsx_vfsub_s(a: v4f32, b: v4f32) -> v4f32 { + unsafe { __lsx_vfsub_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfsub_d(a: v2f64, b: v2f64) -> v2f64 { - __lsx_vfsub_d(a, b) +pub fn lsx_vfsub_d(a: v2f64, b: v2f64) -> v2f64 { + unsafe { __lsx_vfsub_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmul_s(a: v4f32, b: v4f32) -> v4f32 { - __lsx_vfmul_s(a, b) +pub fn lsx_vfmul_s(a: v4f32, b: v4f32) -> v4f32 { + unsafe { __lsx_vfmul_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmul_d(a: v2f64, b: v2f64) -> v2f64 { - __lsx_vfmul_d(a, b) +pub fn lsx_vfmul_d(a: v2f64, b: v2f64) -> v2f64 { + unsafe { __lsx_vfmul_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfdiv_s(a: v4f32, b: v4f32) -> v4f32 { - __lsx_vfdiv_s(a, b) +pub fn lsx_vfdiv_s(a: v4f32, b: v4f32) -> v4f32 { + unsafe { __lsx_vfdiv_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfdiv_d(a: v2f64, b: v2f64) -> v2f64 { - __lsx_vfdiv_d(a, b) +pub fn lsx_vfdiv_d(a: v2f64, b: v2f64) -> v2f64 { + unsafe { __lsx_vfdiv_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcvt_h_s(a: v4f32, b: v4f32) -> v8i16 { - __lsx_vfcvt_h_s(a, b) +pub fn lsx_vfcvt_h_s(a: v4f32, b: v4f32) -> v8i16 { + unsafe { __lsx_vfcvt_h_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcvt_s_d(a: v2f64, b: v2f64) -> v4f32 { - __lsx_vfcvt_s_d(a, b) +pub fn lsx_vfcvt_s_d(a: v2f64, b: v2f64) -> v4f32 { + unsafe { __lsx_vfcvt_s_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmin_s(a: v4f32, b: v4f32) -> v4f32 { - __lsx_vfmin_s(a, b) +pub fn lsx_vfmin_s(a: v4f32, b: v4f32) -> v4f32 { + unsafe { __lsx_vfmin_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmin_d(a: v2f64, b: v2f64) -> v2f64 { - __lsx_vfmin_d(a, b) +pub fn lsx_vfmin_d(a: v2f64, b: v2f64) -> v2f64 { + unsafe { __lsx_vfmin_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmina_s(a: v4f32, b: v4f32) -> v4f32 { - __lsx_vfmina_s(a, b) +pub fn lsx_vfmina_s(a: v4f32, b: v4f32) -> v4f32 { + unsafe { __lsx_vfmina_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmina_d(a: v2f64, b: v2f64) -> v2f64 { - __lsx_vfmina_d(a, b) +pub fn lsx_vfmina_d(a: v2f64, b: v2f64) -> v2f64 { + unsafe { __lsx_vfmina_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmax_s(a: v4f32, b: v4f32) -> v4f32 { - __lsx_vfmax_s(a, b) +pub fn lsx_vfmax_s(a: v4f32, b: v4f32) -> v4f32 { + unsafe { __lsx_vfmax_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmax_d(a: v2f64, b: v2f64) -> v2f64 { - __lsx_vfmax_d(a, b) +pub fn lsx_vfmax_d(a: v2f64, b: v2f64) -> v2f64 { + unsafe { __lsx_vfmax_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmaxa_s(a: v4f32, b: v4f32) -> v4f32 { - __lsx_vfmaxa_s(a, b) +pub fn lsx_vfmaxa_s(a: v4f32, b: v4f32) -> v4f32 { + unsafe { __lsx_vfmaxa_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmaxa_d(a: v2f64, b: v2f64) -> v2f64 { - __lsx_vfmaxa_d(a, b) +pub fn lsx_vfmaxa_d(a: v2f64, b: v2f64) -> v2f64 { + unsafe { __lsx_vfmaxa_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfclass_s(a: v4f32) -> v4i32 { - __lsx_vfclass_s(a) +pub fn lsx_vfclass_s(a: v4f32) -> v4i32 { + unsafe { __lsx_vfclass_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfclass_d(a: v2f64) -> v2i64 { - __lsx_vfclass_d(a) +pub fn lsx_vfclass_d(a: v2f64) -> v2i64 { + unsafe { __lsx_vfclass_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfsqrt_s(a: v4f32) -> v4f32 { - __lsx_vfsqrt_s(a) +pub fn lsx_vfsqrt_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfsqrt_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfsqrt_d(a: v2f64) -> v2f64 { - __lsx_vfsqrt_d(a) +pub fn lsx_vfsqrt_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfsqrt_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrecip_s(a: v4f32) -> v4f32 { - __lsx_vfrecip_s(a) +pub fn lsx_vfrecip_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfrecip_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrecip_d(a: v2f64) -> v2f64 { - __lsx_vfrecip_d(a) +pub fn lsx_vfrecip_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfrecip_d(a) } } #[inline] #[target_feature(enable = "lsx,frecipe")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrecipe_s(a: v4f32) -> v4f32 { - __lsx_vfrecipe_s(a) +pub fn lsx_vfrecipe_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfrecipe_s(a) } } #[inline] #[target_feature(enable = "lsx,frecipe")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrecipe_d(a: v2f64) -> v2f64 { - __lsx_vfrecipe_d(a) +pub fn lsx_vfrecipe_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfrecipe_d(a) } } #[inline] #[target_feature(enable = "lsx,frecipe")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrsqrte_s(a: v4f32) -> v4f32 { - __lsx_vfrsqrte_s(a) +pub fn lsx_vfrsqrte_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfrsqrte_s(a) } } #[inline] #[target_feature(enable = "lsx,frecipe")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrsqrte_d(a: v2f64) -> v2f64 { - __lsx_vfrsqrte_d(a) +pub fn lsx_vfrsqrte_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfrsqrte_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrint_s(a: v4f32) -> v4f32 { - __lsx_vfrint_s(a) +pub fn lsx_vfrint_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfrint_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrint_d(a: v2f64) -> v2f64 { - __lsx_vfrint_d(a) +pub fn lsx_vfrint_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfrint_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrsqrt_s(a: v4f32) -> v4f32 { - __lsx_vfrsqrt_s(a) +pub fn lsx_vfrsqrt_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfrsqrt_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrsqrt_d(a: v2f64) -> v2f64 { - __lsx_vfrsqrt_d(a) +pub fn lsx_vfrsqrt_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfrsqrt_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vflogb_s(a: v4f32) -> v4f32 { - __lsx_vflogb_s(a) +pub fn lsx_vflogb_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vflogb_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vflogb_d(a: v2f64) -> v2f64 { - __lsx_vflogb_d(a) +pub fn lsx_vflogb_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vflogb_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcvth_s_h(a: v8i16) -> v4f32 { - __lsx_vfcvth_s_h(a) +pub fn lsx_vfcvth_s_h(a: v8i16) -> v4f32 { + unsafe { __lsx_vfcvth_s_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcvth_d_s(a: v4f32) -> v2f64 { - __lsx_vfcvth_d_s(a) +pub fn lsx_vfcvth_d_s(a: v4f32) -> v2f64 { + unsafe { __lsx_vfcvth_d_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcvtl_s_h(a: v8i16) -> v4f32 { - __lsx_vfcvtl_s_h(a) +pub fn lsx_vfcvtl_s_h(a: v8i16) -> v4f32 { + unsafe { __lsx_vfcvtl_s_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcvtl_d_s(a: v4f32) -> v2f64 { - __lsx_vfcvtl_d_s(a) +pub fn lsx_vfcvtl_d_s(a: v4f32) -> v2f64 { + unsafe { __lsx_vfcvtl_d_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftint_w_s(a: v4f32) -> v4i32 { - __lsx_vftint_w_s(a) +pub fn lsx_vftint_w_s(a: v4f32) -> v4i32 { + unsafe { __lsx_vftint_w_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftint_l_d(a: v2f64) -> v2i64 { - __lsx_vftint_l_d(a) +pub fn lsx_vftint_l_d(a: v2f64) -> v2i64 { + unsafe { __lsx_vftint_l_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftint_wu_s(a: v4f32) -> v4u32 { - __lsx_vftint_wu_s(a) +pub fn lsx_vftint_wu_s(a: v4f32) -> v4u32 { + unsafe { __lsx_vftint_wu_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftint_lu_d(a: v2f64) -> v2u64 { - __lsx_vftint_lu_d(a) +pub fn lsx_vftint_lu_d(a: v2f64) -> v2u64 { + unsafe { __lsx_vftint_lu_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrz_w_s(a: v4f32) -> v4i32 { - __lsx_vftintrz_w_s(a) +pub fn lsx_vftintrz_w_s(a: v4f32) -> v4i32 { + unsafe { __lsx_vftintrz_w_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrz_l_d(a: v2f64) -> v2i64 { - __lsx_vftintrz_l_d(a) +pub fn lsx_vftintrz_l_d(a: v2f64) -> v2i64 { + unsafe { __lsx_vftintrz_l_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrz_wu_s(a: v4f32) -> v4u32 { - __lsx_vftintrz_wu_s(a) +pub fn lsx_vftintrz_wu_s(a: v4f32) -> v4u32 { + unsafe { __lsx_vftintrz_wu_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrz_lu_d(a: v2f64) -> v2u64 { - __lsx_vftintrz_lu_d(a) +pub fn lsx_vftintrz_lu_d(a: v2f64) -> v2u64 { + unsafe { __lsx_vftintrz_lu_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vffint_s_w(a: v4i32) -> v4f32 { - __lsx_vffint_s_w(a) +pub fn lsx_vffint_s_w(a: v4i32) -> v4f32 { + unsafe { __lsx_vffint_s_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vffint_d_l(a: v2i64) -> v2f64 { - __lsx_vffint_d_l(a) +pub fn lsx_vffint_d_l(a: v2i64) -> v2f64 { + unsafe { __lsx_vffint_d_l(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vffint_s_wu(a: v4u32) -> v4f32 { - __lsx_vffint_s_wu(a) +pub fn lsx_vffint_s_wu(a: v4u32) -> v4f32 { + unsafe { __lsx_vffint_s_wu(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vffint_d_lu(a: v2u64) -> v2f64 { - __lsx_vffint_d_lu(a) +pub fn lsx_vffint_d_lu(a: v2u64) -> v2f64 { + unsafe { __lsx_vffint_d_lu(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vandn_v(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vandn_v(a, b) +pub fn lsx_vandn_v(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vandn_v(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vneg_b(a: v16i8) -> v16i8 { - __lsx_vneg_b(a) +pub fn lsx_vneg_b(a: v16i8) -> v16i8 { + unsafe { __lsx_vneg_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vneg_h(a: v8i16) -> v8i16 { - __lsx_vneg_h(a) +pub fn lsx_vneg_h(a: v8i16) -> v8i16 { + unsafe { __lsx_vneg_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vneg_w(a: v4i32) -> v4i32 { - __lsx_vneg_w(a) +pub fn lsx_vneg_w(a: v4i32) -> v4i32 { + unsafe { __lsx_vneg_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vneg_d(a: v2i64) -> v2i64 { - __lsx_vneg_d(a) +pub fn lsx_vneg_d(a: v2i64) -> v2i64 { + unsafe { __lsx_vneg_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmuh_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vmuh_b(a, b) +pub fn lsx_vmuh_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vmuh_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmuh_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vmuh_h(a, b) +pub fn lsx_vmuh_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vmuh_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmuh_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vmuh_w(a, b) +pub fn lsx_vmuh_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vmuh_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmuh_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vmuh_d(a, b) +pub fn lsx_vmuh_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vmuh_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmuh_bu(a: v16u8, b: v16u8) -> v16u8 { - __lsx_vmuh_bu(a, b) +pub fn lsx_vmuh_bu(a: v16u8, b: v16u8) -> v16u8 { + unsafe { __lsx_vmuh_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmuh_hu(a: v8u16, b: v8u16) -> v8u16 { - __lsx_vmuh_hu(a, b) +pub fn lsx_vmuh_hu(a: v8u16, b: v8u16) -> v8u16 { + unsafe { __lsx_vmuh_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmuh_wu(a: v4u32, b: v4u32) -> v4u32 { - __lsx_vmuh_wu(a, b) +pub fn lsx_vmuh_wu(a: v4u32, b: v4u32) -> v4u32 { + unsafe { __lsx_vmuh_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmuh_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vmuh_du(a, b) +pub fn lsx_vmuh_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vmuh_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsllwil_h_b<const IMM3: u32>(a: v16i8) -> v8i16 { +pub fn lsx_vsllwil_h_b<const IMM3: u32>(a: v16i8) -> v8i16 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vsllwil_h_b(a, IMM3) + unsafe { __lsx_vsllwil_h_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsllwil_w_h<const IMM4: u32>(a: v8i16) -> v4i32 { +pub fn lsx_vsllwil_w_h<const IMM4: u32>(a: v8i16) -> v4i32 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsllwil_w_h(a, IMM4) + unsafe { __lsx_vsllwil_w_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsllwil_d_w<const IMM5: u32>(a: v4i32) -> v2i64 { +pub fn lsx_vsllwil_d_w<const IMM5: u32>(a: v4i32) -> v2i64 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsllwil_d_w(a, IMM5) + unsafe { __lsx_vsllwil_d_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsllwil_hu_bu<const IMM3: u32>(a: v16u8) -> v8u16 { +pub fn lsx_vsllwil_hu_bu<const IMM3: u32>(a: v16u8) -> v8u16 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vsllwil_hu_bu(a, IMM3) + unsafe { __lsx_vsllwil_hu_bu(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsllwil_wu_hu<const IMM4: u32>(a: v8u16) -> v4u32 { +pub fn lsx_vsllwil_wu_hu<const IMM4: u32>(a: v8u16) -> v4u32 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsllwil_wu_hu(a, IMM4) + unsafe { __lsx_vsllwil_wu_hu(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsllwil_du_wu<const IMM5: u32>(a: v4u32) -> v2u64 { +pub fn lsx_vsllwil_du_wu<const IMM5: u32>(a: v4u32) -> v2u64 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsllwil_du_wu(a, IMM5) + unsafe { __lsx_vsllwil_du_wu(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsran_b_h(a: v8i16, b: v8i16) -> v16i8 { - __lsx_vsran_b_h(a, b) +pub fn lsx_vsran_b_h(a: v8i16, b: v8i16) -> v16i8 { + unsafe { __lsx_vsran_b_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsran_h_w(a: v4i32, b: v4i32) -> v8i16 { - __lsx_vsran_h_w(a, b) +pub fn lsx_vsran_h_w(a: v4i32, b: v4i32) -> v8i16 { + unsafe { __lsx_vsran_h_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsran_w_d(a: v2i64, b: v2i64) -> v4i32 { - __lsx_vsran_w_d(a, b) +pub fn lsx_vsran_w_d(a: v2i64, b: v2i64) -> v4i32 { + unsafe { __lsx_vsran_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssran_b_h(a: v8i16, b: v8i16) -> v16i8 { - __lsx_vssran_b_h(a, b) +pub fn lsx_vssran_b_h(a: v8i16, b: v8i16) -> v16i8 { + unsafe { __lsx_vssran_b_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssran_h_w(a: v4i32, b: v4i32) -> v8i16 { - __lsx_vssran_h_w(a, b) +pub fn lsx_vssran_h_w(a: v4i32, b: v4i32) -> v8i16 { + unsafe { __lsx_vssran_h_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssran_w_d(a: v2i64, b: v2i64) -> v4i32 { - __lsx_vssran_w_d(a, b) +pub fn lsx_vssran_w_d(a: v2i64, b: v2i64) -> v4i32 { + unsafe { __lsx_vssran_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssran_bu_h(a: v8u16, b: v8u16) -> v16u8 { - __lsx_vssran_bu_h(a, b) +pub fn lsx_vssran_bu_h(a: v8u16, b: v8u16) -> v16u8 { + unsafe { __lsx_vssran_bu_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssran_hu_w(a: v4u32, b: v4u32) -> v8u16 { - __lsx_vssran_hu_w(a, b) +pub fn lsx_vssran_hu_w(a: v4u32, b: v4u32) -> v8u16 { + unsafe { __lsx_vssran_hu_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssran_wu_d(a: v2u64, b: v2u64) -> v4u32 { - __lsx_vssran_wu_d(a, b) +pub fn lsx_vssran_wu_d(a: v2u64, b: v2u64) -> v4u32 { + unsafe { __lsx_vssran_wu_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrarn_b_h(a: v8i16, b: v8i16) -> v16i8 { - __lsx_vsrarn_b_h(a, b) +pub fn lsx_vsrarn_b_h(a: v8i16, b: v8i16) -> v16i8 { + unsafe { __lsx_vsrarn_b_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrarn_h_w(a: v4i32, b: v4i32) -> v8i16 { - __lsx_vsrarn_h_w(a, b) +pub fn lsx_vsrarn_h_w(a: v4i32, b: v4i32) -> v8i16 { + unsafe { __lsx_vsrarn_h_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrarn_w_d(a: v2i64, b: v2i64) -> v4i32 { - __lsx_vsrarn_w_d(a, b) +pub fn lsx_vsrarn_w_d(a: v2i64, b: v2i64) -> v4i32 { + unsafe { __lsx_vsrarn_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarn_b_h(a: v8i16, b: v8i16) -> v16i8 { - __lsx_vssrarn_b_h(a, b) +pub fn lsx_vssrarn_b_h(a: v8i16, b: v8i16) -> v16i8 { + unsafe { __lsx_vssrarn_b_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarn_h_w(a: v4i32, b: v4i32) -> v8i16 { - __lsx_vssrarn_h_w(a, b) +pub fn lsx_vssrarn_h_w(a: v4i32, b: v4i32) -> v8i16 { + unsafe { __lsx_vssrarn_h_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarn_w_d(a: v2i64, b: v2i64) -> v4i32 { - __lsx_vssrarn_w_d(a, b) +pub fn lsx_vssrarn_w_d(a: v2i64, b: v2i64) -> v4i32 { + unsafe { __lsx_vssrarn_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarn_bu_h(a: v8u16, b: v8u16) -> v16u8 { - __lsx_vssrarn_bu_h(a, b) +pub fn lsx_vssrarn_bu_h(a: v8u16, b: v8u16) -> v16u8 { + unsafe { __lsx_vssrarn_bu_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarn_hu_w(a: v4u32, b: v4u32) -> v8u16 { - __lsx_vssrarn_hu_w(a, b) +pub fn lsx_vssrarn_hu_w(a: v4u32, b: v4u32) -> v8u16 { + unsafe { __lsx_vssrarn_hu_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarn_wu_d(a: v2u64, b: v2u64) -> v4u32 { - __lsx_vssrarn_wu_d(a, b) +pub fn lsx_vssrarn_wu_d(a: v2u64, b: v2u64) -> v4u32 { + unsafe { __lsx_vssrarn_wu_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrln_b_h(a: v8i16, b: v8i16) -> v16i8 { - __lsx_vsrln_b_h(a, b) +pub fn lsx_vsrln_b_h(a: v8i16, b: v8i16) -> v16i8 { + unsafe { __lsx_vsrln_b_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrln_h_w(a: v4i32, b: v4i32) -> v8i16 { - __lsx_vsrln_h_w(a, b) +pub fn lsx_vsrln_h_w(a: v4i32, b: v4i32) -> v8i16 { + unsafe { __lsx_vsrln_h_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrln_w_d(a: v2i64, b: v2i64) -> v4i32 { - __lsx_vsrln_w_d(a, b) +pub fn lsx_vsrln_w_d(a: v2i64, b: v2i64) -> v4i32 { + unsafe { __lsx_vsrln_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrln_bu_h(a: v8u16, b: v8u16) -> v16u8 { - __lsx_vssrln_bu_h(a, b) +pub fn lsx_vssrln_bu_h(a: v8u16, b: v8u16) -> v16u8 { + unsafe { __lsx_vssrln_bu_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrln_hu_w(a: v4u32, b: v4u32) -> v8u16 { - __lsx_vssrln_hu_w(a, b) +pub fn lsx_vssrln_hu_w(a: v4u32, b: v4u32) -> v8u16 { + unsafe { __lsx_vssrln_hu_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrln_wu_d(a: v2u64, b: v2u64) -> v4u32 { - __lsx_vssrln_wu_d(a, b) +pub fn lsx_vssrln_wu_d(a: v2u64, b: v2u64) -> v4u32 { + unsafe { __lsx_vssrln_wu_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlrn_b_h(a: v8i16, b: v8i16) -> v16i8 { - __lsx_vsrlrn_b_h(a, b) +pub fn lsx_vsrlrn_b_h(a: v8i16, b: v8i16) -> v16i8 { + unsafe { __lsx_vsrlrn_b_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlrn_h_w(a: v4i32, b: v4i32) -> v8i16 { - __lsx_vsrlrn_h_w(a, b) +pub fn lsx_vsrlrn_h_w(a: v4i32, b: v4i32) -> v8i16 { + unsafe { __lsx_vsrlrn_h_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlrn_w_d(a: v2i64, b: v2i64) -> v4i32 { - __lsx_vsrlrn_w_d(a, b) +pub fn lsx_vsrlrn_w_d(a: v2i64, b: v2i64) -> v4i32 { + unsafe { __lsx_vsrlrn_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrn_bu_h(a: v8u16, b: v8u16) -> v16u8 { - __lsx_vssrlrn_bu_h(a, b) +pub fn lsx_vssrlrn_bu_h(a: v8u16, b: v8u16) -> v16u8 { + unsafe { __lsx_vssrlrn_bu_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrn_hu_w(a: v4u32, b: v4u32) -> v8u16 { - __lsx_vssrlrn_hu_w(a, b) +pub fn lsx_vssrlrn_hu_w(a: v4u32, b: v4u32) -> v8u16 { + unsafe { __lsx_vssrlrn_hu_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrn_wu_d(a: v2u64, b: v2u64) -> v4u32 { - __lsx_vssrlrn_wu_d(a, b) +pub fn lsx_vssrlrn_wu_d(a: v2u64, b: v2u64) -> v4u32 { + unsafe { __lsx_vssrlrn_wu_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrstpi_b<const IMM5: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vfrstpi_b<const IMM5: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vfrstpi_b(a, b, IMM5) + unsafe { __lsx_vfrstpi_b(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrstpi_h<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vfrstpi_h<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vfrstpi_h(a, b, IMM5) + unsafe { __lsx_vfrstpi_h(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrstp_b(a: v16i8, b: v16i8, c: v16i8) -> v16i8 { - __lsx_vfrstp_b(a, b, c) +pub fn lsx_vfrstp_b(a: v16i8, b: v16i8, c: v16i8) -> v16i8 { + unsafe { __lsx_vfrstp_b(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrstp_h(a: v8i16, b: v8i16, c: v8i16) -> v8i16 { - __lsx_vfrstp_h(a, b, c) +pub fn lsx_vfrstp_h(a: v8i16, b: v8i16, c: v8i16) -> v8i16 { + unsafe { __lsx_vfrstp_h(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vshuf4i_d<const IMM8: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vshuf4i_d<const IMM8: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vshuf4i_d(a, b, IMM8) + unsafe { __lsx_vshuf4i_d(a, b, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbsrl_v<const IMM5: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vbsrl_v<const IMM5: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vbsrl_v(a, IMM5) + unsafe { __lsx_vbsrl_v(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vbsll_v<const IMM5: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vbsll_v<const IMM5: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vbsll_v(a, IMM5) + unsafe { __lsx_vbsll_v(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vextrins_b<const IMM8: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vextrins_b<const IMM8: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vextrins_b(a, b, IMM8) + unsafe { __lsx_vextrins_b(a, b, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vextrins_h<const IMM8: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vextrins_h<const IMM8: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vextrins_h(a, b, IMM8) + unsafe { __lsx_vextrins_h(a, b, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vextrins_w<const IMM8: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vextrins_w<const IMM8: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vextrins_w(a, b, IMM8) + unsafe { __lsx_vextrins_w(a, b, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vextrins_d<const IMM8: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vextrins_d<const IMM8: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vextrins_d(a, b, IMM8) + unsafe { __lsx_vextrins_d(a, b, IMM8) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmskltz_b(a: v16i8) -> v16i8 { - __lsx_vmskltz_b(a) +pub fn lsx_vmskltz_b(a: v16i8) -> v16i8 { + unsafe { __lsx_vmskltz_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmskltz_h(a: v8i16) -> v8i16 { - __lsx_vmskltz_h(a) +pub fn lsx_vmskltz_h(a: v8i16) -> v8i16 { + unsafe { __lsx_vmskltz_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmskltz_w(a: v4i32) -> v4i32 { - __lsx_vmskltz_w(a) +pub fn lsx_vmskltz_w(a: v4i32) -> v4i32 { + unsafe { __lsx_vmskltz_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmskltz_d(a: v2i64) -> v2i64 { - __lsx_vmskltz_d(a) +pub fn lsx_vmskltz_d(a: v2i64) -> v2i64 { + unsafe { __lsx_vmskltz_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsigncov_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vsigncov_b(a, b) +pub fn lsx_vsigncov_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vsigncov_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsigncov_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vsigncov_h(a, b) +pub fn lsx_vsigncov_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vsigncov_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsigncov_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vsigncov_w(a, b) +pub fn lsx_vsigncov_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vsigncov_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsigncov_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsigncov_d(a, b) +pub fn lsx_vsigncov_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsigncov_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmadd_s(a: v4f32, b: v4f32, c: v4f32) -> v4f32 { - __lsx_vfmadd_s(a, b, c) +pub fn lsx_vfmadd_s(a: v4f32, b: v4f32, c: v4f32) -> v4f32 { + unsafe { __lsx_vfmadd_s(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmadd_d(a: v2f64, b: v2f64, c: v2f64) -> v2f64 { - __lsx_vfmadd_d(a, b, c) +pub fn lsx_vfmadd_d(a: v2f64, b: v2f64, c: v2f64) -> v2f64 { + unsafe { __lsx_vfmadd_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmsub_s(a: v4f32, b: v4f32, c: v4f32) -> v4f32 { - __lsx_vfmsub_s(a, b, c) +pub fn lsx_vfmsub_s(a: v4f32, b: v4f32, c: v4f32) -> v4f32 { + unsafe { __lsx_vfmsub_s(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfmsub_d(a: v2f64, b: v2f64, c: v2f64) -> v2f64 { - __lsx_vfmsub_d(a, b, c) +pub fn lsx_vfmsub_d(a: v2f64, b: v2f64, c: v2f64) -> v2f64 { + unsafe { __lsx_vfmsub_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfnmadd_s(a: v4f32, b: v4f32, c: v4f32) -> v4f32 { - __lsx_vfnmadd_s(a, b, c) +pub fn lsx_vfnmadd_s(a: v4f32, b: v4f32, c: v4f32) -> v4f32 { + unsafe { __lsx_vfnmadd_s(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfnmadd_d(a: v2f64, b: v2f64, c: v2f64) -> v2f64 { - __lsx_vfnmadd_d(a, b, c) +pub fn lsx_vfnmadd_d(a: v2f64, b: v2f64, c: v2f64) -> v2f64 { + unsafe { __lsx_vfnmadd_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfnmsub_s(a: v4f32, b: v4f32, c: v4f32) -> v4f32 { - __lsx_vfnmsub_s(a, b, c) +pub fn lsx_vfnmsub_s(a: v4f32, b: v4f32, c: v4f32) -> v4f32 { + unsafe { __lsx_vfnmsub_s(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfnmsub_d(a: v2f64, b: v2f64, c: v2f64) -> v2f64 { - __lsx_vfnmsub_d(a, b, c) +pub fn lsx_vfnmsub_d(a: v2f64, b: v2f64, c: v2f64) -> v2f64 { + unsafe { __lsx_vfnmsub_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrne_w_s(a: v4f32) -> v4i32 { - __lsx_vftintrne_w_s(a) +pub fn lsx_vftintrne_w_s(a: v4f32) -> v4i32 { + unsafe { __lsx_vftintrne_w_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrne_l_d(a: v2f64) -> v2i64 { - __lsx_vftintrne_l_d(a) +pub fn lsx_vftintrne_l_d(a: v2f64) -> v2i64 { + unsafe { __lsx_vftintrne_l_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrp_w_s(a: v4f32) -> v4i32 { - __lsx_vftintrp_w_s(a) +pub fn lsx_vftintrp_w_s(a: v4f32) -> v4i32 { + unsafe { __lsx_vftintrp_w_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrp_l_d(a: v2f64) -> v2i64 { - __lsx_vftintrp_l_d(a) +pub fn lsx_vftintrp_l_d(a: v2f64) -> v2i64 { + unsafe { __lsx_vftintrp_l_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrm_w_s(a: v4f32) -> v4i32 { - __lsx_vftintrm_w_s(a) +pub fn lsx_vftintrm_w_s(a: v4f32) -> v4i32 { + unsafe { __lsx_vftintrm_w_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrm_l_d(a: v2f64) -> v2i64 { - __lsx_vftintrm_l_d(a) +pub fn lsx_vftintrm_l_d(a: v2f64) -> v2i64 { + unsafe { __lsx_vftintrm_l_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftint_w_d(a: v2f64, b: v2f64) -> v4i32 { - __lsx_vftint_w_d(a, b) +pub fn lsx_vftint_w_d(a: v2f64, b: v2f64) -> v4i32 { + unsafe { __lsx_vftint_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vffint_s_l(a: v2i64, b: v2i64) -> v4f32 { - __lsx_vffint_s_l(a, b) +pub fn lsx_vffint_s_l(a: v2i64, b: v2i64) -> v4f32 { + unsafe { __lsx_vffint_s_l(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrz_w_d(a: v2f64, b: v2f64) -> v4i32 { - __lsx_vftintrz_w_d(a, b) +pub fn lsx_vftintrz_w_d(a: v2f64, b: v2f64) -> v4i32 { + unsafe { __lsx_vftintrz_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrp_w_d(a: v2f64, b: v2f64) -> v4i32 { - __lsx_vftintrp_w_d(a, b) +pub fn lsx_vftintrp_w_d(a: v2f64, b: v2f64) -> v4i32 { + unsafe { __lsx_vftintrp_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrm_w_d(a: v2f64, b: v2f64) -> v4i32 { - __lsx_vftintrm_w_d(a, b) +pub fn lsx_vftintrm_w_d(a: v2f64, b: v2f64) -> v4i32 { + unsafe { __lsx_vftintrm_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrne_w_d(a: v2f64, b: v2f64) -> v4i32 { - __lsx_vftintrne_w_d(a, b) +pub fn lsx_vftintrne_w_d(a: v2f64, b: v2f64) -> v4i32 { + unsafe { __lsx_vftintrne_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintl_l_s(a: v4f32) -> v2i64 { - __lsx_vftintl_l_s(a) +pub fn lsx_vftintl_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftintl_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftinth_l_s(a: v4f32) -> v2i64 { - __lsx_vftinth_l_s(a) +pub fn lsx_vftinth_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftinth_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vffinth_d_w(a: v4i32) -> v2f64 { - __lsx_vffinth_d_w(a) +pub fn lsx_vffinth_d_w(a: v4i32) -> v2f64 { + unsafe { __lsx_vffinth_d_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vffintl_d_w(a: v4i32) -> v2f64 { - __lsx_vffintl_d_w(a) +pub fn lsx_vffintl_d_w(a: v4i32) -> v2f64 { + unsafe { __lsx_vffintl_d_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrzl_l_s(a: v4f32) -> v2i64 { - __lsx_vftintrzl_l_s(a) +pub fn lsx_vftintrzl_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftintrzl_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrzh_l_s(a: v4f32) -> v2i64 { - __lsx_vftintrzh_l_s(a) +pub fn lsx_vftintrzh_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftintrzh_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrpl_l_s(a: v4f32) -> v2i64 { - __lsx_vftintrpl_l_s(a) +pub fn lsx_vftintrpl_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftintrpl_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrph_l_s(a: v4f32) -> v2i64 { - __lsx_vftintrph_l_s(a) +pub fn lsx_vftintrph_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftintrph_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrml_l_s(a: v4f32) -> v2i64 { - __lsx_vftintrml_l_s(a) +pub fn lsx_vftintrml_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftintrml_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrmh_l_s(a: v4f32) -> v2i64 { - __lsx_vftintrmh_l_s(a) +pub fn lsx_vftintrmh_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftintrmh_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrnel_l_s(a: v4f32) -> v2i64 { - __lsx_vftintrnel_l_s(a) +pub fn lsx_vftintrnel_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftintrnel_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vftintrneh_l_s(a: v4f32) -> v2i64 { - __lsx_vftintrneh_l_s(a) +pub fn lsx_vftintrneh_l_s(a: v4f32) -> v2i64 { + unsafe { __lsx_vftintrneh_l_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrintrne_s(a: v4f32) -> v4f32 { - __lsx_vfrintrne_s(a) +pub fn lsx_vfrintrne_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfrintrne_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrintrne_d(a: v2f64) -> v2f64 { - __lsx_vfrintrne_d(a) +pub fn lsx_vfrintrne_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfrintrne_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrintrz_s(a: v4f32) -> v4f32 { - __lsx_vfrintrz_s(a) +pub fn lsx_vfrintrz_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfrintrz_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrintrz_d(a: v2f64) -> v2f64 { - __lsx_vfrintrz_d(a) +pub fn lsx_vfrintrz_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfrintrz_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrintrp_s(a: v4f32) -> v4f32 { - __lsx_vfrintrp_s(a) +pub fn lsx_vfrintrp_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfrintrp_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrintrp_d(a: v2f64) -> v2f64 { - __lsx_vfrintrp_d(a) +pub fn lsx_vfrintrp_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfrintrp_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrintrm_s(a: v4f32) -> v4f32 { - __lsx_vfrintrm_s(a) +pub fn lsx_vfrintrm_s(a: v4f32) -> v4f32 { + unsafe { __lsx_vfrintrm_s(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfrintrm_d(a: v2f64) -> v2f64 { - __lsx_vfrintrm_d(a) +pub fn lsx_vfrintrm_d(a: v2f64) -> v2f64 { + unsafe { __lsx_vfrintrm_d(a) } } #[inline] @@ -5087,687 +5087,687 @@ pub unsafe fn lsx_vstelm_d<const IMM_S8: i32, const IMM1: u32>(a: v2i64, mem_add #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_d_w(a: v4i32, b: v4i32) -> v2i64 { - __lsx_vaddwev_d_w(a, b) +pub fn lsx_vaddwev_d_w(a: v4i32, b: v4i32) -> v2i64 { + unsafe { __lsx_vaddwev_d_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_w_h(a: v8i16, b: v8i16) -> v4i32 { - __lsx_vaddwev_w_h(a, b) +pub fn lsx_vaddwev_w_h(a: v8i16, b: v8i16) -> v4i32 { + unsafe { __lsx_vaddwev_w_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_h_b(a: v16i8, b: v16i8) -> v8i16 { - __lsx_vaddwev_h_b(a, b) +pub fn lsx_vaddwev_h_b(a: v16i8, b: v16i8) -> v8i16 { + unsafe { __lsx_vaddwev_h_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_d_w(a: v4i32, b: v4i32) -> v2i64 { - __lsx_vaddwod_d_w(a, b) +pub fn lsx_vaddwod_d_w(a: v4i32, b: v4i32) -> v2i64 { + unsafe { __lsx_vaddwod_d_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_w_h(a: v8i16, b: v8i16) -> v4i32 { - __lsx_vaddwod_w_h(a, b) +pub fn lsx_vaddwod_w_h(a: v8i16, b: v8i16) -> v4i32 { + unsafe { __lsx_vaddwod_w_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_h_b(a: v16i8, b: v16i8) -> v8i16 { - __lsx_vaddwod_h_b(a, b) +pub fn lsx_vaddwod_h_b(a: v16i8, b: v16i8) -> v8i16 { + unsafe { __lsx_vaddwod_h_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_d_wu(a: v4u32, b: v4u32) -> v2i64 { - __lsx_vaddwev_d_wu(a, b) +pub fn lsx_vaddwev_d_wu(a: v4u32, b: v4u32) -> v2i64 { + unsafe { __lsx_vaddwev_d_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_w_hu(a: v8u16, b: v8u16) -> v4i32 { - __lsx_vaddwev_w_hu(a, b) +pub fn lsx_vaddwev_w_hu(a: v8u16, b: v8u16) -> v4i32 { + unsafe { __lsx_vaddwev_w_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_h_bu(a: v16u8, b: v16u8) -> v8i16 { - __lsx_vaddwev_h_bu(a, b) +pub fn lsx_vaddwev_h_bu(a: v16u8, b: v16u8) -> v8i16 { + unsafe { __lsx_vaddwev_h_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_d_wu(a: v4u32, b: v4u32) -> v2i64 { - __lsx_vaddwod_d_wu(a, b) +pub fn lsx_vaddwod_d_wu(a: v4u32, b: v4u32) -> v2i64 { + unsafe { __lsx_vaddwod_d_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_w_hu(a: v8u16, b: v8u16) -> v4i32 { - __lsx_vaddwod_w_hu(a, b) +pub fn lsx_vaddwod_w_hu(a: v8u16, b: v8u16) -> v4i32 { + unsafe { __lsx_vaddwod_w_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_h_bu(a: v16u8, b: v16u8) -> v8i16 { - __lsx_vaddwod_h_bu(a, b) +pub fn lsx_vaddwod_h_bu(a: v16u8, b: v16u8) -> v8i16 { + unsafe { __lsx_vaddwod_h_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_d_wu_w(a: v4u32, b: v4i32) -> v2i64 { - __lsx_vaddwev_d_wu_w(a, b) +pub fn lsx_vaddwev_d_wu_w(a: v4u32, b: v4i32) -> v2i64 { + unsafe { __lsx_vaddwev_d_wu_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_w_hu_h(a: v8u16, b: v8i16) -> v4i32 { - __lsx_vaddwev_w_hu_h(a, b) +pub fn lsx_vaddwev_w_hu_h(a: v8u16, b: v8i16) -> v4i32 { + unsafe { __lsx_vaddwev_w_hu_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_h_bu_b(a: v16u8, b: v16i8) -> v8i16 { - __lsx_vaddwev_h_bu_b(a, b) +pub fn lsx_vaddwev_h_bu_b(a: v16u8, b: v16i8) -> v8i16 { + unsafe { __lsx_vaddwev_h_bu_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_d_wu_w(a: v4u32, b: v4i32) -> v2i64 { - __lsx_vaddwod_d_wu_w(a, b) +pub fn lsx_vaddwod_d_wu_w(a: v4u32, b: v4i32) -> v2i64 { + unsafe { __lsx_vaddwod_d_wu_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_w_hu_h(a: v8u16, b: v8i16) -> v4i32 { - __lsx_vaddwod_w_hu_h(a, b) +pub fn lsx_vaddwod_w_hu_h(a: v8u16, b: v8i16) -> v4i32 { + unsafe { __lsx_vaddwod_w_hu_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_h_bu_b(a: v16u8, b: v16i8) -> v8i16 { - __lsx_vaddwod_h_bu_b(a, b) +pub fn lsx_vaddwod_h_bu_b(a: v16u8, b: v16i8) -> v8i16 { + unsafe { __lsx_vaddwod_h_bu_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwev_d_w(a: v4i32, b: v4i32) -> v2i64 { - __lsx_vsubwev_d_w(a, b) +pub fn lsx_vsubwev_d_w(a: v4i32, b: v4i32) -> v2i64 { + unsafe { __lsx_vsubwev_d_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwev_w_h(a: v8i16, b: v8i16) -> v4i32 { - __lsx_vsubwev_w_h(a, b) +pub fn lsx_vsubwev_w_h(a: v8i16, b: v8i16) -> v4i32 { + unsafe { __lsx_vsubwev_w_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwev_h_b(a: v16i8, b: v16i8) -> v8i16 { - __lsx_vsubwev_h_b(a, b) +pub fn lsx_vsubwev_h_b(a: v16i8, b: v16i8) -> v8i16 { + unsafe { __lsx_vsubwev_h_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwod_d_w(a: v4i32, b: v4i32) -> v2i64 { - __lsx_vsubwod_d_w(a, b) +pub fn lsx_vsubwod_d_w(a: v4i32, b: v4i32) -> v2i64 { + unsafe { __lsx_vsubwod_d_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwod_w_h(a: v8i16, b: v8i16) -> v4i32 { - __lsx_vsubwod_w_h(a, b) +pub fn lsx_vsubwod_w_h(a: v8i16, b: v8i16) -> v4i32 { + unsafe { __lsx_vsubwod_w_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwod_h_b(a: v16i8, b: v16i8) -> v8i16 { - __lsx_vsubwod_h_b(a, b) +pub fn lsx_vsubwod_h_b(a: v16i8, b: v16i8) -> v8i16 { + unsafe { __lsx_vsubwod_h_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwev_d_wu(a: v4u32, b: v4u32) -> v2i64 { - __lsx_vsubwev_d_wu(a, b) +pub fn lsx_vsubwev_d_wu(a: v4u32, b: v4u32) -> v2i64 { + unsafe { __lsx_vsubwev_d_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwev_w_hu(a: v8u16, b: v8u16) -> v4i32 { - __lsx_vsubwev_w_hu(a, b) +pub fn lsx_vsubwev_w_hu(a: v8u16, b: v8u16) -> v4i32 { + unsafe { __lsx_vsubwev_w_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwev_h_bu(a: v16u8, b: v16u8) -> v8i16 { - __lsx_vsubwev_h_bu(a, b) +pub fn lsx_vsubwev_h_bu(a: v16u8, b: v16u8) -> v8i16 { + unsafe { __lsx_vsubwev_h_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwod_d_wu(a: v4u32, b: v4u32) -> v2i64 { - __lsx_vsubwod_d_wu(a, b) +pub fn lsx_vsubwod_d_wu(a: v4u32, b: v4u32) -> v2i64 { + unsafe { __lsx_vsubwod_d_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwod_w_hu(a: v8u16, b: v8u16) -> v4i32 { - __lsx_vsubwod_w_hu(a, b) +pub fn lsx_vsubwod_w_hu(a: v8u16, b: v8u16) -> v4i32 { + unsafe { __lsx_vsubwod_w_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwod_h_bu(a: v16u8, b: v16u8) -> v8i16 { - __lsx_vsubwod_h_bu(a, b) +pub fn lsx_vsubwod_h_bu(a: v16u8, b: v16u8) -> v8i16 { + unsafe { __lsx_vsubwod_h_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_q_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vaddwev_q_d(a, b) +pub fn lsx_vaddwev_q_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vaddwev_q_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_q_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vaddwod_q_d(a, b) +pub fn lsx_vaddwod_q_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vaddwod_q_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_q_du(a: v2u64, b: v2u64) -> v2i64 { - __lsx_vaddwev_q_du(a, b) +pub fn lsx_vaddwev_q_du(a: v2u64, b: v2u64) -> v2i64 { + unsafe { __lsx_vaddwev_q_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_q_du(a: v2u64, b: v2u64) -> v2i64 { - __lsx_vaddwod_q_du(a, b) +pub fn lsx_vaddwod_q_du(a: v2u64, b: v2u64) -> v2i64 { + unsafe { __lsx_vaddwod_q_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwev_q_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsubwev_q_d(a, b) +pub fn lsx_vsubwev_q_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsubwev_q_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwod_q_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsubwod_q_d(a, b) +pub fn lsx_vsubwod_q_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsubwod_q_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwev_q_du(a: v2u64, b: v2u64) -> v2i64 { - __lsx_vsubwev_q_du(a, b) +pub fn lsx_vsubwev_q_du(a: v2u64, b: v2u64) -> v2i64 { + unsafe { __lsx_vsubwev_q_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsubwod_q_du(a: v2u64, b: v2u64) -> v2i64 { - __lsx_vsubwod_q_du(a, b) +pub fn lsx_vsubwod_q_du(a: v2u64, b: v2u64) -> v2i64 { + unsafe { __lsx_vsubwod_q_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwev_q_du_d(a: v2u64, b: v2i64) -> v2i64 { - __lsx_vaddwev_q_du_d(a, b) +pub fn lsx_vaddwev_q_du_d(a: v2u64, b: v2i64) -> v2i64 { + unsafe { __lsx_vaddwev_q_du_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vaddwod_q_du_d(a: v2u64, b: v2i64) -> v2i64 { - __lsx_vaddwod_q_du_d(a, b) +pub fn lsx_vaddwod_q_du_d(a: v2u64, b: v2i64) -> v2i64 { + unsafe { __lsx_vaddwod_q_du_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_d_w(a: v4i32, b: v4i32) -> v2i64 { - __lsx_vmulwev_d_w(a, b) +pub fn lsx_vmulwev_d_w(a: v4i32, b: v4i32) -> v2i64 { + unsafe { __lsx_vmulwev_d_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_w_h(a: v8i16, b: v8i16) -> v4i32 { - __lsx_vmulwev_w_h(a, b) +pub fn lsx_vmulwev_w_h(a: v8i16, b: v8i16) -> v4i32 { + unsafe { __lsx_vmulwev_w_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_h_b(a: v16i8, b: v16i8) -> v8i16 { - __lsx_vmulwev_h_b(a, b) +pub fn lsx_vmulwev_h_b(a: v16i8, b: v16i8) -> v8i16 { + unsafe { __lsx_vmulwev_h_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_d_w(a: v4i32, b: v4i32) -> v2i64 { - __lsx_vmulwod_d_w(a, b) +pub fn lsx_vmulwod_d_w(a: v4i32, b: v4i32) -> v2i64 { + unsafe { __lsx_vmulwod_d_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_w_h(a: v8i16, b: v8i16) -> v4i32 { - __lsx_vmulwod_w_h(a, b) +pub fn lsx_vmulwod_w_h(a: v8i16, b: v8i16) -> v4i32 { + unsafe { __lsx_vmulwod_w_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_h_b(a: v16i8, b: v16i8) -> v8i16 { - __lsx_vmulwod_h_b(a, b) +pub fn lsx_vmulwod_h_b(a: v16i8, b: v16i8) -> v8i16 { + unsafe { __lsx_vmulwod_h_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_d_wu(a: v4u32, b: v4u32) -> v2i64 { - __lsx_vmulwev_d_wu(a, b) +pub fn lsx_vmulwev_d_wu(a: v4u32, b: v4u32) -> v2i64 { + unsafe { __lsx_vmulwev_d_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_w_hu(a: v8u16, b: v8u16) -> v4i32 { - __lsx_vmulwev_w_hu(a, b) +pub fn lsx_vmulwev_w_hu(a: v8u16, b: v8u16) -> v4i32 { + unsafe { __lsx_vmulwev_w_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_h_bu(a: v16u8, b: v16u8) -> v8i16 { - __lsx_vmulwev_h_bu(a, b) +pub fn lsx_vmulwev_h_bu(a: v16u8, b: v16u8) -> v8i16 { + unsafe { __lsx_vmulwev_h_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_d_wu(a: v4u32, b: v4u32) -> v2i64 { - __lsx_vmulwod_d_wu(a, b) +pub fn lsx_vmulwod_d_wu(a: v4u32, b: v4u32) -> v2i64 { + unsafe { __lsx_vmulwod_d_wu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_w_hu(a: v8u16, b: v8u16) -> v4i32 { - __lsx_vmulwod_w_hu(a, b) +pub fn lsx_vmulwod_w_hu(a: v8u16, b: v8u16) -> v4i32 { + unsafe { __lsx_vmulwod_w_hu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_h_bu(a: v16u8, b: v16u8) -> v8i16 { - __lsx_vmulwod_h_bu(a, b) +pub fn lsx_vmulwod_h_bu(a: v16u8, b: v16u8) -> v8i16 { + unsafe { __lsx_vmulwod_h_bu(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_d_wu_w(a: v4u32, b: v4i32) -> v2i64 { - __lsx_vmulwev_d_wu_w(a, b) +pub fn lsx_vmulwev_d_wu_w(a: v4u32, b: v4i32) -> v2i64 { + unsafe { __lsx_vmulwev_d_wu_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_w_hu_h(a: v8u16, b: v8i16) -> v4i32 { - __lsx_vmulwev_w_hu_h(a, b) +pub fn lsx_vmulwev_w_hu_h(a: v8u16, b: v8i16) -> v4i32 { + unsafe { __lsx_vmulwev_w_hu_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_h_bu_b(a: v16u8, b: v16i8) -> v8i16 { - __lsx_vmulwev_h_bu_b(a, b) +pub fn lsx_vmulwev_h_bu_b(a: v16u8, b: v16i8) -> v8i16 { + unsafe { __lsx_vmulwev_h_bu_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_d_wu_w(a: v4u32, b: v4i32) -> v2i64 { - __lsx_vmulwod_d_wu_w(a, b) +pub fn lsx_vmulwod_d_wu_w(a: v4u32, b: v4i32) -> v2i64 { + unsafe { __lsx_vmulwod_d_wu_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_w_hu_h(a: v8u16, b: v8i16) -> v4i32 { - __lsx_vmulwod_w_hu_h(a, b) +pub fn lsx_vmulwod_w_hu_h(a: v8u16, b: v8i16) -> v4i32 { + unsafe { __lsx_vmulwod_w_hu_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_h_bu_b(a: v16u8, b: v16i8) -> v8i16 { - __lsx_vmulwod_h_bu_b(a, b) +pub fn lsx_vmulwod_h_bu_b(a: v16u8, b: v16i8) -> v8i16 { + unsafe { __lsx_vmulwod_h_bu_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_q_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vmulwev_q_d(a, b) +pub fn lsx_vmulwev_q_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vmulwev_q_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_q_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vmulwod_q_d(a, b) +pub fn lsx_vmulwod_q_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vmulwod_q_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_q_du(a: v2u64, b: v2u64) -> v2i64 { - __lsx_vmulwev_q_du(a, b) +pub fn lsx_vmulwev_q_du(a: v2u64, b: v2u64) -> v2i64 { + unsafe { __lsx_vmulwev_q_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_q_du(a: v2u64, b: v2u64) -> v2i64 { - __lsx_vmulwod_q_du(a, b) +pub fn lsx_vmulwod_q_du(a: v2u64, b: v2u64) -> v2i64 { + unsafe { __lsx_vmulwod_q_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwev_q_du_d(a: v2u64, b: v2i64) -> v2i64 { - __lsx_vmulwev_q_du_d(a, b) +pub fn lsx_vmulwev_q_du_d(a: v2u64, b: v2i64) -> v2i64 { + unsafe { __lsx_vmulwev_q_du_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmulwod_q_du_d(a: v2u64, b: v2i64) -> v2i64 { - __lsx_vmulwod_q_du_d(a, b) +pub fn lsx_vmulwod_q_du_d(a: v2u64, b: v2i64) -> v2i64 { + unsafe { __lsx_vmulwod_q_du_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhaddw_q_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vhaddw_q_d(a, b) +pub fn lsx_vhaddw_q_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vhaddw_q_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhaddw_qu_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vhaddw_qu_du(a, b) +pub fn lsx_vhaddw_qu_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vhaddw_qu_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhsubw_q_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vhsubw_q_d(a, b) +pub fn lsx_vhsubw_q_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vhsubw_q_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vhsubw_qu_du(a: v2u64, b: v2u64) -> v2u64 { - __lsx_vhsubw_qu_du(a, b) +pub fn lsx_vhsubw_qu_du(a: v2u64, b: v2u64) -> v2u64 { + unsafe { __lsx_vhsubw_qu_du(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_d_w(a: v2i64, b: v4i32, c: v4i32) -> v2i64 { - __lsx_vmaddwev_d_w(a, b, c) +pub fn lsx_vmaddwev_d_w(a: v2i64, b: v4i32, c: v4i32) -> v2i64 { + unsafe { __lsx_vmaddwev_d_w(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_w_h(a: v4i32, b: v8i16, c: v8i16) -> v4i32 { - __lsx_vmaddwev_w_h(a, b, c) +pub fn lsx_vmaddwev_w_h(a: v4i32, b: v8i16, c: v8i16) -> v4i32 { + unsafe { __lsx_vmaddwev_w_h(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_h_b(a: v8i16, b: v16i8, c: v16i8) -> v8i16 { - __lsx_vmaddwev_h_b(a, b, c) +pub fn lsx_vmaddwev_h_b(a: v8i16, b: v16i8, c: v16i8) -> v8i16 { + unsafe { __lsx_vmaddwev_h_b(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_d_wu(a: v2u64, b: v4u32, c: v4u32) -> v2u64 { - __lsx_vmaddwev_d_wu(a, b, c) +pub fn lsx_vmaddwev_d_wu(a: v2u64, b: v4u32, c: v4u32) -> v2u64 { + unsafe { __lsx_vmaddwev_d_wu(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_w_hu(a: v4u32, b: v8u16, c: v8u16) -> v4u32 { - __lsx_vmaddwev_w_hu(a, b, c) +pub fn lsx_vmaddwev_w_hu(a: v4u32, b: v8u16, c: v8u16) -> v4u32 { + unsafe { __lsx_vmaddwev_w_hu(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_h_bu(a: v8u16, b: v16u8, c: v16u8) -> v8u16 { - __lsx_vmaddwev_h_bu(a, b, c) +pub fn lsx_vmaddwev_h_bu(a: v8u16, b: v16u8, c: v16u8) -> v8u16 { + unsafe { __lsx_vmaddwev_h_bu(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_d_w(a: v2i64, b: v4i32, c: v4i32) -> v2i64 { - __lsx_vmaddwod_d_w(a, b, c) +pub fn lsx_vmaddwod_d_w(a: v2i64, b: v4i32, c: v4i32) -> v2i64 { + unsafe { __lsx_vmaddwod_d_w(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_w_h(a: v4i32, b: v8i16, c: v8i16) -> v4i32 { - __lsx_vmaddwod_w_h(a, b, c) +pub fn lsx_vmaddwod_w_h(a: v4i32, b: v8i16, c: v8i16) -> v4i32 { + unsafe { __lsx_vmaddwod_w_h(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_h_b(a: v8i16, b: v16i8, c: v16i8) -> v8i16 { - __lsx_vmaddwod_h_b(a, b, c) +pub fn lsx_vmaddwod_h_b(a: v8i16, b: v16i8, c: v16i8) -> v8i16 { + unsafe { __lsx_vmaddwod_h_b(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_d_wu(a: v2u64, b: v4u32, c: v4u32) -> v2u64 { - __lsx_vmaddwod_d_wu(a, b, c) +pub fn lsx_vmaddwod_d_wu(a: v2u64, b: v4u32, c: v4u32) -> v2u64 { + unsafe { __lsx_vmaddwod_d_wu(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_w_hu(a: v4u32, b: v8u16, c: v8u16) -> v4u32 { - __lsx_vmaddwod_w_hu(a, b, c) +pub fn lsx_vmaddwod_w_hu(a: v4u32, b: v8u16, c: v8u16) -> v4u32 { + unsafe { __lsx_vmaddwod_w_hu(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_h_bu(a: v8u16, b: v16u8, c: v16u8) -> v8u16 { - __lsx_vmaddwod_h_bu(a, b, c) +pub fn lsx_vmaddwod_h_bu(a: v8u16, b: v16u8, c: v16u8) -> v8u16 { + unsafe { __lsx_vmaddwod_h_bu(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_d_wu_w(a: v2i64, b: v4u32, c: v4i32) -> v2i64 { - __lsx_vmaddwev_d_wu_w(a, b, c) +pub fn lsx_vmaddwev_d_wu_w(a: v2i64, b: v4u32, c: v4i32) -> v2i64 { + unsafe { __lsx_vmaddwev_d_wu_w(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_w_hu_h(a: v4i32, b: v8u16, c: v8i16) -> v4i32 { - __lsx_vmaddwev_w_hu_h(a, b, c) +pub fn lsx_vmaddwev_w_hu_h(a: v4i32, b: v8u16, c: v8i16) -> v4i32 { + unsafe { __lsx_vmaddwev_w_hu_h(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_h_bu_b(a: v8i16, b: v16u8, c: v16i8) -> v8i16 { - __lsx_vmaddwev_h_bu_b(a, b, c) +pub fn lsx_vmaddwev_h_bu_b(a: v8i16, b: v16u8, c: v16i8) -> v8i16 { + unsafe { __lsx_vmaddwev_h_bu_b(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_d_wu_w(a: v2i64, b: v4u32, c: v4i32) -> v2i64 { - __lsx_vmaddwod_d_wu_w(a, b, c) +pub fn lsx_vmaddwod_d_wu_w(a: v2i64, b: v4u32, c: v4i32) -> v2i64 { + unsafe { __lsx_vmaddwod_d_wu_w(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_w_hu_h(a: v4i32, b: v8u16, c: v8i16) -> v4i32 { - __lsx_vmaddwod_w_hu_h(a, b, c) +pub fn lsx_vmaddwod_w_hu_h(a: v4i32, b: v8u16, c: v8i16) -> v4i32 { + unsafe { __lsx_vmaddwod_w_hu_h(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_h_bu_b(a: v8i16, b: v16u8, c: v16i8) -> v8i16 { - __lsx_vmaddwod_h_bu_b(a, b, c) +pub fn lsx_vmaddwod_h_bu_b(a: v8i16, b: v16u8, c: v16i8) -> v8i16 { + unsafe { __lsx_vmaddwod_h_bu_b(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_q_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { - __lsx_vmaddwev_q_d(a, b, c) +pub fn lsx_vmaddwev_q_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { + unsafe { __lsx_vmaddwev_q_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_q_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { - __lsx_vmaddwod_q_d(a, b, c) +pub fn lsx_vmaddwod_q_d(a: v2i64, b: v2i64, c: v2i64) -> v2i64 { + unsafe { __lsx_vmaddwod_q_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_q_du(a: v2u64, b: v2u64, c: v2u64) -> v2u64 { - __lsx_vmaddwev_q_du(a, b, c) +pub fn lsx_vmaddwev_q_du(a: v2u64, b: v2u64, c: v2u64) -> v2u64 { + unsafe { __lsx_vmaddwev_q_du(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_q_du(a: v2u64, b: v2u64, c: v2u64) -> v2u64 { - __lsx_vmaddwod_q_du(a, b, c) +pub fn lsx_vmaddwod_q_du(a: v2u64, b: v2u64, c: v2u64) -> v2u64 { + unsafe { __lsx_vmaddwod_q_du(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwev_q_du_d(a: v2i64, b: v2u64, c: v2i64) -> v2i64 { - __lsx_vmaddwev_q_du_d(a, b, c) +pub fn lsx_vmaddwev_q_du_d(a: v2i64, b: v2u64, c: v2i64) -> v2i64 { + unsafe { __lsx_vmaddwev_q_du_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmaddwod_q_du_d(a: v2i64, b: v2u64, c: v2i64) -> v2i64 { - __lsx_vmaddwod_q_du_d(a, b, c) +pub fn lsx_vmaddwod_q_du_d(a: v2i64, b: v2u64, c: v2i64) -> v2i64 { + unsafe { __lsx_vmaddwod_q_du_d(a, b, c) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrotr_b(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vrotr_b(a, b) +pub fn lsx_vrotr_b(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vrotr_b(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrotr_h(a: v8i16, b: v8i16) -> v8i16 { - __lsx_vrotr_h(a, b) +pub fn lsx_vrotr_h(a: v8i16, b: v8i16) -> v8i16 { + unsafe { __lsx_vrotr_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrotr_w(a: v4i32, b: v4i32) -> v4i32 { - __lsx_vrotr_w(a, b) +pub fn lsx_vrotr_w(a: v4i32, b: v4i32) -> v4i32 { + unsafe { __lsx_vrotr_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrotr_d(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vrotr_d(a, b) +pub fn lsx_vrotr_d(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vrotr_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vadd_q(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vadd_q(a, b) +pub fn lsx_vadd_q(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vadd_q(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsub_q(a: v2i64, b: v2i64) -> v2i64 { - __lsx_vsub_q(a, b) +pub fn lsx_vsub_q(a: v2i64, b: v2i64) -> v2i64 { + unsafe { __lsx_vsub_q(a, b) } } #[inline] @@ -5809,555 +5809,555 @@ pub unsafe fn lsx_vldrepl_d<const IMM_S9: i32>(mem_addr: *const i8) -> v2i64 { #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmskgez_b(a: v16i8) -> v16i8 { - __lsx_vmskgez_b(a) +pub fn lsx_vmskgez_b(a: v16i8) -> v16i8 { + unsafe { __lsx_vmskgez_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vmsknz_b(a: v16i8) -> v16i8 { - __lsx_vmsknz_b(a) +pub fn lsx_vmsknz_b(a: v16i8) -> v16i8 { + unsafe { __lsx_vmsknz_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vexth_h_b(a: v16i8) -> v8i16 { - __lsx_vexth_h_b(a) +pub fn lsx_vexth_h_b(a: v16i8) -> v8i16 { + unsafe { __lsx_vexth_h_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vexth_w_h(a: v8i16) -> v4i32 { - __lsx_vexth_w_h(a) +pub fn lsx_vexth_w_h(a: v8i16) -> v4i32 { + unsafe { __lsx_vexth_w_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vexth_d_w(a: v4i32) -> v2i64 { - __lsx_vexth_d_w(a) +pub fn lsx_vexth_d_w(a: v4i32) -> v2i64 { + unsafe { __lsx_vexth_d_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vexth_q_d(a: v2i64) -> v2i64 { - __lsx_vexth_q_d(a) +pub fn lsx_vexth_q_d(a: v2i64) -> v2i64 { + unsafe { __lsx_vexth_q_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vexth_hu_bu(a: v16u8) -> v8u16 { - __lsx_vexth_hu_bu(a) +pub fn lsx_vexth_hu_bu(a: v16u8) -> v8u16 { + unsafe { __lsx_vexth_hu_bu(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vexth_wu_hu(a: v8u16) -> v4u32 { - __lsx_vexth_wu_hu(a) +pub fn lsx_vexth_wu_hu(a: v8u16) -> v4u32 { + unsafe { __lsx_vexth_wu_hu(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vexth_du_wu(a: v4u32) -> v2u64 { - __lsx_vexth_du_wu(a) +pub fn lsx_vexth_du_wu(a: v4u32) -> v2u64 { + unsafe { __lsx_vexth_du_wu(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vexth_qu_du(a: v2u64) -> v2u64 { - __lsx_vexth_qu_du(a) +pub fn lsx_vexth_qu_du(a: v2u64) -> v2u64 { + unsafe { __lsx_vexth_qu_du(a) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrotri_b<const IMM3: u32>(a: v16i8) -> v16i8 { +pub fn lsx_vrotri_b<const IMM3: u32>(a: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM3, 3); - __lsx_vrotri_b(a, IMM3) + unsafe { __lsx_vrotri_b(a, IMM3) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrotri_h<const IMM4: u32>(a: v8i16) -> v8i16 { +pub fn lsx_vrotri_h<const IMM4: u32>(a: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vrotri_h(a, IMM4) + unsafe { __lsx_vrotri_h(a, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrotri_w<const IMM5: u32>(a: v4i32) -> v4i32 { +pub fn lsx_vrotri_w<const IMM5: u32>(a: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vrotri_w(a, IMM5) + unsafe { __lsx_vrotri_w(a, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(1)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrotri_d<const IMM6: u32>(a: v2i64) -> v2i64 { +pub fn lsx_vrotri_d<const IMM6: u32>(a: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vrotri_d(a, IMM6) + unsafe { __lsx_vrotri_d(a, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vextl_q_d(a: v2i64) -> v2i64 { - __lsx_vextl_q_d(a) +pub fn lsx_vextl_q_d(a: v2i64) -> v2i64 { + unsafe { __lsx_vextl_q_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vsrlni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsrlni_b_h(a, b, IMM4) + unsafe { __lsx_vsrlni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vsrlni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsrlni_h_w(a, b, IMM5) + unsafe { __lsx_vsrlni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vsrlni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsrlni_w_d(a, b, IMM6) + unsafe { __lsx_vsrlni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vsrlni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vsrlni_d_q(a, b, IMM7) + unsafe { __lsx_vsrlni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlrni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vsrlrni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsrlrni_b_h(a, b, IMM4) + unsafe { __lsx_vsrlrni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlrni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vsrlrni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsrlrni_h_w(a, b, IMM5) + unsafe { __lsx_vsrlrni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlrni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vsrlrni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsrlrni_w_d(a, b, IMM6) + unsafe { __lsx_vsrlrni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrlrni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vsrlrni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vsrlrni_d_q(a, b, IMM7) + unsafe { __lsx_vsrlrni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vssrlni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vssrlni_b_h(a, b, IMM4) + unsafe { __lsx_vssrlni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vssrlni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vssrlni_h_w(a, b, IMM5) + unsafe { __lsx_vssrlni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vssrlni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vssrlni_w_d(a, b, IMM6) + unsafe { __lsx_vssrlni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vssrlni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vssrlni_d_q(a, b, IMM7) + unsafe { __lsx_vssrlni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlni_bu_h<const IMM4: u32>(a: v16u8, b: v16i8) -> v16u8 { +pub fn lsx_vssrlni_bu_h<const IMM4: u32>(a: v16u8, b: v16i8) -> v16u8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vssrlni_bu_h(a, b, IMM4) + unsafe { __lsx_vssrlni_bu_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlni_hu_w<const IMM5: u32>(a: v8u16, b: v8i16) -> v8u16 { +pub fn lsx_vssrlni_hu_w<const IMM5: u32>(a: v8u16, b: v8i16) -> v8u16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vssrlni_hu_w(a, b, IMM5) + unsafe { __lsx_vssrlni_hu_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlni_wu_d<const IMM6: u32>(a: v4u32, b: v4i32) -> v4u32 { +pub fn lsx_vssrlni_wu_d<const IMM6: u32>(a: v4u32, b: v4i32) -> v4u32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vssrlni_wu_d(a, b, IMM6) + unsafe { __lsx_vssrlni_wu_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlni_du_q<const IMM7: u32>(a: v2u64, b: v2i64) -> v2u64 { +pub fn lsx_vssrlni_du_q<const IMM7: u32>(a: v2u64, b: v2i64) -> v2u64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vssrlni_du_q(a, b, IMM7) + unsafe { __lsx_vssrlni_du_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vssrlrni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vssrlrni_b_h(a, b, IMM4) + unsafe { __lsx_vssrlrni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vssrlrni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vssrlrni_h_w(a, b, IMM5) + unsafe { __lsx_vssrlrni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vssrlrni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vssrlrni_w_d(a, b, IMM6) + unsafe { __lsx_vssrlrni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vssrlrni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vssrlrni_d_q(a, b, IMM7) + unsafe { __lsx_vssrlrni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrni_bu_h<const IMM4: u32>(a: v16u8, b: v16i8) -> v16u8 { +pub fn lsx_vssrlrni_bu_h<const IMM4: u32>(a: v16u8, b: v16i8) -> v16u8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vssrlrni_bu_h(a, b, IMM4) + unsafe { __lsx_vssrlrni_bu_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrni_hu_w<const IMM5: u32>(a: v8u16, b: v8i16) -> v8u16 { +pub fn lsx_vssrlrni_hu_w<const IMM5: u32>(a: v8u16, b: v8i16) -> v8u16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vssrlrni_hu_w(a, b, IMM5) + unsafe { __lsx_vssrlrni_hu_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrni_wu_d<const IMM6: u32>(a: v4u32, b: v4i32) -> v4u32 { +pub fn lsx_vssrlrni_wu_d<const IMM6: u32>(a: v4u32, b: v4i32) -> v4u32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vssrlrni_wu_d(a, b, IMM6) + unsafe { __lsx_vssrlrni_wu_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrni_du_q<const IMM7: u32>(a: v2u64, b: v2i64) -> v2u64 { +pub fn lsx_vssrlrni_du_q<const IMM7: u32>(a: v2u64, b: v2i64) -> v2u64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vssrlrni_du_q(a, b, IMM7) + unsafe { __lsx_vssrlrni_du_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrani_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vsrani_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsrani_b_h(a, b, IMM4) + unsafe { __lsx_vsrani_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrani_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vsrani_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsrani_h_w(a, b, IMM5) + unsafe { __lsx_vsrani_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrani_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vsrani_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsrani_w_d(a, b, IMM6) + unsafe { __lsx_vsrani_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrani_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vsrani_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vsrani_d_q(a, b, IMM7) + unsafe { __lsx_vsrani_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrarni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vsrarni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vsrarni_b_h(a, b, IMM4) + unsafe { __lsx_vsrarni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrarni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vsrarni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vsrarni_h_w(a, b, IMM5) + unsafe { __lsx_vsrarni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrarni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vsrarni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vsrarni_w_d(a, b, IMM6) + unsafe { __lsx_vsrarni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vsrarni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vsrarni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vsrarni_d_q(a, b, IMM7) + unsafe { __lsx_vsrarni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrani_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vssrani_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vssrani_b_h(a, b, IMM4) + unsafe { __lsx_vssrani_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrani_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vssrani_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vssrani_h_w(a, b, IMM5) + unsafe { __lsx_vssrani_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrani_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vssrani_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vssrani_w_d(a, b, IMM6) + unsafe { __lsx_vssrani_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrani_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vssrani_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vssrani_d_q(a, b, IMM7) + unsafe { __lsx_vssrani_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrani_bu_h<const IMM4: u32>(a: v16u8, b: v16i8) -> v16u8 { +pub fn lsx_vssrani_bu_h<const IMM4: u32>(a: v16u8, b: v16i8) -> v16u8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vssrani_bu_h(a, b, IMM4) + unsafe { __lsx_vssrani_bu_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrani_hu_w<const IMM5: u32>(a: v8u16, b: v8i16) -> v8u16 { +pub fn lsx_vssrani_hu_w<const IMM5: u32>(a: v8u16, b: v8i16) -> v8u16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vssrani_hu_w(a, b, IMM5) + unsafe { __lsx_vssrani_hu_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrani_wu_d<const IMM6: u32>(a: v4u32, b: v4i32) -> v4u32 { +pub fn lsx_vssrani_wu_d<const IMM6: u32>(a: v4u32, b: v4i32) -> v4u32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vssrani_wu_d(a, b, IMM6) + unsafe { __lsx_vssrani_wu_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrani_du_q<const IMM7: u32>(a: v2u64, b: v2i64) -> v2u64 { +pub fn lsx_vssrani_du_q<const IMM7: u32>(a: v2u64, b: v2i64) -> v2u64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vssrani_du_q(a, b, IMM7) + unsafe { __lsx_vssrani_du_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { +pub fn lsx_vssrarni_b_h<const IMM4: u32>(a: v16i8, b: v16i8) -> v16i8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vssrarni_b_h(a, b, IMM4) + unsafe { __lsx_vssrarni_b_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { +pub fn lsx_vssrarni_h_w<const IMM5: u32>(a: v8i16, b: v8i16) -> v8i16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vssrarni_h_w(a, b, IMM5) + unsafe { __lsx_vssrarni_h_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vssrarni_w_d<const IMM6: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vssrarni_w_d(a, b, IMM6) + unsafe { __lsx_vssrarni_w_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { +pub fn lsx_vssrarni_d_q<const IMM7: u32>(a: v2i64, b: v2i64) -> v2i64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vssrarni_d_q(a, b, IMM7) + unsafe { __lsx_vssrarni_d_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarni_bu_h<const IMM4: u32>(a: v16u8, b: v16i8) -> v16u8 { +pub fn lsx_vssrarni_bu_h<const IMM4: u32>(a: v16u8, b: v16i8) -> v16u8 { static_assert_uimm_bits!(IMM4, 4); - __lsx_vssrarni_bu_h(a, b, IMM4) + unsafe { __lsx_vssrarni_bu_h(a, b, IMM4) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarni_hu_w<const IMM5: u32>(a: v8u16, b: v8i16) -> v8u16 { +pub fn lsx_vssrarni_hu_w<const IMM5: u32>(a: v8u16, b: v8i16) -> v8u16 { static_assert_uimm_bits!(IMM5, 5); - __lsx_vssrarni_hu_w(a, b, IMM5) + unsafe { __lsx_vssrarni_hu_w(a, b, IMM5) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarni_wu_d<const IMM6: u32>(a: v4u32, b: v4i32) -> v4u32 { +pub fn lsx_vssrarni_wu_d<const IMM6: u32>(a: v4u32, b: v4i32) -> v4u32 { static_assert_uimm_bits!(IMM6, 6); - __lsx_vssrarni_wu_d(a, b, IMM6) + unsafe { __lsx_vssrarni_wu_d(a, b, IMM6) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrarni_du_q<const IMM7: u32>(a: v2u64, b: v2i64) -> v2u64 { +pub fn lsx_vssrarni_du_q<const IMM7: u32>(a: v2u64, b: v2i64) -> v2u64 { static_assert_uimm_bits!(IMM7, 7); - __lsx_vssrarni_du_q(a, b, IMM7) + unsafe { __lsx_vssrarni_du_q(a, b, IMM7) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(2)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vpermi_w<const IMM8: u32>(a: v4i32, b: v4i32) -> v4i32 { +pub fn lsx_vpermi_w<const IMM8: u32>(a: v4i32, b: v4i32) -> v4i32 { static_assert_uimm_bits!(IMM8, 8); - __lsx_vpermi_w(a, b, IMM8) + unsafe { __lsx_vpermi_w(a, b, IMM8) } } #[inline] @@ -6381,66 +6381,66 @@ pub unsafe fn lsx_vst<const IMM_S12: i32>(a: v16i8, mem_addr: *mut i8) { #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrn_b_h(a: v8i16, b: v8i16) -> v16i8 { - __lsx_vssrlrn_b_h(a, b) +pub fn lsx_vssrlrn_b_h(a: v8i16, b: v8i16) -> v16i8 { + unsafe { __lsx_vssrlrn_b_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrn_h_w(a: v4i32, b: v4i32) -> v8i16 { - __lsx_vssrlrn_h_w(a, b) +pub fn lsx_vssrlrn_h_w(a: v4i32, b: v4i32) -> v8i16 { + unsafe { __lsx_vssrlrn_h_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrlrn_w_d(a: v2i64, b: v2i64) -> v4i32 { - __lsx_vssrlrn_w_d(a, b) +pub fn lsx_vssrlrn_w_d(a: v2i64, b: v2i64) -> v4i32 { + unsafe { __lsx_vssrlrn_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrln_b_h(a: v8i16, b: v8i16) -> v16i8 { - __lsx_vssrln_b_h(a, b) +pub fn lsx_vssrln_b_h(a: v8i16, b: v8i16) -> v16i8 { + unsafe { __lsx_vssrln_b_h(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrln_h_w(a: v4i32, b: v4i32) -> v8i16 { - __lsx_vssrln_h_w(a, b) +pub fn lsx_vssrln_h_w(a: v4i32, b: v4i32) -> v8i16 { + unsafe { __lsx_vssrln_h_w(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vssrln_w_d(a: v2i64, b: v2i64) -> v4i32 { - __lsx_vssrln_w_d(a, b) +pub fn lsx_vssrln_w_d(a: v2i64, b: v2i64) -> v4i32 { + unsafe { __lsx_vssrln_w_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vorn_v(a: v16i8, b: v16i8) -> v16i8 { - __lsx_vorn_v(a, b) +pub fn lsx_vorn_v(a: v16i8, b: v16i8) -> v16i8 { + unsafe { __lsx_vorn_v(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vldi<const IMM_S13: i32>() -> v2i64 { +pub fn lsx_vldi<const IMM_S13: i32>() -> v2i64 { static_assert_simm_bits!(IMM_S13, 13); - __lsx_vldi(IMM_S13) + unsafe { __lsx_vldi(IMM_S13) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vshuf_b(a: v16i8, b: v16i8, c: v16i8) -> v16i8 { - __lsx_vshuf_b(a, b, c) +pub fn lsx_vshuf_b(a: v16i8, b: v16i8, c: v16i8) -> v16i8 { + unsafe { __lsx_vshuf_b(a, b, c) } } #[inline] @@ -6460,420 +6460,420 @@ pub unsafe fn lsx_vstx(a: v16i8, mem_addr: *mut i8, b: i64) { #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vextl_qu_du(a: v2u64) -> v2u64 { - __lsx_vextl_qu_du(a) +pub fn lsx_vextl_qu_du(a: v2u64) -> v2u64 { + unsafe { __lsx_vextl_qu_du(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bnz_b(a: v16u8) -> i32 { - __lsx_bnz_b(a) +pub fn lsx_bnz_b(a: v16u8) -> i32 { + unsafe { __lsx_bnz_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bnz_d(a: v2u64) -> i32 { - __lsx_bnz_d(a) +pub fn lsx_bnz_d(a: v2u64) -> i32 { + unsafe { __lsx_bnz_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bnz_h(a: v8u16) -> i32 { - __lsx_bnz_h(a) +pub fn lsx_bnz_h(a: v8u16) -> i32 { + unsafe { __lsx_bnz_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bnz_v(a: v16u8) -> i32 { - __lsx_bnz_v(a) +pub fn lsx_bnz_v(a: v16u8) -> i32 { + unsafe { __lsx_bnz_v(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bnz_w(a: v4u32) -> i32 { - __lsx_bnz_w(a) +pub fn lsx_bnz_w(a: v4u32) -> i32 { + unsafe { __lsx_bnz_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bz_b(a: v16u8) -> i32 { - __lsx_bz_b(a) +pub fn lsx_bz_b(a: v16u8) -> i32 { + unsafe { __lsx_bz_b(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bz_d(a: v2u64) -> i32 { - __lsx_bz_d(a) +pub fn lsx_bz_d(a: v2u64) -> i32 { + unsafe { __lsx_bz_d(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bz_h(a: v8u16) -> i32 { - __lsx_bz_h(a) +pub fn lsx_bz_h(a: v8u16) -> i32 { + unsafe { __lsx_bz_h(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bz_v(a: v16u8) -> i32 { - __lsx_bz_v(a) +pub fn lsx_bz_v(a: v16u8) -> i32 { + unsafe { __lsx_bz_v(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_bz_w(a: v4u32) -> i32 { - __lsx_bz_w(a) +pub fn lsx_bz_w(a: v4u32) -> i32 { + unsafe { __lsx_bz_w(a) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_caf_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_caf_d(a, b) +pub fn lsx_vfcmp_caf_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_caf_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_caf_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_caf_s(a, b) +pub fn lsx_vfcmp_caf_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_caf_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_ceq_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_ceq_d(a, b) +pub fn lsx_vfcmp_ceq_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_ceq_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_ceq_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_ceq_s(a, b) +pub fn lsx_vfcmp_ceq_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_ceq_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cle_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_cle_d(a, b) +pub fn lsx_vfcmp_cle_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_cle_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cle_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_cle_s(a, b) +pub fn lsx_vfcmp_cle_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_cle_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_clt_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_clt_d(a, b) +pub fn lsx_vfcmp_clt_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_clt_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_clt_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_clt_s(a, b) +pub fn lsx_vfcmp_clt_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_clt_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cne_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_cne_d(a, b) +pub fn lsx_vfcmp_cne_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_cne_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cne_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_cne_s(a, b) +pub fn lsx_vfcmp_cne_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_cne_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cor_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_cor_d(a, b) +pub fn lsx_vfcmp_cor_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_cor_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cor_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_cor_s(a, b) +pub fn lsx_vfcmp_cor_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_cor_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cueq_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_cueq_d(a, b) +pub fn lsx_vfcmp_cueq_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_cueq_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cueq_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_cueq_s(a, b) +pub fn lsx_vfcmp_cueq_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_cueq_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cule_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_cule_d(a, b) +pub fn lsx_vfcmp_cule_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_cule_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cule_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_cule_s(a, b) +pub fn lsx_vfcmp_cule_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_cule_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cult_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_cult_d(a, b) +pub fn lsx_vfcmp_cult_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_cult_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cult_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_cult_s(a, b) +pub fn lsx_vfcmp_cult_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_cult_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cun_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_cun_d(a, b) +pub fn lsx_vfcmp_cun_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_cun_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cune_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_cune_d(a, b) +pub fn lsx_vfcmp_cune_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_cune_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cune_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_cune_s(a, b) +pub fn lsx_vfcmp_cune_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_cune_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_cun_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_cun_s(a, b) +pub fn lsx_vfcmp_cun_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_cun_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_saf_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_saf_d(a, b) +pub fn lsx_vfcmp_saf_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_saf_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_saf_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_saf_s(a, b) +pub fn lsx_vfcmp_saf_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_saf_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_seq_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_seq_d(a, b) +pub fn lsx_vfcmp_seq_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_seq_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_seq_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_seq_s(a, b) +pub fn lsx_vfcmp_seq_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_seq_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sle_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_sle_d(a, b) +pub fn lsx_vfcmp_sle_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_sle_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sle_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_sle_s(a, b) +pub fn lsx_vfcmp_sle_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_sle_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_slt_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_slt_d(a, b) +pub fn lsx_vfcmp_slt_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_slt_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_slt_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_slt_s(a, b) +pub fn lsx_vfcmp_slt_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_slt_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sne_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_sne_d(a, b) +pub fn lsx_vfcmp_sne_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_sne_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sne_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_sne_s(a, b) +pub fn lsx_vfcmp_sne_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_sne_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sor_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_sor_d(a, b) +pub fn lsx_vfcmp_sor_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_sor_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sor_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_sor_s(a, b) +pub fn lsx_vfcmp_sor_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_sor_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sueq_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_sueq_d(a, b) +pub fn lsx_vfcmp_sueq_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_sueq_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sueq_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_sueq_s(a, b) +pub fn lsx_vfcmp_sueq_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_sueq_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sule_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_sule_d(a, b) +pub fn lsx_vfcmp_sule_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_sule_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sule_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_sule_s(a, b) +pub fn lsx_vfcmp_sule_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_sule_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sult_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_sult_d(a, b) +pub fn lsx_vfcmp_sult_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_sult_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sult_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_sult_s(a, b) +pub fn lsx_vfcmp_sult_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_sult_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sun_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_sun_d(a, b) +pub fn lsx_vfcmp_sun_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_sun_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sune_d(a: v2f64, b: v2f64) -> v2i64 { - __lsx_vfcmp_sune_d(a, b) +pub fn lsx_vfcmp_sune_d(a: v2f64, b: v2f64) -> v2i64 { + unsafe { __lsx_vfcmp_sune_d(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sune_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_sune_s(a, b) +pub fn lsx_vfcmp_sune_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_sune_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vfcmp_sun_s(a: v4f32, b: v4f32) -> v4i32 { - __lsx_vfcmp_sun_s(a, b) +pub fn lsx_vfcmp_sun_s(a: v4f32, b: v4f32) -> v4i32 { + unsafe { __lsx_vfcmp_sun_s(a, b) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrepli_b<const IMM_S10: i32>() -> v16i8 { +pub fn lsx_vrepli_b<const IMM_S10: i32>() -> v16i8 { static_assert_simm_bits!(IMM_S10, 10); - __lsx_vrepli_b(IMM_S10) + unsafe { __lsx_vrepli_b(IMM_S10) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrepli_d<const IMM_S10: i32>() -> v2i64 { +pub fn lsx_vrepli_d<const IMM_S10: i32>() -> v2i64 { static_assert_simm_bits!(IMM_S10, 10); - __lsx_vrepli_d(IMM_S10) + unsafe { __lsx_vrepli_d(IMM_S10) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrepli_h<const IMM_S10: i32>() -> v8i16 { +pub fn lsx_vrepli_h<const IMM_S10: i32>() -> v8i16 { static_assert_simm_bits!(IMM_S10, 10); - __lsx_vrepli_h(IMM_S10) + unsafe { __lsx_vrepli_h(IMM_S10) } } #[inline] #[target_feature(enable = "lsx")] #[rustc_legacy_const_generics(0)] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn lsx_vrepli_w<const IMM_S10: i32>() -> v4i32 { +pub fn lsx_vrepli_w<const IMM_S10: i32>() -> v4i32 { static_assert_simm_bits!(IMM_S10, 10); - __lsx_vrepli_w(IMM_S10) + unsafe { __lsx_vrepli_w(IMM_S10) } } diff --git a/library/stdarch/crates/core_arch/src/loongarch64/mod.rs b/library/stdarch/crates/core_arch/src/loongarch64/mod.rs index b1704bbb48d..e8249805eae 100644 --- a/library/stdarch/crates/core_arch/src/loongarch64/mod.rs +++ b/library/stdarch/crates/core_arch/src/loongarch64/mod.rs @@ -1,4 +1,4 @@ -//! `LoongArch` intrinsics +//! `LoongArch64` intrinsics mod lasx; mod lsx; @@ -13,89 +13,30 @@ use crate::arch::asm; /// Reads the 64-bit stable counter value and the counter ID #[inline] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn rdtime_d() -> (i64, isize) { - let val: i64; - let tid: isize; - asm!("rdtime.d {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)); - (val, tid) -} - -/// Reads the lower 32-bit stable counter value and the counter ID -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn rdtimel_w() -> (i32, isize) { - let val: i32; - let tid: isize; - asm!("rdtimel.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)); - (val, tid) -} - -/// Reads the upper 32-bit stable counter value and the counter ID -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn rdtimeh_w() -> (i32, isize) { - let val: i32; - let tid: isize; - asm!("rdtimeh.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)); +pub fn rdtime_d() -> (i64, isize) { + let (val, tid): (i64, isize); + unsafe { asm!("rdtime.d {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)) }; (val, tid) } #[allow(improper_ctypes)] unsafe extern "unadjusted" { - #[link_name = "llvm.loongarch.crc.w.b.w"] - fn __crc_w_b_w(a: i32, b: i32) -> i32; - #[link_name = "llvm.loongarch.crc.w.h.w"] - fn __crc_w_h_w(a: i32, b: i32) -> i32; - #[link_name = "llvm.loongarch.crc.w.w.w"] - fn __crc_w_w_w(a: i32, b: i32) -> i32; #[link_name = "llvm.loongarch.crc.w.d.w"] fn __crc_w_d_w(a: i64, b: i32) -> i32; - #[link_name = "llvm.loongarch.crcc.w.b.w"] - fn __crcc_w_b_w(a: i32, b: i32) -> i32; - #[link_name = "llvm.loongarch.crcc.w.h.w"] - fn __crcc_w_h_w(a: i32, b: i32) -> i32; - #[link_name = "llvm.loongarch.crcc.w.w.w"] - fn __crcc_w_w_w(a: i32, b: i32) -> i32; #[link_name = "llvm.loongarch.crcc.w.d.w"] fn __crcc_w_d_w(a: i64, b: i32) -> i32; #[link_name = "llvm.loongarch.cacop.d"] fn __cacop(a: i64, b: i64, c: i64); - #[link_name = "llvm.loongarch.dbar"] - fn __dbar(a: i32); - #[link_name = "llvm.loongarch.ibar"] - fn __ibar(a: i32); - #[link_name = "llvm.loongarch.movgr2fcsr"] - fn __movgr2fcsr(a: i32, b: i32); - #[link_name = "llvm.loongarch.movfcsr2gr"] - fn __movfcsr2gr(a: i32) -> i32; #[link_name = "llvm.loongarch.csrrd.d"] fn __csrrd(a: i32) -> i64; #[link_name = "llvm.loongarch.csrwr.d"] fn __csrwr(a: i64, b: i32) -> i64; #[link_name = "llvm.loongarch.csrxchg.d"] fn __csrxchg(a: i64, b: i64, c: i32) -> i64; - #[link_name = "llvm.loongarch.iocsrrd.b"] - fn __iocsrrd_b(a: i32) -> i32; - #[link_name = "llvm.loongarch.iocsrrd.h"] - fn __iocsrrd_h(a: i32) -> i32; - #[link_name = "llvm.loongarch.iocsrrd.w"] - fn __iocsrrd_w(a: i32) -> i32; #[link_name = "llvm.loongarch.iocsrrd.d"] fn __iocsrrd_d(a: i32) -> i64; - #[link_name = "llvm.loongarch.iocsrwr.b"] - fn __iocsrwr_b(a: i32, b: i32); - #[link_name = "llvm.loongarch.iocsrwr.h"] - fn __iocsrwr_h(a: i32, b: i32); - #[link_name = "llvm.loongarch.iocsrwr.w"] - fn __iocsrwr_w(a: i32, b: i32); #[link_name = "llvm.loongarch.iocsrwr.d"] fn __iocsrwr_d(a: i64, b: i32); - #[link_name = "llvm.loongarch.break"] - fn __break(a: i32); - #[link_name = "llvm.loongarch.cpucfg"] - fn __cpucfg(a: i32) -> i32; - #[link_name = "llvm.loongarch.syscall"] - fn __syscall(a: i32); #[link_name = "llvm.loongarch.asrtle.d"] fn __asrtle(a: i64, b: i64); #[link_name = "llvm.loongarch.asrtgt.d"] @@ -104,70 +45,20 @@ unsafe extern "unadjusted" { fn __lddir(a: i64, b: i64) -> i64; #[link_name = "llvm.loongarch.ldpte.d"] fn __ldpte(a: i64, b: i64); - #[link_name = "llvm.loongarch.frecipe.s"] - fn __frecipe_s(a: f32) -> f32; - #[link_name = "llvm.loongarch.frecipe.d"] - fn __frecipe_d(a: f64) -> f64; - #[link_name = "llvm.loongarch.frsqrte.s"] - fn __frsqrte_s(a: f32) -> f32; - #[link_name = "llvm.loongarch.frsqrte.d"] - fn __frsqrte_d(a: f64) -> f64; } /// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320) #[inline] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn crc_w_b_w(a: i32, b: i32) -> i32 { - __crc_w_b_w(a, b) -} - -/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320) -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn crc_w_h_w(a: i32, b: i32) -> i32 { - __crc_w_h_w(a, b) -} - -/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320) -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn crc_w_w_w(a: i32, b: i32) -> i32 { - __crc_w_w_w(a, b) -} - -/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320) -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn crc_w_d_w(a: i64, b: i32) -> i32 { - __crc_w_d_w(a, b) -} - -/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78) -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn crcc_w_b_w(a: i32, b: i32) -> i32 { - __crcc_w_b_w(a, b) -} - -/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78) -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn crcc_w_h_w(a: i32, b: i32) -> i32 { - __crcc_w_h_w(a, b) +pub fn crc_w_d_w(a: i64, b: i32) -> i32 { + unsafe { __crc_w_d_w(a, b) } } /// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78) #[inline] #[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn crcc_w_w_w(a: i32, b: i32) -> i32 { - __crcc_w_w_w(a, b) -} - -/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78) -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn crcc_w_d_w(a: i64, b: i32) -> i32 { - __crcc_w_d_w(a, b) +pub fn crcc_w_d_w(a: i64, b: i32) -> i32 { + unsafe { __crcc_w_d_w(a, b) } } /// Generates the cache operation instruction @@ -178,38 +69,6 @@ pub unsafe fn cacop<const IMM12: i64>(a: i64, b: i64) { __cacop(a, b, IMM12); } -/// Generates the memory barrier instruction -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn dbar<const IMM15: i32>() { - static_assert_uimm_bits!(IMM15, 15); - __dbar(IMM15); -} - -/// Generates the instruction-fetch barrier instruction -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn ibar<const IMM15: i32>() { - static_assert_uimm_bits!(IMM15, 15); - __ibar(IMM15); -} - -/// Moves data from a GPR to the FCSR -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn movgr2fcsr<const IMM5: i32>(a: i32) { - static_assert_uimm_bits!(IMM5, 5); - __movgr2fcsr(IMM5, a); -} - -/// Moves data from a FCSR to the GPR -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn movfcsr2gr<const IMM5: i32>() -> i32 { - static_assert_uimm_bits!(IMM5, 5); - __movfcsr2gr(IMM5) -} - /// Reads the CSR #[inline] #[unstable(feature = "stdarch_loongarch", issue = "117427")] @@ -234,27 +93,6 @@ pub unsafe fn csrxchg<const IMM14: i32>(a: i64, b: i64) -> i64 { __csrxchg(a, b, IMM14) } -/// Reads the 8-bit IO-CSR -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn iocsrrd_b(a: i32) -> i32 { - __iocsrrd_b(a) -} - -/// Reads the 16-bit IO-CSR -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn iocsrrd_h(a: i32) -> i32 { - __iocsrrd_h(a) -} - -/// Reads the 32-bit IO-CSR -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn iocsrrd_w(a: i32) -> i32 { - __iocsrrd_w(a) -} - /// Reads the 64-bit IO-CSR #[inline] #[unstable(feature = "stdarch_loongarch", issue = "117427")] @@ -262,27 +100,6 @@ pub unsafe fn iocsrrd_d(a: i32) -> i64 { __iocsrrd_d(a) } -/// Writes the 8-bit IO-CSR -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn iocsrwr_b(a: i32, b: i32) { - __iocsrwr_b(a, b) -} - -/// Writes the 16-bit IO-CSR -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn iocsrwr_h(a: i32, b: i32) { - __iocsrwr_h(a, b) -} - -/// Writes the 32-bit IO-CSR -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn iocsrwr_w(a: i32, b: i32) { - __iocsrwr_w(a, b) -} - /// Writes the 64-bit IO-CSR #[inline] #[unstable(feature = "stdarch_loongarch", issue = "117427")] @@ -290,29 +107,6 @@ pub unsafe fn iocsrwr_d(a: i64, b: i32) { __iocsrwr_d(a, b) } -/// Generates the breakpoint instruction -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn brk<const IMM15: i32>() { - static_assert_uimm_bits!(IMM15, 15); - __break(IMM15); -} - -/// Reads the CPU configuration register -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn cpucfg(a: i32) -> i32 { - __cpucfg(a) -} - -/// Generates the syscall instruction -#[inline] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn syscall<const IMM15: i32>() { - static_assert_uimm_bits!(IMM15, 15); - __syscall(IMM15); -} - /// Generates the less-than-or-equal asseration instruction #[inline] #[unstable(feature = "stdarch_loongarch", issue = "117427")] @@ -342,35 +136,3 @@ pub unsafe fn lddir<const B: i64>(a: i64) -> i64 { pub unsafe fn ldpte<const B: i64>(a: i64) { __ldpte(a, B) } - -/// Calculate the approximate single-precision result of 1.0 divided -#[inline] -#[target_feature(enable = "frecipe")] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn frecipe_s(a: f32) -> f32 { - __frecipe_s(a) -} - -/// Calculate the approximate double-precision result of 1.0 divided -#[inline] -#[target_feature(enable = "frecipe")] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn frecipe_d(a: f64) -> f64 { - __frecipe_d(a) -} - -/// Calculate the approximate single-precision result of dividing 1.0 by the square root -#[inline] -#[target_feature(enable = "frecipe")] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn frsqrte_s(a: f32) -> f32 { - __frsqrte_s(a) -} - -/// Calculate the approximate double-precision result of dividing 1.0 by the square root -#[inline] -#[target_feature(enable = "frecipe")] -#[unstable(feature = "stdarch_loongarch", issue = "117427")] -pub unsafe fn frsqrte_d(a: f64) -> f64 { - __frsqrte_d(a) -} diff --git a/library/stdarch/crates/core_arch/src/loongarch_shared/mod.rs b/library/stdarch/crates/core_arch/src/loongarch_shared/mod.rs new file mode 100644 index 00000000000..710b926f8df --- /dev/null +++ b/library/stdarch/crates/core_arch/src/loongarch_shared/mod.rs @@ -0,0 +1,242 @@ +//! `Shared LoongArch` intrinsics + +use crate::arch::asm; + +/// Reads the lower 32-bit stable counter value and the counter ID +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn rdtimel_w() -> (i32, isize) { + let (val, tid): (i32, isize); + unsafe { asm!("rdtimel.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)) }; + (val, tid) +} + +/// Reads the upper 32-bit stable counter value and the counter ID +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn rdtimeh_w() -> (i32, isize) { + let (val, tid): (i32, isize); + unsafe { asm!("rdtimeh.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)) }; + (val, tid) +} + +#[allow(improper_ctypes)] +unsafe extern "unadjusted" { + #[link_name = "llvm.loongarch.crc.w.b.w"] + fn __crc_w_b_w(a: i32, b: i32) -> i32; + #[link_name = "llvm.loongarch.crc.w.h.w"] + fn __crc_w_h_w(a: i32, b: i32) -> i32; + #[link_name = "llvm.loongarch.crc.w.w.w"] + fn __crc_w_w_w(a: i32, b: i32) -> i32; + #[link_name = "llvm.loongarch.crcc.w.b.w"] + fn __crcc_w_b_w(a: i32, b: i32) -> i32; + #[link_name = "llvm.loongarch.crcc.w.h.w"] + fn __crcc_w_h_w(a: i32, b: i32) -> i32; + #[link_name = "llvm.loongarch.crcc.w.w.w"] + fn __crcc_w_w_w(a: i32, b: i32) -> i32; + #[link_name = "llvm.loongarch.dbar"] + fn __dbar(a: i32); + #[link_name = "llvm.loongarch.ibar"] + fn __ibar(a: i32); + #[link_name = "llvm.loongarch.movgr2fcsr"] + fn __movgr2fcsr(a: i32, b: i32); + #[link_name = "llvm.loongarch.movfcsr2gr"] + fn __movfcsr2gr(a: i32) -> i32; + #[link_name = "llvm.loongarch.iocsrrd.b"] + fn __iocsrrd_b(a: i32) -> i32; + #[link_name = "llvm.loongarch.iocsrrd.h"] + fn __iocsrrd_h(a: i32) -> i32; + #[link_name = "llvm.loongarch.iocsrrd.w"] + fn __iocsrrd_w(a: i32) -> i32; + #[link_name = "llvm.loongarch.iocsrwr.b"] + fn __iocsrwr_b(a: i32, b: i32); + #[link_name = "llvm.loongarch.iocsrwr.h"] + fn __iocsrwr_h(a: i32, b: i32); + #[link_name = "llvm.loongarch.iocsrwr.w"] + fn __iocsrwr_w(a: i32, b: i32); + #[link_name = "llvm.loongarch.break"] + fn __break(a: i32); + #[link_name = "llvm.loongarch.cpucfg"] + fn __cpucfg(a: i32) -> i32; + #[link_name = "llvm.loongarch.syscall"] + fn __syscall(a: i32); + #[link_name = "llvm.loongarch.frecipe.s"] + fn __frecipe_s(a: f32) -> f32; + #[link_name = "llvm.loongarch.frecipe.d"] + fn __frecipe_d(a: f64) -> f64; + #[link_name = "llvm.loongarch.frsqrte.s"] + fn __frsqrte_s(a: f32) -> f32; + #[link_name = "llvm.loongarch.frsqrte.d"] + fn __frsqrte_d(a: f64) -> f64; +} + +/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320) +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn crc_w_b_w(a: i32, b: i32) -> i32 { + unsafe { __crc_w_b_w(a, b) } +} + +/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320) +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn crc_w_h_w(a: i32, b: i32) -> i32 { + unsafe { __crc_w_h_w(a, b) } +} + +/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320) +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn crc_w_w_w(a: i32, b: i32) -> i32 { + unsafe { __crc_w_w_w(a, b) } +} + +/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78) +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn crcc_w_b_w(a: i32, b: i32) -> i32 { + unsafe { __crcc_w_b_w(a, b) } +} + +/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78) +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn crcc_w_h_w(a: i32, b: i32) -> i32 { + unsafe { __crcc_w_h_w(a, b) } +} + +/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78) +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn crcc_w_w_w(a: i32, b: i32) -> i32 { + unsafe { __crcc_w_w_w(a, b) } +} + +/// Generates the memory barrier instruction +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn dbar<const IMM15: i32>() { + static_assert_uimm_bits!(IMM15, 15); + unsafe { __dbar(IMM15) }; +} + +/// Generates the instruction-fetch barrier instruction +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn ibar<const IMM15: i32>() { + static_assert_uimm_bits!(IMM15, 15); + unsafe { __ibar(IMM15) }; +} + +/// Moves data from a GPR to the FCSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn movgr2fcsr<const IMM5: i32>(a: i32) { + static_assert_uimm_bits!(IMM5, 5); + __movgr2fcsr(IMM5, a); +} + +/// Moves data from a FCSR to the GPR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn movfcsr2gr<const IMM5: i32>() -> i32 { + static_assert_uimm_bits!(IMM5, 5); + unsafe { __movfcsr2gr(IMM5) } +} + +/// Reads the 8-bit IO-CSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn iocsrrd_b(a: i32) -> i32 { + __iocsrrd_b(a) +} + +/// Reads the 16-bit IO-CSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn iocsrrd_h(a: i32) -> i32 { + __iocsrrd_h(a) +} + +/// Reads the 32-bit IO-CSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn iocsrrd_w(a: i32) -> i32 { + __iocsrrd_w(a) +} + +/// Writes the 8-bit IO-CSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn iocsrwr_b(a: i32, b: i32) { + __iocsrwr_b(a, b) +} + +/// Writes the 16-bit IO-CSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn iocsrwr_h(a: i32, b: i32) { + __iocsrwr_h(a, b) +} + +/// Writes the 32-bit IO-CSR +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn iocsrwr_w(a: i32, b: i32) { + __iocsrwr_w(a, b) +} + +/// Generates the breakpoint instruction +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn brk<const IMM15: i32>() { + static_assert_uimm_bits!(IMM15, 15); + __break(IMM15); +} + +/// Reads the CPU configuration register +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn cpucfg(a: i32) -> i32 { + unsafe { __cpucfg(a) } +} + +/// Generates the syscall instruction +#[inline] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub unsafe fn syscall<const IMM15: i32>() { + static_assert_uimm_bits!(IMM15, 15); + __syscall(IMM15); +} + +/// Calculate the approximate single-precision result of 1.0 divided +#[inline] +#[target_feature(enable = "frecipe")] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn frecipe_s(a: f32) -> f32 { + unsafe { __frecipe_s(a) } +} + +/// Calculate the approximate double-precision result of 1.0 divided +#[inline] +#[target_feature(enable = "frecipe")] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn frecipe_d(a: f64) -> f64 { + unsafe { __frecipe_d(a) } +} + +/// Calculate the approximate single-precision result of dividing 1.0 by the square root +#[inline] +#[target_feature(enable = "frecipe")] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn frsqrte_s(a: f32) -> f32 { + unsafe { __frsqrte_s(a) } +} + +/// Calculate the approximate double-precision result of dividing 1.0 by the square root +#[inline] +#[target_feature(enable = "frecipe")] +#[unstable(feature = "stdarch_loongarch", issue = "117427")] +pub fn frsqrte_d(a: f64) -> f64 { + unsafe { __frsqrte_d(a) } +} diff --git a/library/stdarch/crates/core_arch/src/mod.rs b/library/stdarch/crates/core_arch/src/mod.rs index f6e959efd47..2105cca1b43 100644 --- a/library/stdarch/crates/core_arch/src/mod.rs +++ b/library/stdarch/crates/core_arch/src/mod.rs @@ -16,6 +16,9 @@ mod riscv_shared; ))] mod arm_shared; +#[cfg(any(target_arch = "loongarch32", target_arch = "loongarch64", doc))] +mod loongarch_shared; + mod simd; #[doc = include_str!("core_arch_docs.md")] @@ -271,13 +274,25 @@ pub mod arch { pub use crate::core_arch::nvptx::*; } - /// Platform-specific intrinsics for the `loongarch` platform. + /// Platform-specific intrinsics for the `loongarch32` platform. + /// + /// See the [module documentation](../index.html) for more details. + #[cfg(any(target_arch = "loongarch32", doc))] + #[doc(cfg(target_arch = "loongarch32"))] + #[unstable(feature = "stdarch_loongarch", issue = "117427")] + pub mod loongarch32 { + pub use crate::core_arch::loongarch_shared::*; + pub use crate::core_arch::loongarch32::*; + } + + /// Platform-specific intrinsics for the `loongarch64` platform. /// /// See the [module documentation](../index.html) for more details. #[cfg(any(target_arch = "loongarch64", doc))] #[doc(cfg(target_arch = "loongarch64"))] #[unstable(feature = "stdarch_loongarch", issue = "117427")] pub mod loongarch64 { + pub use crate::core_arch::loongarch_shared::*; pub use crate::core_arch::loongarch64::*; } @@ -334,6 +349,10 @@ mod powerpc64; #[doc(cfg(target_arch = "nvptx64"))] mod nvptx; +#[cfg(any(target_arch = "loongarch32", doc))] +#[doc(cfg(target_arch = "loongarch32"))] +mod loongarch32; + #[cfg(any(target_arch = "loongarch64", doc))] #[doc(cfg(target_arch = "loongarch64"))] mod loongarch64; diff --git a/library/stdarch/crates/core_arch/src/s390x/vector.rs b/library/stdarch/crates/core_arch/src/s390x/vector.rs index 1cd33c3554b..a09a27a029c 100644 --- a/library/stdarch/crates/core_arch/src/s390x/vector.rs +++ b/library/stdarch/crates/core_arch/src/s390x/vector.rs @@ -1181,6 +1181,20 @@ mod sealed { impl_vec_trait! { [VectorOrc vec_orc]+ 2c (orc) } + // Z vector intrinsic C23 math.h LLVM IR ISO/IEC 60559 operation inexact vfidb parameters + // + // vec_rint rint llvm.rint roundToIntegralExact yes 0, 0 + // vec_roundc nearbyint llvm.nearbyint n/a no 4, 0 + // vec_floor / vec_roundm floor llvm.floor roundToIntegralTowardNegative no 4, 7 + // vec_ceil / vec_roundp ceil llvm.ceil roundToIntegralTowardPositive no 4, 6 + // vec_trunc / vec_roundz trunc llvm.trunc roundToIntegralTowardZero no 4, 5 + // vec_round roundeven llvm.roundeven roundToIntegralTiesToEven no 4, 4 + // n/a round llvm.round roundToIntegralTiesAway no 4, 1 + + // `simd_round_ties_even` is implemented as `llvm.rint`. + test_impl! { vec_rint_f32 (a: vector_float) -> vector_float [simd_round_ties_even, "vector-enhancements-1" vfisb] } + test_impl! { vec_rint_f64 (a: vector_double) -> vector_double [simd_round_ties_even, vfidb] } + test_impl! { vec_roundc_f32 (a: vector_float) -> vector_float [nearbyint_v4f32, "vector-enhancements-1" vfisb] } test_impl! { vec_roundc_f64 (a: vector_double) -> vector_double [nearbyint_v2f64, vfidb] } @@ -1189,9 +1203,6 @@ mod sealed { test_impl! { vec_round_f32 (a: vector_float) -> vector_float [roundeven_v4f32, _] } test_impl! { vec_round_f64 (a: vector_double) -> vector_double [roundeven_v2f64, _] } - test_impl! { vec_rint_f32 (a: vector_float) -> vector_float [simd_round_ties_even, "vector-enhancements-1" vfisb] } - test_impl! { vec_rint_f64 (a: vector_double) -> vector_double [simd_round_ties_even, vfidb] } - #[unstable(feature = "stdarch_s390x", issue = "135681")] pub trait VectorRoundc { unsafe fn vec_roundc(self) -> Self; @@ -2254,14 +2265,14 @@ mod sealed { #[inline] #[target_feature(enable = "vector")] - #[cfg_attr(test, assert_instr("vlbb"))] + #[cfg_attr(test, assert_instr(vlbb))] unsafe fn test_vec_load_bndry(ptr: *const i32) -> MaybeUninit<vector_signed_int> { vector_signed_int::vec_load_bndry::<512>(ptr) } #[inline] #[target_feature(enable = "vector")] - #[cfg_attr(test, assert_instr(vst))] + #[cfg_attr(test, assert_instr(vstl))] unsafe fn test_vec_store_len(vector: vector_signed_int, ptr: *mut i32, byte_count: u32) { vector.vec_store_len(ptr, byte_count) } @@ -2787,11 +2798,11 @@ mod sealed { } test_impl! { vec_vmal_ib(a: vector_signed_char, b: vector_signed_char, c: vector_signed_char) -> vector_signed_char [simd_mladd, vmalb ] } - test_impl! { vec_vmal_ih(a: vector_signed_short, b: vector_signed_short, c: vector_signed_short) -> vector_signed_short[simd_mladd, vmalh ] } + test_impl! { vec_vmal_ih(a: vector_signed_short, b: vector_signed_short, c: vector_signed_short) -> vector_signed_short[simd_mladd, vmalhw ] } test_impl! { vec_vmal_if(a: vector_signed_int, b: vector_signed_int, c: vector_signed_int) -> vector_signed_int [simd_mladd, vmalf ] } test_impl! { vec_vmal_ub(a: vector_unsigned_char, b: vector_unsigned_char, c: vector_unsigned_char) -> vector_unsigned_char [simd_mladd, vmalb ] } - test_impl! { vec_vmal_uh(a: vector_unsigned_short, b: vector_unsigned_short, c: vector_unsigned_short) -> vector_unsigned_short[simd_mladd, vmalh ] } + test_impl! { vec_vmal_uh(a: vector_unsigned_short, b: vector_unsigned_short, c: vector_unsigned_short) -> vector_unsigned_short[simd_mladd, vmalhw ] } test_impl! { vec_vmal_uf(a: vector_unsigned_int, b: vector_unsigned_int, c: vector_unsigned_int) -> vector_unsigned_int [simd_mladd, vmalf ] } impl_mul!([VectorMladd vec_mladd] vec_vmal_ib (vector_signed_char, vector_signed_char, vector_signed_char) -> vector_signed_char ); diff --git a/library/stdarch/crates/core_arch/src/wasm32/mod.rs b/library/stdarch/crates/core_arch/src/wasm32/mod.rs index 2c4361f1639..60049c73295 100644 --- a/library/stdarch/crates/core_arch/src/wasm32/mod.rs +++ b/library/stdarch/crates/core_arch/src/wasm32/mod.rs @@ -191,6 +191,16 @@ unsafe extern "C-unwind" { // #[cfg_attr(test, assert_instr(throw, TAG = 0, ptr = core::ptr::null_mut()))] #[inline] #[unstable(feature = "wasm_exception_handling_intrinsics", issue = "122465")] +// FIXME: Since this instruction unwinds, `core` built with `-C panic=unwind` +// cannot be linked with `-C panic=abort` programs. But that's not +// entirely supported anyway, because runtimes without EH support won't +// be able to handle `try` blocks in `-C panic=unwind` crates either. +// We ship `-C panic=abort` `core`, so this doesn't affect users +// directly. Resolving this will likely require patching out both `try` +// and `throw` instructions, at which point we can look into whitelisting +// this function in the compiler to allow linking. +// See https://github.com/rust-lang/rust/issues/118168. +#[allow(ffi_unwind_calls)] pub unsafe fn throw<const TAG: i32>(ptr: *mut u8) -> ! { static_assert!(TAG == 0); // LLVM only supports tag 0 == C++ right now. wasm_throw(TAG, ptr) diff --git a/library/stdarch/crates/intrinsic-test/src/arm/compile.rs b/library/stdarch/crates/intrinsic-test/src/arm/compile.rs index 8276cd87c1c..48a8ed950e3 100644 --- a/library/stdarch/crates/intrinsic-test/src/arm/compile.rs +++ b/library/stdarch/crates/intrinsic-test/src/arm/compile.rs @@ -1,64 +1,51 @@ -use crate::common::compile_c::CompilationCommandBuilder; -use crate::common::gen_c::compile_c_programs; +use crate::common::cli::ProcessedCli; +use crate::common::compile_c::{CompilationCommandBuilder, CppCompilation}; + +pub fn build_cpp_compilation(config: &ProcessedCli) -> Option<CppCompilation> { + let cpp_compiler = config.cpp_compiler.as_ref()?; -pub fn compile_c_arm( - intrinsics_name_list: &[String], - compiler: &str, - target: &str, - cxx_toolchain_dir: Option<&str>, -) -> bool { // -ffp-contract=off emulates Rust's approach of not fusing separate mul-add operations let mut command = CompilationCommandBuilder::new() .add_arch_flags(vec!["armv8.6-a", "crypto", "crc", "dotprod", "fp16"]) - .set_compiler(compiler) - .set_target(target) + .set_compiler(cpp_compiler) + .set_target(&config.target) .set_opt_level("2") - .set_cxx_toolchain_dir(cxx_toolchain_dir) + .set_cxx_toolchain_dir(config.cxx_toolchain_dir.as_deref()) .set_project_root("c_programs") .add_extra_flags(vec!["-ffp-contract=off", "-Wno-narrowing"]); - if !target.contains("v7") { + if !config.target.contains("v7") { command = command.add_arch_flags(vec!["faminmax", "lut", "sha3"]); } - /* - * clang++ cannot link an aarch64_be object file, so we invoke - * aarch64_be-unknown-linux-gnu's C++ linker. This ensures that we - * are testing the intrinsics against LLVM. - * - * Note: setting `--sysroot=<...>` which is the obvious thing to do - * does not work as it gets caught up with `#include_next <stdlib.h>` - * not existing... - */ - if target.contains("aarch64_be") { - command = command - .set_linker( - cxx_toolchain_dir.unwrap_or("").to_string() + "/bin/aarch64_be-none-linux-gnu-g++", - ) - .set_include_paths(vec![ - "/include", - "/aarch64_be-none-linux-gnu/include", - "/aarch64_be-none-linux-gnu/include/c++/14.2.1", - "/aarch64_be-none-linux-gnu/include/c++/14.2.1/aarch64_be-none-linux-gnu", - "/aarch64_be-none-linux-gnu/include/c++/14.2.1/backward", - "/aarch64_be-none-linux-gnu/libc/usr/include", - ]); - } - - if !compiler.contains("clang") { + if !cpp_compiler.contains("clang") { command = command.add_extra_flag("-flax-vector-conversions"); } - let compiler_commands = intrinsics_name_list - .iter() - .map(|intrinsic_name| { - command - .clone() - .set_input_name(intrinsic_name) - .set_output_name(intrinsic_name) - .make_string() - }) - .collect::<Vec<_>>(); + let mut cpp_compiler = command.into_cpp_compilation(); + + if config.target.contains("aarch64_be") { + let Some(ref cxx_toolchain_dir) = config.cxx_toolchain_dir else { + panic!( + "target `{}` must specify `cxx_toolchain_dir`", + config.target + ) + }; + + cpp_compiler.command_mut().args([ + &format!("--sysroot={cxx_toolchain_dir}/aarch64_be-none-linux-gnu/libc"), + "--include-directory", + &format!("{cxx_toolchain_dir}/aarch64_be-none-linux-gnu/include/c++/14.3.1"), + "--include-directory", + &format!("{cxx_toolchain_dir}/aarch64_be-none-linux-gnu/include/c++/14.3.1/aarch64_be-none-linux-gnu"), + "-L", + &format!("{cxx_toolchain_dir}/lib/gcc/aarch64_be-none-linux-gnu/14.3.1"), + "-L", + &format!("{cxx_toolchain_dir}/aarch64_be-none-linux-gnu/libc/usr/lib"), + "-B", + &format!("{cxx_toolchain_dir}/lib/gcc/aarch64_be-none-linux-gnu/14.3.1"), + ]); + } - compile_c_programs(&compiler_commands) + Some(cpp_compiler) } diff --git a/library/stdarch/crates/intrinsic-test/src/arm/config.rs b/library/stdarch/crates/intrinsic-test/src/arm/config.rs index cee80374ae9..9a7b37253d1 100644 --- a/library/stdarch/crates/intrinsic-test/src/arm/config.rs +++ b/library/stdarch/crates/intrinsic-test/src/arm/config.rs @@ -114,7 +114,6 @@ pub const AARCH_CONFIGURATIONS: &str = r#" #![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_fcma))] #![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_dotprod))] #![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_i8mm))] -#![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_sha3))] #![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_sm4))] #![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_ftts))] #![feature(fmt_helpers_for_derive)] diff --git a/library/stdarch/crates/intrinsic-test/src/arm/intrinsic.rs b/library/stdarch/crates/intrinsic-test/src/arm/intrinsic.rs index 773dabf4d75..16572b2c03f 100644 --- a/library/stdarch/crates/intrinsic-test/src/arm/intrinsic.rs +++ b/library/stdarch/crates/intrinsic-test/src/arm/intrinsic.rs @@ -1,8 +1,8 @@ use crate::common::argument::ArgumentList; use crate::common::indentation::Indentation; use crate::common::intrinsic::{Intrinsic, IntrinsicDefinition}; -use crate::common::intrinsic_helpers::{IntrinsicType, IntrinsicTypeDefinition, TypeKind}; -use std::ops::Deref; +use crate::common::intrinsic_helpers::{IntrinsicType, IntrinsicTypeDefinition, Sign, TypeKind}; +use std::ops::{Deref, DerefMut}; #[derive(Debug, Clone, PartialEq)] pub struct ArmIntrinsicType(pub IntrinsicType); @@ -15,6 +15,12 @@ impl Deref for ArmIntrinsicType { } } +impl DerefMut for ArmIntrinsicType { + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} + impl IntrinsicDefinition<ArmIntrinsicType> for Intrinsic<ArmIntrinsicType> { fn arguments(&self) -> ArgumentList<ArmIntrinsicType> { self.arguments.clone() @@ -73,8 +79,9 @@ impl IntrinsicDefinition<ArmIntrinsicType> for Intrinsic<ArmIntrinsicType> { TypeKind::Float if self.results().inner_size() == 16 => "float16_t".to_string(), TypeKind::Float if self.results().inner_size() == 32 => "float".to_string(), TypeKind::Float if self.results().inner_size() == 64 => "double".to_string(), - TypeKind::Int => format!("int{}_t", self.results().inner_size()), - TypeKind::UInt => format!("uint{}_t", self.results().inner_size()), + TypeKind::Int(Sign::Signed) => format!("int{}_t", self.results().inner_size()), + TypeKind::Int(Sign::Unsigned) => + format!("uint{}_t", self.results().inner_size()), TypeKind::Poly => format!("poly{}_t", self.results().inner_size()), ty => todo!("print_result_c - Unknown type: {:#?}", ty), }, diff --git a/library/stdarch/crates/intrinsic-test/src/arm/json_parser.rs b/library/stdarch/crates/intrinsic-test/src/arm/json_parser.rs index 0ac47484b01..58d366c86a9 100644 --- a/library/stdarch/crates/intrinsic-test/src/arm/json_parser.rs +++ b/library/stdarch/crates/intrinsic-test/src/arm/json_parser.rs @@ -110,7 +110,7 @@ fn json_to_intrinsic( Ok(Intrinsic { name, arguments, - results: *results, + results: results, arch_tags: intr.architectures, }) } diff --git a/library/stdarch/crates/intrinsic-test/src/arm/mod.rs b/library/stdarch/crates/intrinsic-test/src/arm/mod.rs index 6aaa49ff97f..0a64a24e731 100644 --- a/library/stdarch/crates/intrinsic-test/src/arm/mod.rs +++ b/library/stdarch/crates/intrinsic-test/src/arm/mod.rs @@ -4,15 +4,20 @@ mod intrinsic; mod json_parser; mod types; +use std::fs::File; + +use rayon::prelude::*; + +use crate::arm::config::POLY128_OSTREAM_DEF; use crate::common::SupportedArchitectureTest; use crate::common::cli::ProcessedCli; use crate::common::compare::compare_outputs; +use crate::common::gen_c::{write_main_cpp, write_mod_cpp}; use crate::common::gen_rust::compile_rust_programs; use crate::common::intrinsic::{Intrinsic, IntrinsicDefinition}; use crate::common::intrinsic_helpers::TypeKind; -use crate::common::write_file::{write_c_testfiles, write_rust_testfiles}; -use compile::compile_c_arm; -use config::{AARCH_CONFIGURATIONS, F16_FORMATTING_DEF, POLY128_OSTREAM_DEF, build_notices}; +use crate::common::write_file::write_rust_testfiles; +use config::{AARCH_CONFIGURATIONS, F16_FORMATTING_DEF, build_notices}; use intrinsic::ArmIntrinsicType; use json_parser::get_neon_intrinsics; @@ -21,6 +26,13 @@ pub struct ArmArchitectureTest { cli_options: ProcessedCli, } +fn chunk_info(intrinsic_count: usize) -> (usize, usize) { + let available_parallelism = std::thread::available_parallelism().unwrap().get(); + let chunk_size = intrinsic_count.div_ceil(Ord::min(available_parallelism, intrinsic_count)); + + (chunk_size, intrinsic_count.div_ceil(chunk_size)) +} + impl SupportedArchitectureTest for ArmArchitectureTest { fn create(cli_options: ProcessedCli) -> Box<Self> { let a32 = cli_options.target.contains("v7"); @@ -51,33 +63,58 @@ impl SupportedArchitectureTest for ArmArchitectureTest { } fn build_c_file(&self) -> bool { - let compiler = self.cli_options.cpp_compiler.as_deref(); - let target = &self.cli_options.target; - let cxx_toolchain_dir = self.cli_options.cxx_toolchain_dir.as_deref(); let c_target = "aarch64"; + let platform_headers = &["arm_neon.h", "arm_acle.h", "arm_fp16.h"]; - let intrinsics_name_list = write_c_testfiles( - &self - .intrinsics - .iter() - .map(|i| i as &dyn IntrinsicDefinition<_>) - .collect::<Vec<_>>(), - target, + let (chunk_size, chunk_count) = chunk_info(self.intrinsics.len()); + + let cpp_compiler = compile::build_cpp_compilation(&self.cli_options).unwrap(); + + let notice = &build_notices("// "); + self.intrinsics + .par_chunks(chunk_size) + .enumerate() + .map(|(i, chunk)| { + let c_filename = format!("c_programs/mod_{i}.cpp"); + let mut file = File::create(&c_filename).unwrap(); + write_mod_cpp(&mut file, notice, c_target, platform_headers, chunk).unwrap(); + + // compile this cpp file into a .o file + let output = cpp_compiler + .compile_object_file(&format!("mod_{i}.cpp"), &format!("mod_{i}.o"))?; + assert!(output.status.success(), "{output:?}"); + + Ok(()) + }) + .collect::<Result<(), std::io::Error>>() + .unwrap(); + + let mut file = File::create("c_programs/main.cpp").unwrap(); + write_main_cpp( + &mut file, c_target, - &["arm_neon.h", "arm_acle.h", "arm_fp16.h"], - &build_notices("// "), - &[POLY128_OSTREAM_DEF], - ); + POLY128_OSTREAM_DEF, + self.intrinsics.iter().map(|i| i.name.as_str()), + ) + .unwrap(); - match compiler { - None => true, - Some(compiler) => compile_c_arm( - intrinsics_name_list.as_slice(), - compiler, - target, - cxx_toolchain_dir, - ), - } + // compile this cpp file into a .o file + info!("compiling main.cpp"); + let output = cpp_compiler + .compile_object_file("main.cpp", "intrinsic-test-programs.o") + .unwrap(); + assert!(output.status.success(), "{output:?}"); + + let object_files = (0..chunk_count) + .map(|i| format!("mod_{i}.o")) + .chain(["intrinsic-test-programs.o".to_owned()]); + + let output = cpp_compiler + .link_executable(object_files, "intrinsic-test-programs") + .unwrap(); + assert!(output.status.success(), "{output:?}"); + + true } fn build_rust_file(&self) -> bool { @@ -104,7 +141,7 @@ impl SupportedArchitectureTest for ArmArchitectureTest { } fn compare_outputs(&self) -> bool { - if let Some(ref toolchain) = self.cli_options.toolchain { + if self.cli_options.toolchain.is_some() { let intrinsics_name_list = self .intrinsics .iter() @@ -113,8 +150,7 @@ impl SupportedArchitectureTest for ArmArchitectureTest { compare_outputs( &intrinsics_name_list, - toolchain, - &self.cli_options.c_runner, + &self.cli_options.runner, &self.cli_options.target, ) } else { diff --git a/library/stdarch/crates/intrinsic-test/src/arm/types.rs b/library/stdarch/crates/intrinsic-test/src/arm/types.rs index 9f3d6302f46..77f5e8d0e56 100644 --- a/library/stdarch/crates/intrinsic-test/src/arm/types.rs +++ b/library/stdarch/crates/intrinsic-test/src/arm/types.rs @@ -1,6 +1,6 @@ use super::intrinsic::ArmIntrinsicType; use crate::common::cli::Language; -use crate::common::intrinsic_helpers::{IntrinsicType, IntrinsicTypeDefinition, TypeKind}; +use crate::common::intrinsic_helpers::{IntrinsicType, IntrinsicTypeDefinition, Sign, TypeKind}; impl IntrinsicTypeDefinition for ArmIntrinsicType { /// Gets a string containing the typename for this type in C format. @@ -73,8 +73,8 @@ impl IntrinsicTypeDefinition for ArmIntrinsicType { format!( "vld{len}{quad}_{type}{size}", type = match k { - TypeKind::UInt => "u", - TypeKind::Int => "s", + TypeKind::Int(Sign::Unsigned) => "u", + TypeKind::Int(Sign::Signed) => "s", TypeKind::Float => "f", // The ACLE doesn't support 64-bit polynomial loads on Armv7 // if armv7 and bl == 64, use "s", else "p" @@ -107,8 +107,8 @@ impl IntrinsicTypeDefinition for ArmIntrinsicType { format!( "vget{quad}_lane_{type}{size}", type = match k { - TypeKind::UInt => "u", - TypeKind::Int => "s", + TypeKind::Int(Sign::Unsigned) => "u", + TypeKind::Int(Sign::Signed) => "s", TypeKind::Float => "f", TypeKind::Poly => "p", x => todo!("get_load_function TypeKind: {:#?}", x), @@ -121,7 +121,7 @@ impl IntrinsicTypeDefinition for ArmIntrinsicType { } } - fn from_c(s: &str, target: &str) -> Result<Box<Self>, String> { + fn from_c(s: &str, target: &str) -> Result<Self, String> { const CONST_STR: &str = "const"; if let Some(s) = s.strip_suffix('*') { let (s, constant) = match s.trim().strip_suffix(CONST_STR) { @@ -131,9 +131,8 @@ impl IntrinsicTypeDefinition for ArmIntrinsicType { let s = s.trim_end(); let temp_return = ArmIntrinsicType::from_c(s, target); temp_return.map(|mut op| { - let edited = op.as_mut(); - edited.0.ptr = true; - edited.0.ptr_constant = constant; + op.ptr = true; + op.ptr_constant = constant; op }) } else { @@ -163,7 +162,7 @@ impl IntrinsicTypeDefinition for ArmIntrinsicType { ), None => None, }; - Ok(Box::new(ArmIntrinsicType(IntrinsicType { + Ok(ArmIntrinsicType(IntrinsicType { ptr: false, ptr_constant: false, constant, @@ -172,14 +171,14 @@ impl IntrinsicTypeDefinition for ArmIntrinsicType { simd_len, vec_len, target: target.to_string(), - }))) + })) } else { let kind = start.parse::<TypeKind>()?; let bit_len = match kind { - TypeKind::Int => Some(32), + TypeKind::Int(_) => Some(32), _ => None, }; - Ok(Box::new(ArmIntrinsicType(IntrinsicType { + Ok(ArmIntrinsicType(IntrinsicType { ptr: false, ptr_constant: false, constant, @@ -188,7 +187,7 @@ impl IntrinsicTypeDefinition for ArmIntrinsicType { simd_len: None, vec_len: None, target: target.to_string(), - }))) + })) } } } diff --git a/library/stdarch/crates/intrinsic-test/src/common/argument.rs b/library/stdarch/crates/intrinsic-test/src/common/argument.rs index 443ccb919f4..1df4f55995e 100644 --- a/library/stdarch/crates/intrinsic-test/src/common/argument.rs +++ b/library/stdarch/crates/intrinsic-test/src/common/argument.rs @@ -76,7 +76,7 @@ where Argument { pos, name: String::from(var_name), - ty: *ty, + ty: ty, constraint, } } @@ -125,19 +125,23 @@ where /// Creates a line for each argument that initializes an array for C from which `loads` argument /// values can be loaded as a sliding window. /// e.g `const int32x2_t a_vals = {0x3effffff, 0x3effffff, 0x3f7fffff}`, if loads=2. - pub fn gen_arglists_c(&self, indentation: Indentation, loads: u32) -> String { - self.iter() - .filter(|&arg| !arg.has_constraint()) - .map(|arg| { - format!( - "{indentation}const {ty} {name}_vals[] = {values};", - ty = arg.ty.c_scalar_type(), - name = arg.name, - values = arg.ty.populate_random(indentation, loads, &Language::C) - ) - }) - .collect::<Vec<_>>() - .join("\n") + pub fn gen_arglists_c( + &self, + w: &mut impl std::io::Write, + indentation: Indentation, + loads: u32, + ) -> std::io::Result<()> { + for arg in self.iter().filter(|&arg| !arg.has_constraint()) { + writeln!( + w, + "{indentation}const {ty} {name}_vals[] = {values};", + ty = arg.ty.c_scalar_type(), + name = arg.name, + values = arg.ty.populate_random(indentation, loads, &Language::C) + )? + } + + Ok(()) } /// Creates a line for each argument that initializes an array for Rust from which `loads` argument diff --git a/library/stdarch/crates/intrinsic-test/src/common/cli.rs b/library/stdarch/crates/intrinsic-test/src/common/cli.rs index 1d572723008..beae6a4b044 100644 --- a/library/stdarch/crates/intrinsic-test/src/common/cli.rs +++ b/library/stdarch/crates/intrinsic-test/src/common/cli.rs @@ -60,7 +60,7 @@ pub struct ProcessedCli { pub filename: PathBuf, pub toolchain: Option<String>, pub cpp_compiler: Option<String>, - pub c_runner: String, + pub runner: String, pub target: String, pub linker: Option<String>, pub cxx_toolchain_dir: Option<String>, @@ -70,7 +70,7 @@ pub struct ProcessedCli { impl ProcessedCli { pub fn new(cli_options: Cli) -> Self { let filename = cli_options.input; - let c_runner = cli_options.runner.unwrap_or_default(); + let runner = cli_options.runner.unwrap_or_default(); let target = cli_options.target; let linker = cli_options.linker; let cxx_toolchain_dir = cli_options.cxx_toolchain_dir; @@ -102,7 +102,7 @@ impl ProcessedCli { Self { toolchain, cpp_compiler, - c_runner, + runner, target, linker, cxx_toolchain_dir, diff --git a/library/stdarch/crates/intrinsic-test/src/common/compare.rs b/library/stdarch/crates/intrinsic-test/src/common/compare.rs index 9e0cbe8cd6a..cb55922eb19 100644 --- a/library/stdarch/crates/intrinsic-test/src/common/compare.rs +++ b/library/stdarch/crates/intrinsic-test/src/common/compare.rs @@ -2,27 +2,25 @@ use super::cli::FailureReason; use rayon::prelude::*; use std::process::Command; -pub fn compare_outputs( - intrinsic_name_list: &Vec<String>, - toolchain: &str, - runner: &str, - target: &str, -) -> bool { +pub fn compare_outputs(intrinsic_name_list: &Vec<String>, runner: &str, target: &str) -> bool { + fn runner_command(runner: &str) -> Command { + let mut it = runner.split_whitespace(); + let mut cmd = Command::new(it.next().unwrap()); + cmd.args(it); + + cmd + } + let intrinsics = intrinsic_name_list .par_iter() .filter_map(|intrinsic_name| { - let c = Command::new("sh") - .arg("-c") - .arg(format!("{runner} ./c_programs/{intrinsic_name}")) + let c = runner_command(runner) + .arg("./c_programs/intrinsic-test-programs") + .arg(intrinsic_name) .output(); - let rust = Command::new("sh") - .current_dir("rust_programs") - .arg("-c") - .arg(format!( - "cargo {toolchain} run --target {target} --bin {intrinsic_name} --release", - )) - .env("RUSTFLAGS", "-Cdebuginfo=0") + let rust = runner_command(runner) + .arg(format!("target/{target}/release/{intrinsic_name}")) .output(); let (c, rust) = match (c, rust) { @@ -42,8 +40,8 @@ pub fn compare_outputs( if !rust.status.success() { error!( "Failed to run Rust program for intrinsic {intrinsic_name}\nstdout: {stdout}\nstderr: {stderr}", - stdout = std::str::from_utf8(&rust.stdout).unwrap_or(""), - stderr = std::str::from_utf8(&rust.stderr).unwrap_or(""), + stdout = String::from_utf8_lossy(&rust.stdout), + stderr = String::from_utf8_lossy(&rust.stderr), ); return Some(FailureReason::RunRust(intrinsic_name.clone())); } diff --git a/library/stdarch/crates/intrinsic-test/src/common/compile_c.rs b/library/stdarch/crates/intrinsic-test/src/common/compile_c.rs index aebb7b111e2..0c905a149e4 100644 --- a/library/stdarch/crates/intrinsic-test/src/common/compile_c.rs +++ b/library/stdarch/crates/intrinsic-test/src/common/compile_c.rs @@ -5,11 +5,7 @@ pub struct CompilationCommandBuilder { cxx_toolchain_dir: Option<String>, arch_flags: Vec<String>, optimization: String, - include_paths: Vec<String>, project_root: Option<String>, - output: String, - input: String, - linker: Option<String>, extra_flags: Vec<String>, } @@ -21,11 +17,7 @@ impl CompilationCommandBuilder { cxx_toolchain_dir: None, arch_flags: Vec::new(), optimization: "2".to_string(), - include_paths: Vec::new(), project_root: None, - output: String::new(), - input: String::new(), - linker: None, extra_flags: Vec::new(), } } @@ -57,37 +49,12 @@ impl CompilationCommandBuilder { self } - /// Sets a list of include paths for compilation. - /// The paths that are passed must be relative to the - /// "cxx_toolchain_dir" directory path. - pub fn set_include_paths(mut self, paths: Vec<&str>) -> Self { - self.include_paths = paths.into_iter().map(|path| path.to_string()).collect(); - self - } - /// Sets the root path of all the generated test files. pub fn set_project_root(mut self, path: &str) -> Self { self.project_root = Some(path.to_string()); self } - /// The name of the output executable, without any suffixes - pub fn set_output_name(mut self, path: &str) -> Self { - self.output = path.to_string(); - self - } - - /// The name of the input C file, without any suffixes - pub fn set_input_name(mut self, path: &str) -> Self { - self.input = path.to_string(); - self - } - - pub fn set_linker(mut self, linker: String) -> Self { - self.linker = Some(linker); - self - } - pub fn add_extra_flags(mut self, flags: Vec<&str>) -> Self { let mut flags: Vec<String> = flags.into_iter().map(|f| f.to_string()).collect(); self.extra_flags.append(&mut flags); @@ -100,55 +67,69 @@ impl CompilationCommandBuilder { } impl CompilationCommandBuilder { - pub fn make_string(self) -> String { - let arch_flags = self.arch_flags.join("+"); + pub fn into_cpp_compilation(self) -> CppCompilation { + let mut cpp_compiler = std::process::Command::new(self.compiler); + + if let Some(project_root) = self.project_root { + cpp_compiler.current_dir(project_root); + } + let flags = std::env::var("CPPFLAGS").unwrap_or("".into()); - let project_root = self.project_root.unwrap_or_default(); - let project_root_str = project_root.as_str(); - let mut output = self.output.clone(); - if self.linker.is_some() { - output += ".o" - }; - let mut command = format!( - "{} {flags} -march={arch_flags} \ - -O{} \ - -o {project_root}/{} \ - {project_root}/{}.cpp", - self.compiler, self.optimization, output, self.input, - ); - - command = command + " " + self.extra_flags.join(" ").as_str(); + cpp_compiler.args(flags.split_whitespace()); + + cpp_compiler.arg(format!("-march={}", self.arch_flags.join("+"))); + + cpp_compiler.arg(format!("-O{}", self.optimization)); + + cpp_compiler.args(self.extra_flags); if let Some(target) = &self.target { - command = command + " --target=" + target; + cpp_compiler.arg(format!("--target={target}")); } - if let (Some(linker), Some(cxx_toolchain_dir)) = (&self.linker, &self.cxx_toolchain_dir) { - let include_args = self - .include_paths - .iter() - .map(|path| "--include-directory=".to_string() + cxx_toolchain_dir + path) - .collect::<Vec<_>>() - .join(" "); - - command = command - + " -c " - + include_args.as_str() - + " && " - + linker - + " " - + project_root_str - + "/" - + &output - + " -o " - + project_root_str - + "/" - + &self.output - + " && rm " - + project_root_str - + "/" - + &output; - } - command + CppCompilation(cpp_compiler) + } +} + +pub struct CppCompilation(std::process::Command); + +fn clone_command(command: &std::process::Command) -> std::process::Command { + let mut cmd = std::process::Command::new(command.get_program()); + if let Some(current_dir) = command.get_current_dir() { + cmd.current_dir(current_dir); + } + cmd.args(command.get_args()); + + for (key, val) in command.get_envs() { + cmd.env(key, val.unwrap_or_default()); + } + + cmd +} + +impl CppCompilation { + pub fn command_mut(&mut self) -> &mut std::process::Command { + &mut self.0 + } + + pub fn compile_object_file( + &self, + input: &str, + output: &str, + ) -> std::io::Result<std::process::Output> { + let mut cmd = clone_command(&self.0); + cmd.args([input, "-c", "-o", output]); + cmd.output() + } + + pub fn link_executable( + &self, + inputs: impl Iterator<Item = String>, + output: &str, + ) -> std::io::Result<std::process::Output> { + let mut cmd = clone_command(&self.0); + cmd.args(inputs); + cmd.args(["-o", output]); + cmd.output() } } diff --git a/library/stdarch/crates/intrinsic-test/src/common/gen_c.rs b/library/stdarch/crates/intrinsic-test/src/common/gen_c.rs index 1cfb66c39b9..905efb6d890 100644 --- a/library/stdarch/crates/intrinsic-test/src/common/gen_c.rs +++ b/library/stdarch/crates/intrinsic-test/src/common/gen_c.rs @@ -1,8 +1,3 @@ -use itertools::Itertools; -use rayon::prelude::*; -use std::collections::BTreeMap; -use std::process::Command; - use super::argument::Argument; use super::indentation::Indentation; use super::intrinsic::IntrinsicDefinition; @@ -11,104 +6,16 @@ use super::intrinsic_helpers::IntrinsicTypeDefinition; // The number of times each intrinsic will be called. const PASSES: u32 = 20; -// Formats the main C program template with placeholders -pub fn format_c_main_template( - notices: &str, - header_files: &[&str], - arch_identifier: &str, - arch_specific_definitions: &[&str], - arglists: &str, - passes: &str, -) -> String { - format!( - r#"{notices}{header_files} -#include <iostream> -#include <cstring> -#include <iomanip> -#include <sstream> - -template<typename T1, typename T2> T1 cast(T2 x) {{ - static_assert(sizeof(T1) == sizeof(T2), "sizeof T1 and T2 must be the same"); - T1 ret{{}}; - memcpy(&ret, &x, sizeof(T1)); - return ret; -}} - -std::ostream& operator<<(std::ostream& os, float16_t value) {{ - uint16_t temp = 0; - memcpy(&temp, &value, sizeof(float16_t)); - std::stringstream ss; - ss << "0x" << std::setfill('0') << std::setw(4) << std::hex << temp; - os << ss.str(); - return os; -}} - -#ifdef __{arch_identifier}__ -{arch_specific_definitions} -#endif - -{arglists} - -int main(int argc, char **argv) {{ -{passes} - return 0; -}}"#, - header_files = header_files - .iter() - .map(|header| format!("#include <{header}>")) - .collect::<Vec<_>>() - .join("\n"), - arch_specific_definitions = arch_specific_definitions.join("\n"), - ) -} - -pub fn compile_c_programs(compiler_commands: &[String]) -> bool { - compiler_commands - .par_iter() - .map(|compiler_command| { - let output = Command::new("sh").arg("-c").arg(compiler_command).output(); - if let Ok(output) = output { - if output.status.success() { - true - } else { - error!( - "Failed to compile code for intrinsics: \n\nstdout:\n{}\n\nstderr:\n{}", - std::str::from_utf8(&output.stdout).unwrap_or(""), - std::str::from_utf8(&output.stderr).unwrap_or("") - ); - false - } - } else { - error!("Command failed: {output:#?}"); - false - } - }) - .find_any(|x| !x) - .is_none() -} - -// Creates directory structure and file path mappings -pub fn setup_c_file_paths(identifiers: &Vec<String>) -> BTreeMap<&String, String> { - let _ = std::fs::create_dir("c_programs"); - identifiers - .par_iter() - .map(|identifier| { - let c_filename = format!(r#"c_programs/{identifier}.cpp"#); - - (identifier, c_filename) - }) - .collect::<BTreeMap<&String, String>>() -} - pub fn generate_c_test_loop<T: IntrinsicTypeDefinition + Sized>( + w: &mut impl std::io::Write, intrinsic: &dyn IntrinsicDefinition<T>, indentation: Indentation, additional: &str, passes: u32, - _target: &str, -) -> String { +) -> std::io::Result<()> { let body_indentation = indentation.nested(); - format!( + writeln!( + w, "{indentation}for (int i=0; i<{passes}; i++) {{\n\ {loaded_args}\ {body_indentation}auto __return_value = {intrinsic_call}({args});\n\ @@ -121,78 +28,172 @@ pub fn generate_c_test_loop<T: IntrinsicTypeDefinition + Sized>( ) } -pub fn generate_c_constraint_blocks<T: IntrinsicTypeDefinition>( +pub fn generate_c_constraint_blocks<'a, T: IntrinsicTypeDefinition + 'a>( + w: &mut impl std::io::Write, intrinsic: &dyn IntrinsicDefinition<T>, indentation: Indentation, - constraints: &[&Argument<T>], + constraints: &mut (impl Iterator<Item = &'a Argument<T>> + Clone), name: String, - target: &str, -) -> String { - if let Some((current, constraints)) = constraints.split_last() { - let range = current - .constraint - .iter() - .map(|c| c.to_range()) - .flat_map(|r| r.into_iter()); - - let body_indentation = indentation.nested(); - range - .map(|i| { - format!( - "{indentation}{{\n\ - {body_indentation}{ty} {name} = {val};\n\ - {pass}\n\ - {indentation}}}", - name = current.name, - ty = current.ty.c_type(), - val = i, - pass = generate_c_constraint_blocks( - intrinsic, - body_indentation, - constraints, - format!("{name}-{i}"), - target, - ) - ) - }) - .join("\n") - } else { - generate_c_test_loop(intrinsic, indentation, &name, PASSES, target) +) -> std::io::Result<()> { + let Some(current) = constraints.next() else { + return generate_c_test_loop(w, intrinsic, indentation, &name, PASSES); + }; + + let body_indentation = indentation.nested(); + for i in current.constraint.iter().flat_map(|c| c.to_range()) { + let ty = current.ty.c_type(); + + writeln!(w, "{indentation}{{")?; + writeln!(w, "{body_indentation}{ty} {} = {i};", current.name)?; + + generate_c_constraint_blocks( + w, + intrinsic, + body_indentation, + &mut constraints.clone(), + format!("{name}-{i}"), + )?; + + writeln!(w, "{indentation}}}")?; } + + Ok(()) } // Compiles C test programs using specified compiler -pub fn create_c_test_program<T: IntrinsicTypeDefinition>( +pub fn create_c_test_function<T: IntrinsicTypeDefinition>( + w: &mut impl std::io::Write, intrinsic: &dyn IntrinsicDefinition<T>, - header_files: &[&str], - target: &str, - c_target: &str, - notices: &str, - arch_specific_definitions: &[&str], -) -> String { +) -> std::io::Result<()> { + let indentation = Indentation::default(); + + writeln!(w, "int run_{}() {{", intrinsic.name())?; + + // Define the arrays of arguments. let arguments = intrinsic.arguments(); - let constraints = arguments - .iter() - .filter(|&i| i.has_constraint()) - .collect_vec(); + arguments.gen_arglists_c(w, indentation.nested(), PASSES)?; - let indentation = Indentation::default(); - format_c_main_template( - notices, - header_files, - c_target, - arch_specific_definitions, - intrinsic - .arguments() - .gen_arglists_c(indentation, PASSES) - .as_str(), - generate_c_constraint_blocks( - intrinsic, - indentation.nested(), - constraints.as_slice(), - Default::default(), - target, - ) - .as_str(), - ) + generate_c_constraint_blocks( + w, + intrinsic, + indentation.nested(), + &mut arguments.iter().rev().filter(|&i| i.has_constraint()), + Default::default(), + )?; + + writeln!(w, " return 0;")?; + writeln!(w, "}}")?; + + Ok(()) +} + +pub fn write_mod_cpp<T: IntrinsicTypeDefinition>( + w: &mut impl std::io::Write, + notice: &str, + architecture: &str, + platform_headers: &[&str], + intrinsics: &[impl IntrinsicDefinition<T>], +) -> std::io::Result<()> { + write!(w, "{notice}")?; + + for header in platform_headers { + writeln!(w, "#include <{header}>")?; + } + + writeln!( + w, + r#" +#include <iostream> +#include <cstring> +#include <iomanip> +#include <sstream> + +template<typename T1, typename T2> T1 cast(T2 x) {{ + static_assert(sizeof(T1) == sizeof(T2), "sizeof T1 and T2 must be the same"); + T1 ret{{}}; + memcpy(&ret, &x, sizeof(T1)); + return ret; +}} + +std::ostream& operator<<(std::ostream& os, float16_t value); + + + +"# + )?; + + writeln!(w, "#ifdef __{architecture}__")?; + writeln!( + w, + "std::ostream& operator<<(std::ostream& os, poly128_t value);" + )?; + writeln!(w, "#endif")?; + + for intrinsic in intrinsics { + create_c_test_function(w, intrinsic)?; + } + + Ok(()) +} + +pub fn write_main_cpp<'a>( + w: &mut impl std::io::Write, + architecture: &str, + arch_specific_definitions: &str, + intrinsics: impl Iterator<Item = &'a str> + Clone, +) -> std::io::Result<()> { + writeln!(w, "#include <iostream>")?; + writeln!(w, "#include <string>")?; + + for header in ["arm_neon.h", "arm_acle.h", "arm_fp16.h"] { + writeln!(w, "#include <{header}>")?; + } + + writeln!( + w, + r#" +#include <cstring> +#include <iomanip> +#include <sstream> + +std::ostream& operator<<(std::ostream& os, float16_t value) {{ + uint16_t temp = 0; + memcpy(&temp, &value, sizeof(float16_t)); + std::stringstream ss; + ss << "0x" << std::setfill('0') << std::setw(4) << std::hex << temp; + os << ss.str(); + return os; +}} +"# + )?; + + writeln!(w, "#ifdef __{architecture}__")?; + writeln!(w, "{arch_specific_definitions }")?; + writeln!(w, "#endif")?; + + for intrinsic in intrinsics.clone() { + writeln!(w, "extern int run_{intrinsic}(void);")?; + } + + writeln!(w, "int main(int argc, char **argv) {{")?; + writeln!(w, " std::string intrinsic_name = argv[1];")?; + + writeln!(w, " if (false) {{")?; + + for intrinsic in intrinsics { + writeln!(w, " }} else if (intrinsic_name == \"{intrinsic}\") {{")?; + writeln!(w, " return run_{intrinsic}();")?; + } + + writeln!(w, " }} else {{")?; + writeln!( + w, + " std::cerr << \"Unknown command: \" << intrinsic_name << \"\\n\";" + )?; + writeln!(w, " return -1;")?; + writeln!(w, " }}")?; + + writeln!(w, "}}")?; + + Ok(()) } diff --git a/library/stdarch/crates/intrinsic-test/src/common/gen_rust.rs b/library/stdarch/crates/intrinsic-test/src/common/gen_rust.rs index 52bccaf905c..0e4a95ab528 100644 --- a/library/stdarch/crates/intrinsic-test/src/common/gen_rust.rs +++ b/library/stdarch/crates/intrinsic-test/src/common/gen_rust.rs @@ -2,7 +2,6 @@ use itertools::Itertools; use rayon::prelude::*; use std::collections::BTreeMap; use std::fs::File; -use std::io::Write; use std::process::Command; use super::argument::Argument; @@ -23,8 +22,8 @@ pub fn format_rust_main_template( ) -> String { format!( r#"{notices}#![feature(simd_ffi)] -#![feature(link_llvm_intrinsics)] #![feature(f16)] +#![allow(unused)] {configurations} {definitions} @@ -38,6 +37,42 @@ fn main() {{ ) } +fn write_cargo_toml(w: &mut impl std::io::Write, binaries: &[String]) -> std::io::Result<()> { + writeln!( + w, + concat!( + "[package]\n", + "name = \"intrinsic-test-programs\"\n", + "version = \"{version}\"\n", + "authors = [{authors}]\n", + "license = \"{license}\"\n", + "edition = \"2018\"\n", + "[workspace]\n", + "[dependencies]\n", + "core_arch = {{ path = \"../crates/core_arch\" }}", + ), + version = env!("CARGO_PKG_VERSION"), + authors = env!("CARGO_PKG_AUTHORS") + .split(":") + .format_with(", ", |author, fmt| fmt(&format_args!("\"{author}\""))), + license = env!("CARGO_PKG_LICENSE"), + )?; + + for binary in binaries { + writeln!( + w, + concat!( + "[[bin]]\n", + "name = \"{binary}\"\n", + "path = \"{binary}/main.rs\"\n", + ), + binary = binary, + )?; + } + + Ok(()) +} + pub fn compile_rust_programs( binaries: Vec<String>, toolchain: Option<&str>, @@ -45,56 +80,20 @@ pub fn compile_rust_programs( linker: Option<&str>, ) -> bool { let mut cargo = File::create("rust_programs/Cargo.toml").unwrap(); - cargo - .write_all( - format!( - r#"[package] -name = "intrinsic-test-programs" -version = "{version}" -authors = [{authors}] -license = "{license}" -edition = "2018" -[workspace] -[dependencies] -core_arch = {{ path = "../crates/core_arch" }} -{binaries}"#, - version = env!("CARGO_PKG_VERSION"), - authors = env!("CARGO_PKG_AUTHORS") - .split(":") - .format_with(", ", |author, fmt| fmt(&format_args!("\"{author}\""))), - license = env!("CARGO_PKG_LICENSE"), - binaries = binaries - .iter() - .map(|binary| { - format!( - r#"[[bin]] -name = "{binary}" -path = "{binary}/main.rs""#, - ) - }) - .collect::<Vec<_>>() - .join("\n") - ) - .into_bytes() - .as_slice(), - ) - .unwrap(); - - let toolchain = match toolchain { - None => return true, - Some(t) => t, - }; + write_cargo_toml(&mut cargo, &binaries).unwrap(); /* If there has been a linker explicitly set from the command line then * we want to set it via setting it in the RUSTFLAGS*/ - let cargo_command = format!("cargo {toolchain} build --target {target} --release"); + let mut cargo_command = Command::new("cargo"); + cargo_command.current_dir("rust_programs"); - let mut command = Command::new("sh"); - command - .current_dir("rust_programs") - .arg("-c") - .arg(cargo_command); + if let Some(toolchain) = toolchain { + if !toolchain.is_empty() { + cargo_command.arg(toolchain); + } + } + cargo_command.args(["build", "--target", target, "--release"]); let mut rust_flags = "-Cdebuginfo=0".to_string(); if let Some(linker) = linker { @@ -102,11 +101,11 @@ path = "{binary}/main.rs""#, rust_flags.push_str(linker); rust_flags.push_str(" -C link-args=-static"); - command.env("CPPFLAGS", "-fuse-ld=lld"); + cargo_command.env("CPPFLAGS", "-fuse-ld=lld"); } - command.env("RUSTFLAGS", rust_flags); - let output = command.output(); + cargo_command.env("RUSTFLAGS", rust_flags); + let output = cargo_command.output(); if let Ok(output) = output { if output.status.success() { diff --git a/library/stdarch/crates/intrinsic-test/src/common/intrinsic_helpers.rs b/library/stdarch/crates/intrinsic-test/src/common/intrinsic_helpers.rs index 3d200b19461..697f9c8754d 100644 --- a/library/stdarch/crates/intrinsic-test/src/common/intrinsic_helpers.rs +++ b/library/stdarch/crates/intrinsic-test/src/common/intrinsic_helpers.rs @@ -9,13 +9,21 @@ use super::indentation::Indentation; use super::values::value_for_array; #[derive(Debug, PartialEq, Copy, Clone)] +pub enum Sign { + Signed, + Unsigned, +} + +#[derive(Debug, PartialEq, Copy, Clone)] pub enum TypeKind { BFloat, Float, - Int, - UInt, + Int(Sign), + Char(Sign), Poly, Void, + Mask, + Vector, } impl FromStr for TypeKind { @@ -23,12 +31,17 @@ impl FromStr for TypeKind { fn from_str(s: &str) -> Result<Self, Self::Err> { match s { - "bfloat" => Ok(Self::BFloat), - "float" => Ok(Self::Float), - "int" => Ok(Self::Int), + "bfloat" | "BF16" => Ok(Self::BFloat), + "float" | "double" | "FP16" | "FP32" | "FP64" => Ok(Self::Float), + "int" | "long" | "short" | "SI8" | "SI16" | "SI32" | "SI64" => { + Ok(Self::Int(Sign::Signed)) + } "poly" => Ok(Self::Poly), - "uint" | "unsigned" => Ok(Self::UInt), + "char" => Ok(Self::Char(Sign::Signed)), + "uint" | "unsigned" | "UI8" | "UI16" | "UI32" | "UI64" => Ok(Self::Int(Sign::Unsigned)), "void" => Ok(Self::Void), + "MASK" => Ok(Self::Mask), + "M64" | "M128" | "M256" | "M512" => Ok(Self::Vector), _ => Err(format!("Impossible to parse argument kind {s}")), } } @@ -42,10 +55,14 @@ impl fmt::Display for TypeKind { match self { Self::BFloat => "bfloat", Self::Float => "float", - Self::Int => "int", - Self::UInt => "uint", + Self::Int(Sign::Signed) => "int", + Self::Int(Sign::Unsigned) => "uint", Self::Poly => "poly", Self::Void => "void", + Self::Char(Sign::Signed) => "char", + Self::Char(Sign::Unsigned) => "unsigned char", + Self::Mask => "mask", + Self::Vector => "vector", } ) } @@ -56,9 +73,10 @@ impl TypeKind { pub fn c_prefix(&self) -> &str { match self { Self::Float => "float", - Self::Int => "int", - Self::UInt => "uint", + Self::Int(Sign::Signed) => "int", + Self::Int(Sign::Unsigned) => "uint", Self::Poly => "poly", + Self::Char(Sign::Signed) => "char", _ => unreachable!("Not used: {:#?}", self), } } @@ -66,10 +84,13 @@ impl TypeKind { /// Gets the rust prefix for the type kind i.e. i, u, f. pub fn rust_prefix(&self) -> &str { match self { + Self::BFloat => "bf", Self::Float => "f", - Self::Int => "i", - Self::UInt => "u", + Self::Int(Sign::Signed) => "i", + Self::Int(Sign::Unsigned) => "u", Self::Poly => "u", + Self::Char(Sign::Unsigned) => "u", + Self::Char(Sign::Signed) => "i", _ => unreachable!("Unused type kind: {:#?}", self), } } @@ -133,11 +154,14 @@ impl IntrinsicType { } pub fn c_scalar_type(&self) -> String { - format!( - "{prefix}{bits}_t", - prefix = self.kind().c_prefix(), - bits = self.inner_size() - ) + match self.kind() { + TypeKind::Char(_) => String::from("char"), + _ => format!( + "{prefix}{bits}_t", + prefix = self.kind().c_prefix(), + bits = self.inner_size() + ), + } } pub fn rust_scalar_type(&self) -> String { @@ -155,8 +179,8 @@ impl IntrinsicType { bit_len: Some(8), .. } => match kind { - TypeKind::Int => "(int)", - TypeKind::UInt => "(unsigned int)", + TypeKind::Int(Sign::Signed) => "(int)", + TypeKind::Int(Sign::Unsigned) => "(unsigned int)", TypeKind::Poly => "(unsigned int)(uint8_t)", _ => "", }, @@ -172,6 +196,21 @@ impl IntrinsicType { 128 => "", _ => panic!("invalid bit_len"), }, + IntrinsicType { + kind: TypeKind::Float, + bit_len: Some(bit_len), + .. + } => match bit_len { + 16 => "(float16_t)", + 32 => "(float)", + 64 => "(double)", + 128 => "", + _ => panic!("invalid bit_len"), + }, + IntrinsicType { + kind: TypeKind::Char(_), + .. + } => "(char)", _ => "", } } @@ -185,7 +224,7 @@ impl IntrinsicType { match self { IntrinsicType { bit_len: Some(bit_len @ (8 | 16 | 32 | 64)), - kind: kind @ (TypeKind::Int | TypeKind::UInt | TypeKind::Poly), + kind: kind @ (TypeKind::Int(_) | TypeKind::Poly | TypeKind::Char(_)), simd_len, vec_len, .. @@ -201,7 +240,8 @@ impl IntrinsicType { .format_with(",\n", |i, fmt| { let src = value_for_array(*bit_len, i); assert!(src == 0 || src.ilog2() < *bit_len); - if *kind == TypeKind::Int && (src >> (*bit_len - 1)) != 0 { + if *kind == TypeKind::Int(Sign::Signed) && (src >> (*bit_len - 1)) != 0 + { // `src` is a two's complement representation of a negative value. let mask = !0u64 >> (64 - *bit_len); let ones_compl = src ^ mask; @@ -257,7 +297,7 @@ impl IntrinsicType { .. } => false, IntrinsicType { - kind: TypeKind::Int | TypeKind::UInt | TypeKind::Poly, + kind: TypeKind::Int(_) | TypeKind::Poly, .. } => true, _ => unimplemented!(), @@ -282,7 +322,9 @@ pub trait IntrinsicTypeDefinition: Deref<Target = IntrinsicType> { fn get_lane_function(&self) -> String; /// can be implemented in an `impl` block - fn from_c(_s: &str, _target: &str) -> Result<Box<Self>, String>; + fn from_c(_s: &str, _target: &str) -> Result<Self, String> + where + Self: Sized; /// Gets a string containing the typename for this type in C format. /// can be directly defined in `impl` blocks diff --git a/library/stdarch/crates/intrinsic-test/src/common/write_file.rs b/library/stdarch/crates/intrinsic-test/src/common/write_file.rs index 0ba3e829a6b..92dd70b7c57 100644 --- a/library/stdarch/crates/intrinsic-test/src/common/write_file.rs +++ b/library/stdarch/crates/intrinsic-test/src/common/write_file.rs @@ -1,5 +1,3 @@ -use super::gen_c::create_c_test_program; -use super::gen_c::setup_c_file_paths; use super::gen_rust::{create_rust_test_program, setup_rust_file_paths}; use super::intrinsic::IntrinsicDefinition; use super::intrinsic_helpers::IntrinsicTypeDefinition; @@ -11,37 +9,6 @@ pub fn write_file(filename: &String, code: String) { file.write_all(code.into_bytes().as_slice()).unwrap(); } -pub fn write_c_testfiles<T: IntrinsicTypeDefinition + Sized>( - intrinsics: &Vec<&dyn IntrinsicDefinition<T>>, - target: &str, - c_target: &str, - headers: &[&str], - notice: &str, - arch_specific_definitions: &[&str], -) -> Vec<String> { - let intrinsics_name_list = intrinsics - .iter() - .map(|i| i.name().clone()) - .collect::<Vec<_>>(); - let filename_mapping = setup_c_file_paths(&intrinsics_name_list); - - intrinsics.iter().for_each(|&i| { - let c_code = create_c_test_program( - i, - headers, - target, - c_target, - notice, - arch_specific_definitions, - ); - if let Some(filename) = filename_mapping.get(&i.name()) { - write_file(filename, c_code) - }; - }); - - intrinsics_name_list -} - pub fn write_rust_testfiles<T: IntrinsicTypeDefinition>( intrinsics: Vec<&dyn IntrinsicDefinition<T>>, rust_target: &str, diff --git a/library/stdarch/crates/intrinsic-test/src/main.rs b/library/stdarch/crates/intrinsic-test/src/main.rs index 054138a0dba..538f317a297 100644 --- a/library/stdarch/crates/intrinsic-test/src/main.rs +++ b/library/stdarch/crates/intrinsic-test/src/main.rs @@ -30,12 +30,15 @@ fn main() { let test_environment = test_environment_result.unwrap(); + info!("building C binaries"); if !test_environment.build_c_file() { std::process::exit(2); } + info!("building Rust binaries"); if !test_environment.build_rust_file() { std::process::exit(3); } + info!("comaparing outputs"); if !test_environment.compare_outputs() { std::process::exit(1); } diff --git a/library/stdarch/crates/simd-test-macro/src/lib.rs b/library/stdarch/crates/simd-test-macro/src/lib.rs index 855e969e1eb..b18e2d6b63e 100644 --- a/library/stdarch/crates/simd-test-macro/src/lib.rs +++ b/library/stdarch/crates/simd-test-macro/src/lib.rs @@ -57,12 +57,12 @@ pub fn simd_test( .unwrap_or_else(|| panic!("target triple contained no \"-\": {target}")) { "i686" | "x86_64" | "i586" => "is_x86_feature_detected", - "arm" | "armv7" => "is_arm_feature_detected", + "arm" | "armv7" | "thumbv7neon" => "is_arm_feature_detected", "aarch64" | "arm64ec" | "aarch64_be" => "is_aarch64_feature_detected", maybe_riscv if maybe_riscv.starts_with("riscv") => "is_riscv_feature_detected", "powerpc" | "powerpcle" => "is_powerpc_feature_detected", "powerpc64" | "powerpc64le" => "is_powerpc64_feature_detected", - "loongarch64" => "is_loongarch_feature_detected", + "loongarch32" | "loongarch64" => "is_loongarch_feature_detected", "s390x" => "is_s390x_feature_detected", t => panic!("unknown target: {t}"), }; diff --git a/library/stdarch/crates/std_detect/Cargo.toml b/library/stdarch/crates/std_detect/Cargo.toml deleted file mode 100644 index f990e724125..00000000000 --- a/library/stdarch/crates/std_detect/Cargo.toml +++ /dev/null @@ -1,41 +0,0 @@ -[package] -name = "std_detect" -version = "0.1.5" -authors = [ - "Alex Crichton <alex@alexcrichton.com>", - "Andrew Gallant <jamslam@gmail.com>", - "Gonzalo Brito Gadeschi <gonzalobg88@gmail.com>", -] -description = "`std::detect` - Rust's standard library run-time CPU feature detection." -homepage = "https://github.com/rust-lang/stdarch" -repository = "https://github.com/rust-lang/stdarch" -readme = "README.md" -keywords = ["std", "run-time", "feature", "detection"] -categories = ["hardware-support"] -license = "MIT OR Apache-2.0" -edition = "2024" - -[badges] -is-it-maintained-issue-resolution = { repository = "rust-lang/stdarch" } -is-it-maintained-open-issues = { repository = "rust-lang/stdarch" } -maintenance = { status = "experimental" } - -[dependencies] -cfg-if = "1.0.0" - -# When built as part of libstd -core = { version = "1.0.0", optional = true, package = "rustc-std-workspace-core" } -alloc = { version = "1.0.0", optional = true, package = "rustc-std-workspace-alloc" } - -[target.'cfg(not(windows))'.dependencies] -libc = { version = "0.2.0", optional = true, default-features = false } - -[features] -default = [ "std_detect_dlsym_getauxval", "std_detect_file_io" ] -std_detect_file_io = [ "libc" ] -std_detect_dlsym_getauxval = [ "libc" ] -std_detect_env_override = [ "libc" ] -rustc-dep-of-std = [ - "core", - "alloc", -] diff --git a/library/stdarch/crates/std_detect/LICENSE-APACHE b/library/stdarch/crates/std_detect/LICENSE-APACHE deleted file mode 100644 index 16fe87b06e8..00000000000 --- a/library/stdarch/crates/std_detect/LICENSE-APACHE +++ /dev/null @@ -1,201 +0,0 @@ - Apache License - Version 2.0, January 2004 - http://www.apache.org/licenses/ - -TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION - -1. 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IN NO EVENT -SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY -CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR -IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -DEALINGS IN THE SOFTWARE. diff --git a/library/stdarch/crates/std_detect/README.md b/library/stdarch/crates/std_detect/README.md deleted file mode 100644 index 091f5542e0e..00000000000 --- a/library/stdarch/crates/std_detect/README.md +++ /dev/null @@ -1,93 +0,0 @@ -`std::detect` - Rust's standard library run-time CPU feature detection -======= - -The private `std::detect` module implements run-time feature detection in Rust's -standard library. This allows detecting whether the CPU the binary runs on -supports certain features, like SIMD instructions. - -# Usage - -`std::detect` APIs are available as part of `libstd`. Prefer using it via the -standard library than through this crate. Unstable features of `std::detect` are -available on nightly Rust behind various feature-gates. - -If you need run-time feature detection in `#[no_std]` environments, Rust `core` -library cannot help you. By design, Rust `core` is platform independent, but -performing run-time feature detection requires a certain level of cooperation -from the platform. - -You can then manually include `std_detect` as a dependency to get similar -run-time feature detection support than the one offered by Rust's standard -library. We intend to make `std_detect` more flexible and configurable in this -regard to better serve the needs of `#[no_std]` targets. - -# Features - -* `std_detect_dlsym_getauxval` (enabled by default, requires `libc`): Enable to -use `libc::dlsym` to query whether [`getauxval`] is linked into the binary. When -this is not the case, this feature allows other fallback methods to perform -run-time feature detection. When this feature is disabled, `std_detect` assumes -that [`getauxval`] is linked to the binary. If that is not the case the behavior -is undefined. - - Note: This feature is ignored on `*-linux-{gnu,musl,ohos}*` and `*-android*` targets - because we can safely assume `getauxval` is linked to the binary. - * `*-linux-gnu*` targets ([since Rust 1.64](https://blog.rust-lang.org/2022/08/01/Increasing-glibc-kernel-requirements.html)) - have glibc requirements higher than [glibc 2.16 that added `getauxval`](https://sourceware.org/legacy-ml/libc-announce/2012/msg00000.html). - * `*-linux-musl*` targets ([at least since Rust 1.15](https://github.com/rust-lang/rust/blob/1.15.0/src/ci/docker/x86_64-musl/build-musl.sh#L15)) - use musl newer than [musl 1.1.0 that added `getauxval`](https://git.musl-libc.org/cgit/musl/tree/WHATSNEW?h=v1.1.0#n1197) - * `*-linux-ohos*` targets use a [fork of musl 1.2](https://gitee.com/openharmony/docs/blob/master/en/application-dev/reference/native-lib/musl.md) - * `*-android*` targets ([since Rust 1.68](https://blog.rust-lang.org/2023/01/09/android-ndk-update-r25.html)) - have the minimum supported API level higher than [Android 4.3 (API level 18) that added `getauxval`](https://github.com/aosp-mirror/platform_bionic/blob/d3ebc2f7c49a9893b114124d4a6b315f3a328764/libc/include/sys/auxv.h#L49). - -* `std_detect_file_io` (enabled by default, requires `std`): Enable to perform run-time feature -detection using file APIs (e.g. `/proc/self/auxv`, etc.) if other more performant -methods fail. This feature requires `libstd` as a dependency, preventing the -crate from working on applications in which `std` is not available. - -[`getauxval`]: https://man7.org/linux/man-pages/man3/getauxval.3.html - -# Platform support - -* All `x86`/`x86_64` targets are supported on all platforms by querying the - `cpuid` instruction directly for the features supported by the hardware and - the operating system. `std_detect` assumes that the binary is an user-space - application. - -* Linux/Android: - * `arm{32, 64}`, `mips{32,64}{,el}`, `powerpc{32,64}{,le}`, `loongarch64`, `s390x`: - `std_detect` supports these on Linux by querying ELF auxiliary vectors (using `getauxval` - when available), and if that fails, by querying `/proc/self/auxv`. - * `arm64`: partial support for doing run-time feature detection by directly - querying `mrs` is implemented for Linux >= 4.11, but not enabled by default. - * `riscv{32,64}`: - `std_detect` supports these on Linux by querying `riscv_hwprobe`, and - by querying ELF auxiliary vectors (using `getauxval` when available). - -* FreeBSD: - * `arm32`, `powerpc64`: `std_detect` supports these on FreeBSD by querying ELF - auxiliary vectors using `sysctl`. - * `arm64`: run-time feature detection is implemented by directly querying `mrs`. - -* OpenBSD: - * `arm64`: run-time feature detection is implemented by querying `sysctl`. - -* Windows: - * `arm64`: run-time feature detection is implemented by querying `IsProcessorFeaturePresent`. - -# License - -This project is licensed under either of - - * Apache License, Version 2.0, ([LICENSE-APACHE](LICENSE-APACHE) or - http://www.apache.org/licenses/LICENSE-2.0) - * MIT license ([LICENSE-MIT](LICENSE-MIT) or - http://opensource.org/licenses/MIT) - -at your option. - -# Contribution - -Unless you explicitly state otherwise, any contribution intentionally submitted -for inclusion in `std_detect` by you, as defined in the Apache-2.0 license, -shall be dual licensed as above, without any additional terms or conditions. diff --git a/library/stdarch/crates/std_detect/src/detect/arch/aarch64.rs b/library/stdarch/crates/std_detect/src/detect/arch/aarch64.rs deleted file mode 100644 index 13570a25c1c..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/aarch64.rs +++ /dev/null @@ -1,259 +0,0 @@ -//! Aarch64 run-time features. - -features! { - @TARGET: aarch64; - @CFG: any(target_arch = "aarch64", target_arch = "arm64ec"); - @MACRO_NAME: is_aarch64_feature_detected; - @MACRO_ATTRS: - /// This macro tests, at runtime, whether an `aarch64` feature is enabled on aarch64 platforms. - /// Currently most features are only supported on linux-based platforms. - /// - /// This macro takes one argument which is a string literal of the feature being tested for. - /// The feature names are mostly taken from their FEAT_* definitions in the [ARM Architecture - /// Reference Manual][docs]. - /// - /// ## Supported arguments - /// - /// * `"aes"` - FEAT_AES & FEAT_PMULL - /// * `"asimd"` or "neon" - FEAT_AdvSIMD - /// * `"bf16"` - FEAT_BF16 - /// * `"bti"` - FEAT_BTI - /// * `"crc"` - FEAT_CRC - /// * `"cssc"` - FEAT_CSSC - /// * `"dit"` - FEAT_DIT - /// * `"dotprod"` - FEAT_DotProd - /// * `"dpb"` - FEAT_DPB - /// * `"dpb2"` - FEAT_DPB2 - /// * `"ecv"` - FEAT_ECV - /// * `"f32mm"` - FEAT_F32MM - /// * `"f64mm"` - FEAT_F64MM - /// * `"faminmax"` - FEAT_FAMINMAX - /// * `"fcma"` - FEAT_FCMA - /// * `"fhm"` - FEAT_FHM - /// * `"flagm"` - FEAT_FLAGM - /// * `"flagm2"` - FEAT_FLAGM2 - /// * `"fp"` - FEAT_FP - /// * `"fp16"` - FEAT_FP16 - /// * `"fp8"` - FEAT_FP8 - /// * `"fp8dot2"` - FEAT_FP8DOT2 - /// * `"fp8dot4"` - FEAT_FP8DOT4 - /// * `"fp8fma"` - FEAT_FP8FMA - /// * `"fpmr"` - FEAT_FPMR - /// * `"frintts"` - FEAT_FRINTTS - /// * `"hbc"` - FEAT_HBC - /// * `"i8mm"` - FEAT_I8MM - /// * `"jsconv"` - FEAT_JSCVT - /// * `"lse"` - FEAT_LSE - /// * `"lse128"` - FEAT_LSE128 - /// * `"lse2"` - FEAT_LSE2 - /// * `"lut"` - FEAT_LUT - /// * `"mops"` - FEAT_MOPS - /// * `"mte"` - FEAT_MTE & FEAT_MTE2 - /// * `"paca"` - FEAT_PAuth (address authentication) - /// * `"pacg"` - FEAT_Pauth (generic authentication) - /// * `"pauth-lr"` - FEAT_PAuth_LR - /// * `"pmull"` - FEAT_PMULL - /// * `"rand"` - FEAT_RNG - /// * `"rcpc"` - FEAT_LRCPC - /// * `"rcpc2"` - FEAT_LRCPC2 - /// * `"rcpc3"` - FEAT_LRCPC3 - /// * `"rdm"` - FEAT_RDM - /// * `"sb"` - FEAT_SB - /// * `"sha2"` - FEAT_SHA1 & FEAT_SHA256 - /// * `"sha3"` - FEAT_SHA512 & FEAT_SHA3 - /// * `"sm4"` - FEAT_SM3 & FEAT_SM4 - /// * `"sme"` - FEAT_SME - /// * `"sme-b16b16"` - FEAT_SME_B16B16 - /// * `"sme-f16f16"` - FEAT_SME_F16F16 - /// * `"sme-f64f64"` - FEAT_SME_F64F64 - /// * `"sme-f8f16"` - FEAT_SME_F8F16 - /// * `"sme-f8f32"` - FEAT_SME_F8F32 - /// * `"sme-fa64"` - FEAT_SME_FA64 - /// * `"sme-i16i64"` - FEAT_SME_I16I64 - /// * `"sme-lutv2"` - FEAT_SME_LUTv2 - /// * `"sme2"` - FEAT_SME2 - /// * `"sme2p1"` - FEAT_SME2p1 - /// * `"ssbs"` - FEAT_SSBS & FEAT_SSBS2 - /// * `"ssve-fp8dot2"` - FEAT_SSVE_FP8DOT2 - /// * `"ssve-fp8dot4"` - FEAT_SSVE_FP8DOT4 - /// * `"ssve-fp8fma"` - FEAT_SSVE_FP8FMA - /// * `"sve"` - FEAT_SVE - /// * `"sve-b16b16"` - FEAT_SVE_B16B16 (SVE or SME Z-targeting instructions) - /// * `"sve2"` - FEAT_SVE2 - /// * `"sve2-aes"` - FEAT_SVE_AES & FEAT_SVE_PMULL128 (SVE2 AES crypto) - /// * `"sve2-bitperm"` - FEAT_SVE2_BitPerm - /// * `"sve2-sha3"` - FEAT_SVE2_SHA3 - /// * `"sve2-sm4"` - FEAT_SVE2_SM4 - /// * `"sve2p1"` - FEAT_SVE2p1 - /// * `"tme"` - FEAT_TME - /// * `"wfxt"` - FEAT_WFxT - /// - /// [docs]: https://developer.arm.com/documentation/ddi0487/latest - #[stable(feature = "simd_aarch64", since = "1.60.0")] - @BIND_FEATURE_NAME: "asimd"; "neon"; - @NO_RUNTIME_DETECTION: "ras"; - @NO_RUNTIME_DETECTION: "v8.1a"; - @NO_RUNTIME_DETECTION: "v8.2a"; - @NO_RUNTIME_DETECTION: "v8.3a"; - @NO_RUNTIME_DETECTION: "v8.4a"; - @NO_RUNTIME_DETECTION: "v8.5a"; - @NO_RUNTIME_DETECTION: "v8.6a"; - @NO_RUNTIME_DETECTION: "v8.7a"; - @NO_RUNTIME_DETECTION: "v8.8a"; - @NO_RUNTIME_DETECTION: "v8.9a"; - @NO_RUNTIME_DETECTION: "v9.1a"; - @NO_RUNTIME_DETECTION: "v9.2a"; - @NO_RUNTIME_DETECTION: "v9.3a"; - @NO_RUNTIME_DETECTION: "v9.4a"; - @NO_RUNTIME_DETECTION: "v9.5a"; - @NO_RUNTIME_DETECTION: "v9a"; - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] asimd: "neon"; - /// FEAT_AdvSIMD (Advanced SIMD/NEON) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] pmull: "pmull"; - implied by target_features: ["aes"]; - /// FEAT_PMULL (Polynomial Multiply) - Implied by `aes` target_feature - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] fp: "fp"; - implied by target_features: ["neon"]; - /// FEAT_FP (Floating point support) - Implied by `neon` target_feature - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] aes: "aes"; - /// FEAT_AES (AES SIMD instructions) & FEAT_PMULL (PMULL{2}, 64-bit operand variants) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] bf16: "bf16"; - /// FEAT_BF16 (BFloat16 type, plus MM instructions, plus ASIMD support) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] bti: "bti"; - /// FEAT_BTI (Branch Target Identification) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] crc: "crc"; - /// FEAT_CRC32 (Cyclic Redundancy Check) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] cssc: "cssc"; - /// FEAT_CSSC (Common Short Sequence Compression instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] dit: "dit"; - /// FEAT_DIT (Data Independent Timing instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] dpb: "dpb"; - /// FEAT_DPB (aka dcpop - data cache clean to point of persistence) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] dpb2: "dpb2"; - /// FEAT_DPB2 (aka dcpodp - data cache clean to point of deep persistence) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] dotprod: "dotprod"; - /// FEAT_DotProd (Vector Dot-Product - ASIMDDP) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] ecv: "ecv"; - /// FEAT_ECV (Enhanced Counter Virtualization) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] f32mm: "f32mm"; - /// FEAT_F32MM (single-precision matrix multiplication) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] f64mm: "f64mm"; - /// FEAT_F64MM (double-precision matrix multiplication) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] faminmax: "faminmax"; - /// FEAT_FAMINMAX (FAMIN and FAMAX SIMD/SVE/SME instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] fcma: "fcma"; - /// FEAT_FCMA (float complex number operations) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] fhm: "fhm"; - /// FEAT_FHM (fp16 multiplication instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] flagm: "flagm"; - /// FEAT_FLAGM (flag manipulation instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] flagm2: "flagm2"; - /// FEAT_FLAGM2 (flag manipulation instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] fp16: "fp16"; - /// FEAT_FP16 (Half-float support) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fp8: "fp8"; - /// FEAT_FP8 (F8CVT Instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fp8dot2: "fp8dot2"; - /// FEAT_FP8DOT2 (F8DP2 Instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fp8dot4: "fp8dot4"; - /// FEAT_FP8DOT4 (F8DP4 Instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fp8fma: "fp8fma"; - /// FEAT_FP8FMA (F8FMA Instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fpmr: "fpmr"; - without cfg check: true; - /// FEAT_FPMR (Special-purpose AArch64-FPMR register) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] frintts: "frintts"; - /// FEAT_FRINTTS (float to integer rounding instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] hbc: "hbc"; - /// FEAT_HBC (Hinted conditional branches) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] i8mm: "i8mm"; - /// FEAT_I8MM (integer matrix multiplication, plus ASIMD support) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] jsconv: "jsconv"; - /// FEAT_JSCVT (JavaScript float conversion instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] lse: "lse"; - /// FEAT_LSE (Large System Extension - atomics) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] lse128: "lse128"; - /// FEAT_LSE128 (128-bit atomics) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] lse2: "lse2"; - /// FEAT_LSE2 (unaligned and register-pair atomics) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] lut: "lut"; - /// FEAT_LUT (Lookup Table Instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] mops: "mops"; - /// FEAT_MOPS (Standardization of memory operations) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] mte: "mte"; - /// FEAT_MTE & FEAT_MTE2 (Memory Tagging Extension) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] paca: "paca"; - /// FEAT_PAuth (address authentication) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] pacg: "pacg"; - /// FEAT_PAuth (generic authentication) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] pauth_lr: "pauth-lr"; - /// FEAT_PAuth_LR - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] rand: "rand"; - /// FEAT_RNG (Random Number Generator) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] rcpc: "rcpc"; - /// FEAT_LRCPC (Release consistent Processor consistent) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] rcpc2: "rcpc2"; - /// FEAT_LRCPC2 (RCPC with immediate offsets) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] rcpc3: "rcpc3"; - /// FEAT_LRCPC3 (RCPC Instructions v3) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] rdm: "rdm"; - /// FEAT_RDM (Rounding Doubling Multiply - ASIMDRDM) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sb: "sb"; - /// FEAT_SB (speculation barrier) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sha2: "sha2"; - /// FEAT_SHA1 & FEAT_SHA256 (SHA1 & SHA2-256 instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sha3: "sha3"; - /// FEAT_SHA512 & FEAT_SHA3 (SHA2-512 & SHA3 instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sm4: "sm4"; - /// FEAT_SM3 & FEAT_SM4 (SM3 & SM4 instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme: "sme"; - /// FEAT_SME (Scalable Matrix Extension) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme2: "sme2"; - /// FEAT_SME2 (SME Version 2) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme2p1: "sme2p1"; - /// FEAT_SME2p1 (SME Version 2.1) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme_b16b16: "sme-b16b16"; - /// FEAT_SME_B16B16 - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme_f16f16: "sme-f16f16"; - /// FEAT_SME_F16F16 (Non-widening half-precision FP16 to FP16 arithmetic for SME2) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme_f64f64: "sme-f64f64"; - /// FEAT_SME_F64F64 (Double-precision floating-point outer product instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme_f8f16: "sme-f8f16"; - /// FEAT_SME_F8F16 - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme_f8f32: "sme-f8f32"; - /// FEAT_SME_F8F32 - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme_fa64: "sme-fa64"; - /// FEAT_SME_FA64 (Full A64 instruction set support in Streaming SVE mode) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme_i16i64: "sme-i16i64"; - /// FEAT_SME_I16I64 (16-bit to 64-bit integer widening outer product instructions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sme_lutv2: "sme-lutv2"; - /// FEAT_SME_LUTv2 (LUTI4 Instruction) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] ssbs: "ssbs"; - /// FEAT_SSBS & FEAT_SSBS2 (speculative store bypass safe) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] ssve_fp8dot2: "ssve-fp8dot2"; - /// FEAT_SSVE_FP8DOT2 - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] ssve_fp8dot4: "ssve-fp8dot4"; - /// FEAT_SSVE_FP8DOT4 - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] ssve_fp8fma: "ssve-fp8fma"; - /// FEAT_SSVE_FP8FMA - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve: "sve"; - /// FEAT_SVE (Scalable Vector Extension) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2: "sve2"; - /// FEAT_SVE2 (Scalable Vector Extension 2) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sve2p1: "sve2p1"; - /// FEAT_SVE2p1 (Scalable Vector Extension 2.1) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2_aes: "sve2-aes"; - /// FEAT_SVE_AES & FEAT_SVE_PMULL128 (SVE2 AES crypto) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sve_b16b16: "sve-b16b16"; - /// FEAT_SVE_B16B16 (SVE or SME Z-targeting instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2_bitperm: "sve2-bitperm"; - /// FEAT_SVE_BitPerm (SVE2 bit permutation instructions) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2_sha3: "sve2-sha3"; - /// FEAT_SVE_SHA3 (SVE2 SHA3 crypto) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2_sm4: "sve2-sm4"; - /// FEAT_SVE_SM4 (SVE2 SM4 crypto) - @FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] tme: "tme"; - /// FEAT_TME (Transactional Memory Extensions) - @FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] wfxt: "wfxt"; - /// FEAT_WFxT (WFET and WFIT Instructions) -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/arm.rs b/library/stdarch/crates/std_detect/src/detect/arch/arm.rs deleted file mode 100644 index c3c8883ce31..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/arm.rs +++ /dev/null @@ -1,29 +0,0 @@ -//! Run-time feature detection on ARM Aarch32. - -features! { - @TARGET: arm; - @CFG: target_arch = "arm"; - @MACRO_NAME: is_arm_feature_detected; - @MACRO_ATTRS: - /// Checks if `arm` feature is enabled. - #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] - @NO_RUNTIME_DETECTION: "v7"; - @NO_RUNTIME_DETECTION: "vfp2"; - @NO_RUNTIME_DETECTION: "vfp3"; - @NO_RUNTIME_DETECTION: "vfp4"; - @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] neon: "neon"; - /// ARM Advanced SIMD (NEON) - Aarch32 - @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] pmull: "pmull"; - without cfg check: true; - /// Polynomial Multiply - @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] crc: "crc"; - /// CRC32 (Cyclic Redundancy Check) - @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] aes: "aes"; - /// FEAT_AES (AES instructions) - @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] sha2: "sha2"; - /// FEAT_SHA1 & FEAT_SHA256 (SHA1 & SHA2-256 instructions) - @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] i8mm: "i8mm"; - /// FEAT_I8MM (integer matrix multiplication, plus ASIMD support) - @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] dotprod: "dotprod"; - /// FEAT_DotProd (Vector Dot-Product - ASIMDDP) -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/loongarch.rs b/library/stdarch/crates/std_detect/src/detect/arch/loongarch.rs deleted file mode 100644 index e9d68f6a9bf..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/loongarch.rs +++ /dev/null @@ -1,51 +0,0 @@ -//! Run-time feature detection on LoongArch. - -features! { - @TARGET: loongarch; - @CFG: target_arch = "loongarch64"; - @MACRO_NAME: is_loongarch_feature_detected; - @MACRO_ATTRS: - /// Checks if `loongarch` feature is enabled. - /// Supported arguments are: - /// - /// * `"f"` - /// * `"d"` - /// * `"frecipe"` - /// * `"div32"` - /// * `"lsx"` - /// * `"lasx"` - /// * `"lam-bh"` - /// * `"lamcas"` - /// * `"ld-seq-sa"` - /// * `"scq"` - /// * `"lbt"` - /// * `"lvz"` - /// * `"ual"` - #[stable(feature = "stdarch_loongarch_feature", since = "1.89.0")] - @FEATURE: #[stable(feature = "stdarch_loongarch_feature", since = "1.89.0")] f: "f"; - /// F - @FEATURE: #[stable(feature = "stdarch_loongarch_feature", since = "1.89.0")] d: "d"; - /// D - @FEATURE: #[stable(feature = "stdarch_loongarch_feature", since = "1.89.0")] frecipe: "frecipe"; - /// Frecipe - @FEATURE: #[unstable(feature = "stdarch_loongarch_feature_detection", issue = "117425")] div32: "div32"; - /// Div32 - @FEATURE: #[stable(feature = "stdarch_loongarch_feature", since = "1.89.0")] lsx: "lsx"; - /// LSX - @FEATURE: #[stable(feature = "stdarch_loongarch_feature", since = "1.89.0")] lasx: "lasx"; - /// LASX - @FEATURE: #[unstable(feature = "stdarch_loongarch_feature_detection", issue = "117425")] lam_bh: "lam-bh"; - /// LAM-BH - @FEATURE: #[unstable(feature = "stdarch_loongarch_feature_detection", issue = "117425")] lamcas: "lamcas"; - /// LAM-CAS - @FEATURE: #[unstable(feature = "stdarch_loongarch_feature_detection", issue = "117425")] ld_seq_sa: "ld-seq-sa"; - /// LD-SEQ-SA - @FEATURE: #[unstable(feature = "stdarch_loongarch_feature_detection", issue = "117425")] scq: "scq"; - /// SCQ - @FEATURE: #[stable(feature = "stdarch_loongarch_feature", since = "1.89.0")] lbt: "lbt"; - /// LBT - @FEATURE: #[stable(feature = "stdarch_loongarch_feature", since = "1.89.0")] lvz: "lvz"; - /// LVZ - @FEATURE: #[unstable(feature = "stdarch_loongarch_feature_detection", issue = "117425")] ual: "ual"; - /// UAL -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/mips.rs b/library/stdarch/crates/std_detect/src/detect/arch/mips.rs deleted file mode 100644 index e185fdfcaac..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/mips.rs +++ /dev/null @@ -1,12 +0,0 @@ -//! Run-time feature detection on MIPS. - -features! { - @TARGET: mips; - @CFG: target_arch = "mips"; - @MACRO_NAME: is_mips_feature_detected; - @MACRO_ATTRS: - /// Checks if `mips` feature is enabled. - #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")] - @FEATURE: #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")] msa: "msa"; - /// MIPS SIMD Architecture (MSA) -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/mips64.rs b/library/stdarch/crates/std_detect/src/detect/arch/mips64.rs deleted file mode 100644 index 69fe4869d30..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/mips64.rs +++ /dev/null @@ -1,12 +0,0 @@ -//! Run-time feature detection on MIPS64. - -features! { - @TARGET: mips64; - @CFG: target_arch = "mips64"; - @MACRO_NAME: is_mips64_feature_detected; - @MACRO_ATTRS: - /// Checks if `mips64` feature is enabled. - #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")] - @FEATURE: #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")] msa: "msa"; - /// MIPS SIMD Architecture (MSA) -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/mod.rs b/library/stdarch/crates/std_detect/src/detect/arch/mod.rs deleted file mode 100644 index d5a13acc028..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/mod.rs +++ /dev/null @@ -1,75 +0,0 @@ -#![allow(dead_code)] - -use cfg_if::cfg_if; - -// Export the macros for all supported architectures. -#[macro_use] -mod x86; -#[macro_use] -mod arm; -#[macro_use] -mod aarch64; -#[macro_use] -mod riscv; -#[macro_use] -mod powerpc; -#[macro_use] -mod powerpc64; -#[macro_use] -mod mips; -#[macro_use] -mod mips64; -#[macro_use] -mod loongarch; -#[macro_use] -mod s390x; - -cfg_if! { - if #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] { - #[stable(feature = "simd_x86", since = "1.27.0")] - pub use x86::*; - } else if #[cfg(target_arch = "arm")] { - #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] - pub use arm::*; - } else if #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] { - #[stable(feature = "simd_aarch64", since = "1.60.0")] - pub use aarch64::*; - } else if #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))] { - #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] - pub use riscv::*; - } else if #[cfg(target_arch = "powerpc")] { - #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] - pub use powerpc::*; - } else if #[cfg(target_arch = "powerpc64")] { - #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] - pub use powerpc64::*; - } else if #[cfg(target_arch = "mips")] { - #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")] - pub use mips::*; - } else if #[cfg(target_arch = "mips64")] { - #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")] - pub use mips64::*; - } else if #[cfg(target_arch = "loongarch64")] { - #[stable(feature = "stdarch_loongarch_feature", since = "1.89.0")] - pub use loongarch::*; - } else if #[cfg(target_arch = "s390x")] { - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - pub use s390x::*; - } else { - // Unimplemented architecture: - #[doc(hidden)] - pub(crate) enum Feature { - Null - } - #[doc(hidden)] - #[unstable(feature = "stdarch_internal", issue = "none")] - pub mod __is_feature_detected {} - - impl Feature { - #[doc(hidden)] - pub(crate) fn from_str(_s: &str) -> Result<Feature, ()> { Err(()) } - #[doc(hidden)] - pub(crate) fn to_str(self) -> &'static str { "" } - } - } -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/powerpc.rs b/library/stdarch/crates/std_detect/src/detect/arch/powerpc.rs deleted file mode 100644 index c390993a48a..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/powerpc.rs +++ /dev/null @@ -1,30 +0,0 @@ -//! Run-time feature detection on PowerPC. - -features! { - @TARGET: powerpc; - @CFG: target_arch = "powerpc"; - @MACRO_NAME: is_powerpc_feature_detected; - @MACRO_ATTRS: - /// Checks if `powerpc` feature is enabled. - #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] altivec: "altivec"; - /// Altivec - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] vsx: "vsx"; - /// VSX - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8: "power8"; - without cfg check: true; - /// Power8 - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8_altivec: "power8-altivec"; - /// Power8 altivec - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8_vector: "power8-vector"; - /// Power8 vector - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8_crypto: "power8-crypto"; - /// Power8 crypto - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power9: "power9"; - without cfg check: true; - /// Power9 - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power9_altivec: "power9-altivec"; - /// Power9 altivec - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power9_vector: "power9-vector"; - /// Power9 vector -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/powerpc64.rs b/library/stdarch/crates/std_detect/src/detect/arch/powerpc64.rs deleted file mode 100644 index cf05baa6f79..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/powerpc64.rs +++ /dev/null @@ -1,30 +0,0 @@ -//! Run-time feature detection on PowerPC64. - -features! { - @TARGET: powerpc64; - @CFG: target_arch = "powerpc64"; - @MACRO_NAME: is_powerpc64_feature_detected; - @MACRO_ATTRS: - /// Checks if `powerpc` feature is enabled. - #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] altivec: "altivec"; - /// Altivec - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] vsx: "vsx"; - /// VSX - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8: "power8"; - without cfg check: true; - /// Power8 - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8_altivec: "power8-altivec"; - /// Power8 altivec - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8_vector: "power8-vector"; - /// Power8 vector - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8_crypto: "power8-crypto"; - /// Power8 crypto - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power9: "power9"; - without cfg check: true; - /// Power9 - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power9_altivec: "power9-altivec"; - /// Power9 altivec - @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power9_vector: "power9-vector"; - /// Power9 vector -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/riscv.rs b/library/stdarch/crates/std_detect/src/detect/arch/riscv.rs deleted file mode 100644 index b86190d7bbf..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/riscv.rs +++ /dev/null @@ -1,344 +0,0 @@ -//! Run-time feature detection on RISC-V. - -features! { - @TARGET: riscv; - @CFG: any(target_arch = "riscv32", target_arch = "riscv64"); - @MACRO_NAME: is_riscv_feature_detected; - @MACRO_ATTRS: - /// A macro to test at *runtime* whether instruction sets are available on - /// RISC-V platforms. - /// - /// RISC-V standard defined the base sets and the extension sets. - /// The base sets are RV32I, RV64I, RV32E or RV128I. Any RISC-V platform - /// must support one base set and/or multiple extension sets. - /// - /// Any RISC-V standard instruction sets can be in state of either ratified, - /// frozen or draft. The version and status of current standard instruction - /// sets can be checked out from preface section of the [ISA manual]. - /// - /// Platform may define and support their own custom instruction sets with - /// ISA prefix X. These sets are highly platform specific and should be - /// detected with their own platform support crates. - /// - /// [ISA manual]: https://riscv.org/specifications/ratified/ - /// - /// # Platform-specific/agnostic Behavior and Availability - /// - /// Runtime detection depends on the platform-specific feature detection - /// facility and its availability per feature is - /// highly platform/version-specific. - /// - /// Still, a best-effort attempt is performed to enable subset/dependent - /// features if a superset feature is enabled regardless of the platform. - /// For instance, if the A extension (`"a"`) is enabled, its subsets (the - /// Zalrsc and Zaamo extensions; `"zalrsc"` and `"zaamo"`) are also enabled. - /// Likewise, if the F extension (`"f"`) is enabled, one of its dependencies - /// (the Zicsr extension `"zicsr"`) is also enabled. - /// - /// # Unprivileged Specification - /// - /// The supported ratified RISC-V instruction sets are as follows: - /// - /// * RV32E: `"rv32e"` - /// * RV32I: `"rv32i"` - /// * RV64I: `"rv64i"` - /// * A: `"a"` - /// * Zaamo: `"zaamo"` - /// * Zalrsc: `"zalrsc"` - /// * B: `"b"` - /// * Zba: `"zba"` - /// * Zbb: `"zbb"` - /// * Zbs: `"zbs"` - /// * C: `"c"` - /// * Zca: `"zca"` - /// * Zcd: `"zcd"` (if D is enabled) - /// * Zcf: `"zcf"` (if F is enabled on RV32) - /// * D: `"d"` - /// * F: `"f"` - /// * M: `"m"` - /// * Q: `"q"` - /// * V: `"v"` - /// * Zve32x: `"zve32x"` - /// * Zve32f: `"zve32f"` - /// * Zve64x: `"zve64x"` - /// * Zve64f: `"zve64f"` - /// * Zve64d: `"zve64d"` - /// * Zicbom: `"zicbom"` - /// * Zicboz: `"zicboz"` - /// * Zicntr: `"zicntr"` - /// * Zicond: `"zicond"` - /// * Zicsr: `"zicsr"` - /// * Zifencei: `"zifencei"` - /// * Zihintntl: `"zihintntl"` - /// * Zihintpause: `"zihintpause"` - /// * Zihpm: `"zihpm"` - /// * Zimop: `"zimop"` - /// * Zacas: `"zacas"` - /// * Zawrs: `"zawrs"` - /// * Zfa: `"zfa"` - /// * Zfbfmin: `"zfbfmin"` - /// * Zfh: `"zfh"` - /// * Zfhmin: `"zfhmin"` - /// * Zfinx: `"zfinx"` - /// * Zdinx: `"zdinx"` - /// * Zhinx: `"zhinx"` - /// * Zhinxmin: `"zhinxmin"` - /// * Zcb: `"zcb"` - /// * Zcmop: `"zcmop"` - /// * Zbc: `"zbc"` - /// * Zbkb: `"zbkb"` - /// * Zbkc: `"zbkc"` - /// * Zbkx: `"zbkx"` - /// * Zk: `"zk"` - /// * Zkn: `"zkn"` - /// * Zknd: `"zknd"` - /// * Zkne: `"zkne"` - /// * Zknh: `"zknh"` - /// * Zkr: `"zkr"` - /// * Zks: `"zks"` - /// * Zksed: `"zksed"` - /// * Zksh: `"zksh"` - /// * Zkt: `"zkt"` - /// * Zvbb: `"zvbb"` - /// * Zvbc: `"zvbc"` - /// * Zvfbfmin: `"zvfbfmin"` - /// * Zvfbfwma: `"zvfbfwma"` - /// * Zvfh: `"zvfh"` - /// * Zvfhmin: `"zvfhmin"` - /// * Zvkb: `"zvkb"` - /// * Zvkg: `"zvkg"` - /// * Zvkn: `"zvkn"` - /// * Zvkned: `"zvkned"` - /// * Zvknha: `"zvknha"` - /// * Zvknhb: `"zvknhb"` - /// * Zvknc: `"zvknc"` - /// * Zvkng: `"zvkng"` - /// * Zvks: `"zvks"` - /// * Zvksed: `"zvksed"` - /// * Zvksh: `"zvksh"` - /// * Zvksc: `"zvksc"` - /// * Zvksg: `"zvksg"` - /// * Zvkt: `"zvkt"` - /// * Ztso: `"ztso"` - /// - /// There's also bases and extensions marked as standard instruction set, - /// but they are in frozen or draft state. These instruction sets are also - /// reserved by this macro and can be detected in the future platforms. - /// - /// Draft RISC-V instruction sets: - /// - /// * RV128I: `"rv128i"` - /// * J: `"j"` - /// * P: `"p"` - /// * Zam: `"zam"` - /// - /// # Performance Hints - /// - /// The two features below define performance hints for unaligned - /// scalar/vector memory accesses, respectively. If enabled, it denotes that - /// corresponding unaligned memory access is reasonably fast. - /// - /// * `"unaligned-scalar-mem"` - /// * Runtime detection requires Linux kernel version 6.4 or later. - /// * `"unaligned-vector-mem"` - /// * Runtime detection requires Linux kernel version 6.13 or later. - #[stable(feature = "riscv_ratified", since = "1.78.0")] - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] rv32i: "rv32i"; - without cfg check: true; - /// RV32I Base Integer Instruction Set - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] rv32e: "rv32e"; - without cfg check: true; - /// RV32E Base Integer Instruction Set - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] rv64i: "rv64i"; - without cfg check: true; - /// RV64I Base Integer Instruction Set - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] rv128i: "rv128i"; - without cfg check: true; - /// RV128I Base Integer Instruction Set - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] unaligned_scalar_mem: "unaligned-scalar-mem"; - /// Has reasonably performant unaligned scalar - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] unaligned_vector_mem: "unaligned-vector-mem"; - /// Has reasonably performant unaligned vector - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicsr: "zicsr"; - /// "Zicsr" Extension for Control and Status Register (CSR) Instructions - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicntr: "zicntr"; - /// "Zicntr" Extension for Base Counters and Timers - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihpm: "zihpm"; - /// "Zihpm" Extension for Hardware Performance Counters - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zifencei: "zifencei"; - /// "Zifencei" Extension for Instruction-Fetch Fence - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihintntl: "zihintntl"; - /// "Zihintntl" Extension for Non-Temporal Locality Hints - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihintpause: "zihintpause"; - /// "Zihintpause" Extension for Pause Hint - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zimop: "zimop"; - /// "Zimop" Extension for May-Be-Operations - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicbom: "zicbom"; - /// "Zicbom" Extension for Cache-Block Management Instructions - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicboz: "zicboz"; - /// "Zicboz" Extension for Cache-Block Zero Instruction - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicond: "zicond"; - /// "Zicond" Extension for Integer Conditional Operations - - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] m: "m"; - /// "M" Extension for Integer Multiplication and Division - - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] a: "a"; - /// "A" Extension for Atomic Instructions - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zalrsc: "zalrsc"; - /// "Zalrsc" Extension for Load-Reserved/Store-Conditional Instructions - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zaamo: "zaamo"; - /// "Zaamo" Extension for Atomic Memory Operations - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zawrs: "zawrs"; - /// "Zawrs" Extension for Wait-on-Reservation-Set Instructions - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zacas: "zacas"; - /// "Zacas" Extension for Atomic Compare-and-Swap (CAS) Instructions - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zam: "zam"; - without cfg check: true; - /// "Zam" Extension for Misaligned Atomics - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] ztso: "ztso"; - /// "Ztso" Extension for Total Store Ordering - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] f: "f"; - /// "F" Extension for Single-Precision Floating-Point - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] d: "d"; - /// "D" Extension for Double-Precision Floating-Point - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] q: "q"; - without cfg check: true; - /// "Q" Extension for Quad-Precision Floating-Point - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zfh: "zfh"; - /// "Zfh" Extension for Half-Precision Floating-Point - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zfhmin: "zfhmin"; - /// "Zfhmin" Extension for Minimal Half-Precision Floating-Point - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zfa: "zfa"; - /// "Zfa" Extension for Additional Floating-Point Instructions - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zfbfmin: "zfbfmin"; - /// "Zfbfmin" Extension for Scalar BF16 Converts - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zfinx: "zfinx"; - /// "Zfinx" Extension for Single-Precision Floating-Point in Integer Registers - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zdinx: "zdinx"; - /// "Zdinx" Extension for Double-Precision Floating-Point in Integer Registers - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zhinx: "zhinx"; - /// "Zhinx" Extension for Half-Precision Floating-Point in Integer Registers - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zhinxmin: "zhinxmin"; - /// "Zhinxmin" Extension for Minimal Half-Precision Floating-Point in Integer Registers - - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] c: "c"; - /// "C" Extension for Compressed Instructions - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zca: "zca"; - /// "Zca" Compressed Instructions excluding Floating-Point Loads/Stores - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcf: "zcf"; - without cfg check: true; - /// "Zcf" Compressed Instructions for Single-Precision Floating-Point Loads/Stores on RV32 - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcd: "zcd"; - without cfg check: true; - /// "Zcd" Compressed Instructions for Double-Precision Floating-Point Loads/Stores - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcb: "zcb"; - /// "Zcb" Simple Code-size Saving Compressed Instructions - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcmop: "zcmop"; - /// "Zcmop" Extension for Compressed May-Be-Operations - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] b: "b"; - /// "B" Extension for Bit Manipulation - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zba: "zba"; - /// "Zba" Extension for Address Generation - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zbb: "zbb"; - /// "Zbb" Extension for Basic Bit-Manipulation - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zbc: "zbc"; - /// "Zbc" Extension for Carry-less Multiplication - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zbs: "zbs"; - /// "Zbs" Extension for Single-Bit Instructions - - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zbkb: "zbkb"; - /// "Zbkb" Extension for Bit-Manipulation for Cryptography - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zbkc: "zbkc"; - /// "Zbkc" Extension for Carry-less Multiplication for Cryptography - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zbkx: "zbkx"; - /// "Zbkx" Extension for Crossbar Permutations - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zknd: "zknd"; - /// "Zknd" Cryptography Extension for NIST Suite: AES Decryption - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zkne: "zkne"; - /// "Zkne" Cryptography Extension for NIST Suite: AES Encryption - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zknh: "zknh"; - /// "Zknh" Cryptography Extension for NIST Suite: Hash Function Instructions - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zksed: "zksed"; - /// "Zksed" Cryptography Extension for ShangMi Suite: SM4 Block Cipher Instructions - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zksh: "zksh"; - /// "Zksh" Cryptography Extension for ShangMi Suite: SM3 Hash Function Instructions - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zkr: "zkr"; - /// "Zkr" Entropy Source Extension - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zkn: "zkn"; - /// "Zkn" Cryptography Extension for NIST Algorithm Suite - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zks: "zks"; - /// "Zks" Cryptography Extension for ShangMi Algorithm Suite - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zk: "zk"; - /// "Zk" Cryptography Extension for Standard Scalar Cryptography - @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zkt: "zkt"; - /// "Zkt" Cryptography Extension for Data Independent Execution Latency - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] v: "v"; - /// "V" Extension for Vector Operations - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve32x: "zve32x"; - /// "Zve32x" Vector Extension for Embedded Processors (32-bit+; Integer) - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve32f: "zve32f"; - /// "Zve32f" Vector Extension for Embedded Processors (32-bit+; with Single-Precision Floating-Point) - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve64x: "zve64x"; - /// "Zve64x" Vector Extension for Embedded Processors (64-bit+; Integer) - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve64f: "zve64f"; - /// "Zve64f" Vector Extension for Embedded Processors (64-bit+; with Single-Precision Floating-Point) - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve64d: "zve64d"; - /// "Zve64d" Vector Extension for Embedded Processors (64-bit+; with Double-Precision Floating-Point) - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvfh: "zvfh"; - /// "Zvfh" Vector Extension for Half-Precision Floating-Point - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvfhmin: "zvfhmin"; - /// "Zvfhmin" Vector Extension for Minimal Half-Precision Floating-Point - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvfbfmin: "zvfbfmin"; - /// "Zvfbfmin" Vector Extension for BF16 Converts - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvfbfwma: "zvfbfwma"; - /// "Zvfbfwma" Vector Extension for BF16 Widening Multiply-Add - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvbb: "zvbb"; - /// "Zvbb" Extension for Vector Basic Bit-Manipulation - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvbc: "zvbc"; - /// "Zvbc" Extension for Vector Carryless Multiplication - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkb: "zvkb"; - /// "Zvkb" Extension for Vector Cryptography Bit-Manipulation - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkg: "zvkg"; - /// "Zvkg" Cryptography Extension for Vector GCM/GMAC - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkned: "zvkned"; - /// "Zvkned" Cryptography Extension for NIST Suite: Vector AES Block Cipher - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvknha: "zvknha"; - /// "Zvknha" Cryptography Extension for Vector SHA-2 Secure Hash (SHA-256) - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvknhb: "zvknhb"; - /// "Zvknhb" Cryptography Extension for Vector SHA-2 Secure Hash (SHA-256/512) - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvksed: "zvksed"; - /// "Zvksed" Cryptography Extension for ShangMi Suite: Vector SM4 Block Cipher - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvksh: "zvksh"; - /// "Zvksh" Cryptography Extension for ShangMi Suite: Vector SM3 Secure Hash - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkn: "zvkn"; - /// "Zvkn" Cryptography Extension for NIST Algorithm Suite - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvknc: "zvknc"; - /// "Zvknc" Cryptography Extension for NIST Algorithm Suite with Carryless Multiply - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkng: "zvkng"; - /// "Zvkng" Cryptography Extension for NIST Algorithm Suite with GCM - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvks: "zvks"; - /// "Zvks" Cryptography Extension for ShangMi Algorithm Suite - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvksc: "zvksc"; - /// "Zvksc" Cryptography Extension for ShangMi Algorithm Suite with Carryless Multiply - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvksg: "zvksg"; - /// "Zvksg" Cryptography Extension for ShangMi Algorithm Suite with GCM - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkt: "zvkt"; - /// "Zvkt" Extension for Vector Data-Independent Execution Latency - - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] j: "j"; - without cfg check: true; - /// "J" Extension for Dynamically Translated Languages - @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] p: "p"; - without cfg check: true; - /// "P" Extension for Packed-SIMD Instructions -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/s390x.rs b/library/stdarch/crates/std_detect/src/detect/arch/s390x.rs deleted file mode 100644 index 4c20d011680..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/s390x.rs +++ /dev/null @@ -1,81 +0,0 @@ -//! Run-time feature detection on s390x. - -features! { - @TARGET: s390x; - @CFG: target_arch = "s390x"; - @MACRO_NAME: is_s390x_feature_detected; - @MACRO_ATTRS: - /// Checks if `s390x` feature is enabled. - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] concurrent_functions: "concurrent-functions"; - /// s390x concurrent-functions facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] deflate_conversion: "deflate-conversion"; - /// s390x deflate-conversion facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] enhanced_sort: "enhanced-sort"; - /// s390x enhanced-sort facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] guarded_storage: "guarded-storage"; - /// s390x guarded-storage facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] high_word: "high-word"; - /// s390x high-word facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] message_security_assist_extension3: "message-security-assist-extension3"; - /// s390x message-security-assist-extension3 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] message_security_assist_extension4: "message-security-assist-extension4"; - /// s390x message-security-assist-extension4 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] message_security_assist_extension5: "message-security-assist-extension5"; - /// s390x message-security-assist-extension5 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] message_security_assist_extension8: "message-security-assist-extension8"; - /// s390x message-security-assist-extension8 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] message_security_assist_extension9: "message-security-assist-extension9"; - /// s390x message-security-assist-extension9 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] message_security_assist_extension12: "message-security-assist-extension12"; - /// s390x message-security-assist-extension12 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] miscellaneous_extensions_2: "miscellaneous-extensions-2"; - /// s390x miscellaneous-extensions-2 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] miscellaneous_extensions_3: "miscellaneous-extensions-3"; - /// s390x miscellaneous-extensions-3 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] miscellaneous_extensions_4: "miscellaneous-extensions-4"; - /// s390x miscellaneous-extensions-4 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] nnp_assist: "nnp-assist"; - /// s390x nnp-assist facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] transactional_execution: "transactional-execution"; - /// s390x transactional-execution facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] vector: "vector"; - /// s390x vector facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] vector_enhancements_1: "vector-enhancements-1"; - /// s390x vector-enhancements-1 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] vector_enhancements_2: "vector-enhancements-2"; - /// s390x vector-enhancements-2 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] vector_enhancements_3: "vector-enhancements-3"; - /// s390x vector-enhancements-3 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] vector_packed_decimal: "vector-packed-decimal"; - /// s390x vector-packed-decimal facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] vector_packed_decimal_enhancement: "vector-packed-decimal-enhancement"; - /// s390x vector-packed-decimal-enhancement facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] vector_packed_decimal_enhancement_2: "vector-packed-decimal-enhancement-2"; - /// s390x vector-packed-decimal-enhancement-2 facility - #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] - @FEATURE: #[unstable(feature = "stdarch_s390x_feature_detection", issue = "135413")] vector_packed_decimal_enhancement_3: "vector-packed-decimal-enhancement-3"; - /// s390x vector-packed-decimal-enhancement-3 facility -} diff --git a/library/stdarch/crates/std_detect/src/detect/arch/x86.rs b/library/stdarch/crates/std_detect/src/detect/arch/x86.rs deleted file mode 100644 index 28b3e3cfb35..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/arch/x86.rs +++ /dev/null @@ -1,278 +0,0 @@ -//! This module implements minimal run-time feature detection for x86. -//! -//! The features are detected using the `detect_features` function below. -//! This function uses the CPUID instruction to read the feature flags from the -//! CPU and encodes them in a `usize` where each bit position represents -//! whether a feature is available (bit is set) or unavailable (bit is cleared). -//! -//! The enum `Feature` is used to map bit positions to feature names, and the -//! the `__crate::detect::check_for!` macro is used to map string literals (e.g., -//! "avx") to these bit positions (e.g., `Feature::avx`). -//! -//! The run-time feature detection is performed by the -//! `__crate::detect::check_for(Feature) -> bool` function. On its first call, -//! this functions queries the CPU for the available features and stores them -//! in a global `AtomicUsize` variable. The query is performed by just checking -//! whether the feature bit in this global variable is set or cleared. - -features! { - @TARGET: x86; - @CFG: any(target_arch = "x86", target_arch = "x86_64"); - @MACRO_NAME: is_x86_feature_detected; - @MACRO_ATTRS: - /// A macro to test at *runtime* whether a CPU feature is available on - /// x86/x86-64 platforms. - /// - /// This macro is provided in the standard library and will detect at runtime - /// whether the specified CPU feature is detected. This does **not** resolve at - /// compile time unless the specified feature is already enabled for the entire - /// crate. Runtime detection currently relies mostly on the `cpuid` instruction. - /// - /// This macro only takes one argument which is a string literal of the feature - /// being tested for. The feature names supported are the lowercase versions of - /// the ones defined by Intel in [their documentation][docs]. - /// - /// ## Supported arguments - /// - /// This macro supports the same names that `#[target_feature]` supports. Unlike - /// `#[target_feature]`, however, this macro does not support names separated - /// with a comma. Instead testing for multiple features must be done through - /// separate macro invocations for now. - /// - /// Supported arguments are: - /// - /// * `"aes"` - /// * `"pclmulqdq"` - /// * `"rdrand"` - /// * `"rdseed"` - /// * `"tsc"` - /// * `"mmx"` - /// * `"sse"` - /// * `"sse2"` - /// * `"sse3"` - /// * `"ssse3"` - /// * `"sse4.1"` - /// * `"sse4.2"` - /// * `"sse4a"` - /// * `"sha"` - /// * `"avx"` - /// * `"avx2"` - /// * `"sha512"` - /// * `"sm3"` - /// * `"sm4"` - /// * `"avx512f"` - /// * `"avx512cd"` - /// * `"avx512er"` - /// * `"avx512pf"` - /// * `"avx512bw"` - /// * `"avx512dq"` - /// * `"avx512vl"` - /// * `"avx512ifma"` - /// * `"avx512vbmi"` - /// * `"avx512vpopcntdq"` - /// * `"avx512vbmi2"` - /// * `"gfni"` - /// * `"vaes"` - /// * `"vpclmulqdq"` - /// * `"avx512vnni"` - /// * `"avx512bitalg"` - /// * `"avx512bf16"` - /// * `"avx512vp2intersect"` - /// * `"avx512fp16"` - /// * `"avxvnni"` - /// * `"avxifma"` - /// * `"avxneconvert"` - /// * `"avxvnniint8"` - /// * `"avxvnniint16"` - /// * `"amx-tile"` - /// * `"amx-int8"` - /// * `"amx-bf16"` - /// * `"amx-fp16"` - /// * `"amx-complex"` - /// * `"amx-avx512"` - /// * `"amx-fp8"` - /// * `"amx-movrs"` - /// * `"amx-tf32"` - /// * `"amx-transpose"` - /// * `"f16c"` - /// * `"fma"` - /// * `"bmi1"` - /// * `"bmi2"` - /// * `"abm"` - /// * `"lzcnt"` - /// * `"tbm"` - /// * `"popcnt"` - /// * `"fxsr"` - /// * `"xsave"` - /// * `"xsaveopt"` - /// * `"xsaves"` - /// * `"xsavec"` - /// * `"cmpxchg16b"` - /// * `"kl"` - /// * `"widekl"` - /// * `"adx"` - /// * `"rtm"` - /// * `"movbe"` - /// * `"ermsb"` - /// * `"movrs"` - /// * `"xop"` - /// - /// [docs]: https://software.intel.com/sites/landingpage/IntrinsicsGuide - #[stable(feature = "simd_x86", since = "1.27.0")] - @BIND_FEATURE_NAME: "abm"; "lzcnt"; // abm is a synonym for lzcnt - @BIND_FEATURE_NAME: "avx512gfni"; "gfni"; #[deprecated(since = "1.67.0", note = "the `avx512gfni` feature has been renamed to `gfni`")]; - @BIND_FEATURE_NAME: "avx512vaes"; "vaes"; #[deprecated(since = "1.67.0", note = "the `avx512vaes` feature has been renamed to `vaes`")]; - @BIND_FEATURE_NAME: "avx512vpclmulqdq"; "vpclmulqdq"; #[deprecated(since = "1.67.0", note = "the `avx512vpclmulqdq` feature has been renamed to `vpclmulqdq`")]; - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] aes: "aes"; - /// AES (Advanced Encryption Standard New Instructions AES-NI) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] pclmulqdq: "pclmulqdq"; - /// CLMUL (Carry-less Multiplication) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] rdrand: "rdrand"; - /// RDRAND - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] rdseed: "rdseed"; - /// RDSEED - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] tsc: "tsc"; - without cfg check: true; - /// TSC (Time Stamp Counter) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] mmx: "mmx"; - without cfg check: true; - /// MMX (MultiMedia eXtensions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse: "sse"; - /// SSE (Streaming SIMD Extensions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse2: "sse2"; - /// SSE2 (Streaming SIMD Extensions 2) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse3: "sse3"; - /// SSE3 (Streaming SIMD Extensions 3) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] ssse3: "ssse3"; - /// SSSE3 (Supplemental Streaming SIMD Extensions 3) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse4_1: "sse4.1"; - /// SSE4.1 (Streaming SIMD Extensions 4.1) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse4_2: "sse4.2"; - /// SSE4.2 (Streaming SIMD Extensions 4.2) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse4a: "sse4a"; - /// SSE4a (Streaming SIMD Extensions 4a) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sha: "sha"; - /// SHA - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx: "avx"; - /// AVX (Advanced Vector Extensions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx2: "avx2"; - /// AVX2 (Advanced Vector Extensions 2) - @FEATURE: #[stable(feature = "sha512_sm_x86", since = "1.89.0")] sha512: "sha512"; - /// SHA512 - @FEATURE: #[stable(feature = "sha512_sm_x86", since = "1.89.0")] sm3: "sm3"; - /// SM3 - @FEATURE: #[stable(feature = "sha512_sm_x86", since = "1.89.0")] sm4: "sm4"; - /// SM4 - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512f: "avx512f" ; - /// AVX-512 F (Foundation) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512cd: "avx512cd" ; - /// AVX-512 CD (Conflict Detection Instructions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512er: "avx512er"; - without cfg check: true; - /// AVX-512 ER (Expo nential and Reciprocal Instructions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512pf: "avx512pf"; - without cfg check: true; - /// AVX-512 PF (Prefetch Instructions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512bw: "avx512bw"; - /// AVX-512 BW (Byte and Word Instructions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512dq: "avx512dq"; - /// AVX-512 DQ (Doubleword and Quadword) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vl: "avx512vl"; - /// AVX-512 VL (Vector Length Extensions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512ifma: "avx512ifma"; - /// AVX-512 IFMA (Integer Fused Multiply Add) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vbmi: "avx512vbmi"; - /// AVX-512 VBMI (Vector Byte Manipulation Instructions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vpopcntdq: "avx512vpopcntdq"; - /// AVX-512 VPOPCNTDQ (Vector Population Count Doubleword and Quadword) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vbmi2: "avx512vbmi2"; - /// AVX-512 VBMI2 (Additional byte, word, dword and qword capabilities) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] gfni: "gfni"; - /// AVX-512 GFNI (Galois Field New Instruction) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] vaes: "vaes"; - /// AVX-512 VAES (Vector AES instruction) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] vpclmulqdq: "vpclmulqdq"; - /// AVX-512 VPCLMULQDQ (Vector PCLMULQDQ instructions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vnni: "avx512vnni"; - /// AVX-512 VNNI (Vector Neural Network Instructions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512bitalg: "avx512bitalg"; - /// AVX-512 BITALG (Support for VPOPCNT\[B,W\] and VPSHUFBITQMB) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512bf16: "avx512bf16"; - /// AVX-512 BF16 (BFLOAT16 instructions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vp2intersect: "avx512vp2intersect"; - /// AVX-512 P2INTERSECT - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512fp16: "avx512fp16"; - /// AVX-512 FP16 (FLOAT16 instructions) - @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxifma: "avxifma"; - /// AVX-IFMA (Integer Fused Multiply Add) - @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxneconvert: "avxneconvert"; - /// AVX-NE-CONVERT (Exceptionless Convert) - @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxvnni: "avxvnni"; - /// AVX-VNNI (Vector Neural Network Instructions) - @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxvnniint16: "avxvnniint16"; - /// AVX-VNNI_INT8 (VNNI with 16-bit Integers) - @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxvnniint8: "avxvnniint8"; - /// AVX-VNNI_INT16 (VNNI with 8-bit integers) - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_tile: "amx-tile"; - /// AMX (Advanced Matrix Extensions) - Tile load/store - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_int8: "amx-int8"; - /// AMX-INT8 (Operations on 8-bit integers) - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_bf16: "amx-bf16"; - /// AMX-BF16 (BFloat16 Operations) - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_fp16: "amx-fp16"; - /// AMX-FP16 (Float16 Operations) - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_complex: "amx-complex"; - /// AMX-COMPLEX (Complex number Operations) - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_avx512: "amx-avx512"; - /// AMX-AVX512 (AVX512 operations extended to matrices) - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_fp8: "amx-fp8"; - /// AMX-FP8 (Float8 Operations) - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_movrs: "amx-movrs"; - /// AMX-MOVRS (Matrix MOVERS operations) - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_tf32: "amx-tf32"; - /// AMX-TF32 (TensorFloat32 Operations) - @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_transpose: "amx-transpose"; - /// AMX-TRANSPOSE (Matrix Transpose Operations) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] f16c: "f16c"; - /// F16C (Conversions between IEEE-754 `binary16` and `binary32` formats) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] fma: "fma"; - /// FMA (Fused Multiply Add) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] bmi1: "bmi1" ; - /// BMI1 (Bit Manipulation Instructions 1) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] bmi2: "bmi2" ; - /// BMI2 (Bit Manipulation Instructions 2) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] lzcnt: "lzcnt"; - /// ABM (Advanced Bit Manipulation) / LZCNT (Leading Zero Count) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] tbm: "tbm"; - /// TBM (Trailing Bit Manipulation) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] popcnt: "popcnt"; - /// POPCNT (Population Count) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] fxsr: "fxsr"; - /// FXSR (Floating-point context fast save and restore) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsave: "xsave"; - /// XSAVE (Save Processor Extended States) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsaveopt: "xsaveopt"; - /// XSAVEOPT (Save Processor Extended States Optimized) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsaves: "xsaves"; - /// XSAVES (Save Processor Extended States Supervisor) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsavec: "xsavec"; - /// XSAVEC (Save Processor Extended States Compacted) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] cmpxchg16b: "cmpxchg16b"; - /// CMPXCH16B (16-byte compare-and-swap instruction) - @FEATURE: #[stable(feature = "keylocker_x86", since = "1.89.0")] kl: "kl"; - /// Intel Key Locker - @FEATURE: #[stable(feature = "keylocker_x86", since = "1.89.0")] widekl: "widekl"; - /// Intel Key Locker Wide - @FEATURE: #[stable(feature = "simd_x86_adx", since = "1.33.0")] adx: "adx"; - /// ADX, Intel ADX (Multi-Precision Add-Carry Instruction Extensions) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] rtm: "rtm"; - /// RTM, Intel (Restricted Transactional Memory) - @FEATURE: #[stable(feature = "movbe_target_feature", since = "1.67.0")] movbe: "movbe"; - /// MOVBE (Move Data After Swapping Bytes) - @FEATURE: #[unstable(feature = "movrs_target_feature", issue = "137976")] movrs: "movrs"; - /// MOVRS (Move data with the read-shared hint) - @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] ermsb: "ermsb"; - /// ERMSB, Enhanced REP MOVSB and STOSB - @FEATURE: #[unstable(feature = "xop_target_feature", issue = "127208")] xop: "xop"; - /// XOP: eXtended Operations (AMD) -} diff --git a/library/stdarch/crates/std_detect/src/detect/bit.rs b/library/stdarch/crates/std_detect/src/detect/bit.rs deleted file mode 100644 index 6f06c5523e4..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/bit.rs +++ /dev/null @@ -1,9 +0,0 @@ -//! Bit manipulation utilities. - -/// Tests the `bit` of `x`. -#[allow(dead_code)] -#[inline] -pub(crate) fn test(x: usize, bit: u32) -> bool { - debug_assert!(bit < usize::BITS, "bit index out-of-bounds"); - x & (1 << bit) != 0 -} diff --git a/library/stdarch/crates/std_detect/src/detect/cache.rs b/library/stdarch/crates/std_detect/src/detect/cache.rs deleted file mode 100644 index 83bcedea612..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/cache.rs +++ /dev/null @@ -1,223 +0,0 @@ -//! Caches run-time feature detection so that it only needs to be computed -//! once. - -#![allow(dead_code)] // not used on all platforms - -use core::sync::atomic::Ordering; - -use core::sync::atomic::AtomicUsize; - -/// Sets the `bit` of `x`. -#[inline] -const fn set_bit(x: u128, bit: u32) -> u128 { - x | 1 << bit -} - -/// Tests the `bit` of `x`. -#[inline] -const fn test_bit(x: u128, bit: u32) -> bool { - x & (1 << bit) != 0 -} - -/// Unset the `bit of `x`. -#[inline] -const fn unset_bit(x: u128, bit: u32) -> u128 { - x & !(1 << bit) -} - -/// Maximum number of features that can be cached. -const CACHE_CAPACITY: u32 = 93; - -/// This type is used to initialize the cache -// The derived `Default` implementation will initialize the field to zero, -// which is what we want. -#[derive(Copy, Clone, Default, PartialEq, Eq)] -pub(crate) struct Initializer(u128); - -// NOTE: the `debug_assert!` would catch that we do not add more Features than -// the one fitting our cache. -impl Initializer { - /// Tests the `bit` of the cache. - #[inline] - pub(crate) fn test(self, bit: u32) -> bool { - debug_assert!( - bit < CACHE_CAPACITY, - "too many features, time to increase the cache size!" - ); - test_bit(self.0, bit) - } - - /// Sets the `bit` of the cache. - #[inline] - pub(crate) fn set(&mut self, bit: u32) { - debug_assert!( - bit < CACHE_CAPACITY, - "too many features, time to increase the cache size!" - ); - let v = self.0; - self.0 = set_bit(v, bit); - } - - /// Unsets the `bit` of the cache. - #[inline] - pub(crate) fn unset(&mut self, bit: u32) { - debug_assert!( - bit < CACHE_CAPACITY, - "too many features, time to increase the cache size!" - ); - let v = self.0; - self.0 = unset_bit(v, bit); - } -} - -/// This global variable is a cache of the features supported by the CPU. -// Note: the third slot is only used in x86 -// Another Slot can be added if needed without any change to `Initializer` -static CACHE: [Cache; 3] = [ - Cache::uninitialized(), - Cache::uninitialized(), - Cache::uninitialized(), -]; - -/// Feature cache with capacity for `size_of::<usize>() * 8 - 1` features. -/// -/// Note: 0 is used to represent an uninitialized cache, and (at least) the most -/// significant bit is set on any cache which has been initialized. -/// -/// Note: we use `Relaxed` atomic operations, because we are only interested in -/// the effects of operations on a single memory location. That is, we only need -/// "modification order", and not the full-blown "happens before". -struct Cache(AtomicUsize); - -impl Cache { - const CAPACITY: u32 = (core::mem::size_of::<usize>() * 8 - 1) as u32; - const MASK: usize = (1 << Cache::CAPACITY) - 1; - const INITIALIZED_BIT: usize = 1usize << Cache::CAPACITY; - - /// Creates an uninitialized cache. - #[allow(clippy::declare_interior_mutable_const)] - const fn uninitialized() -> Self { - Cache(AtomicUsize::new(0)) - } - - /// Is the `bit` in the cache set? Returns `None` if the cache has not been initialized. - #[inline] - pub(crate) fn test(&self, bit: u32) -> Option<bool> { - let cached = self.0.load(Ordering::Relaxed); - if cached == 0 { - None - } else { - Some(test_bit(cached as u128, bit)) - } - } - - /// Initializes the cache. - #[inline] - fn initialize(&self, value: usize) -> usize { - debug_assert_eq!((value & !Cache::MASK), 0); - self.0 - .store(value | Cache::INITIALIZED_BIT, Ordering::Relaxed); - value - } -} - -cfg_if::cfg_if! { - if #[cfg(feature = "std_detect_env_override")] { - #[inline] - fn disable_features(disable: &[u8], value: &mut Initializer) { - if let Ok(disable) = core::str::from_utf8(disable) { - for v in disable.split(" ") { - let _ = super::Feature::from_str(v).map(|v| value.unset(v as u32)); - } - } - } - - #[inline] - fn initialize(mut value: Initializer) -> Initializer { - use core::ffi::CStr; - const RUST_STD_DETECT_UNSTABLE: &CStr = c"RUST_STD_DETECT_UNSTABLE"; - cfg_if::cfg_if! { - if #[cfg(windows)] { - use alloc::vec; - #[link(name = "kernel32")] - unsafe extern "system" { - fn GetEnvironmentVariableA(name: *const u8, buffer: *mut u8, size: u32) -> u32; - } - let len = unsafe { GetEnvironmentVariableA(RUST_STD_DETECT_UNSTABLE.as_ptr().cast::<u8>(), core::ptr::null_mut(), 0) }; - if len > 0 { - // +1 to include the null terminator. - let mut env = vec![0; len as usize + 1]; - let len = unsafe { GetEnvironmentVariableA(RUST_STD_DETECT_UNSTABLE.as_ptr().cast::<u8>(), env.as_mut_ptr(), len + 1) }; - if len > 0 { - disable_features(&env[..len as usize], &mut value); - } - } - } else { - let env = unsafe { - libc::getenv(RUST_STD_DETECT_UNSTABLE.as_ptr()) - }; - if !env.is_null() { - let len = unsafe { libc::strlen(env) }; - let env = unsafe { core::slice::from_raw_parts(env as *const u8, len) }; - disable_features(env, &mut value); - } - } - } - do_initialize(value); - value - } - } else { - #[inline] - fn initialize(value: Initializer) -> Initializer { - do_initialize(value); - value - } - } -} - -#[inline] -fn do_initialize(value: Initializer) { - CACHE[0].initialize((value.0) as usize & Cache::MASK); - CACHE[1].initialize((value.0 >> Cache::CAPACITY) as usize & Cache::MASK); - CACHE[2].initialize((value.0 >> (2 * Cache::CAPACITY)) as usize & Cache::MASK); -} - -// We only have to detect features once, and it's fairly costly, so hint to LLVM -// that it should assume that cache hits are more common than misses (which is -// the point of caching). It's possibly unfortunate that this function needs to -// reach across modules like this to call `os::detect_features`, but it produces -// the best code out of several attempted variants. -// -// The `Initializer` that the cache was initialized with is returned, so that -// the caller can call `test()` on it without having to load the value from the -// cache again. -#[cold] -fn detect_and_initialize() -> Initializer { - initialize(super::os::detect_features()) -} - -/// Tests the `bit` of the storage. If the storage has not been initialized, -/// initializes it with the result of `os::detect_features()`. -/// -/// On its first invocation, it detects the CPU features and caches them in the -/// `CACHE` global variable as an `AtomicU64`. -/// -/// It uses the `Feature` variant to index into this variable as a bitset. If -/// the bit is set, the feature is enabled, and otherwise it is disabled. -/// -/// If the feature `std_detect_env_override` is enabled looks for the env -/// variable `RUST_STD_DETECT_UNSTABLE` and uses its content to disable -/// Features that would had been otherwise detected. -#[inline] -pub(crate) fn test(bit: u32) -> bool { - let (relative_bit, idx) = if bit < Cache::CAPACITY { - (bit, 0) - } else if bit < 2 * Cache::CAPACITY { - (bit - Cache::CAPACITY, 1) - } else { - (bit - 2 * Cache::CAPACITY, 2) - }; - CACHE[idx] - .test(relative_bit) - .unwrap_or_else(|| detect_and_initialize().test(bit)) -} diff --git a/library/stdarch/crates/std_detect/src/detect/macros.rs b/library/stdarch/crates/std_detect/src/detect/macros.rs deleted file mode 100644 index a2994fb7daa..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/macros.rs +++ /dev/null @@ -1,204 +0,0 @@ -#[macro_export] -#[allow_internal_unstable(stdarch_internal)] -#[unstable(feature = "stdarch_internal", issue = "none")] -macro_rules! detect_feature { - ($feature:tt, $feature_lit:tt) => { - $crate::detect_feature!($feature, $feature_lit : $feature_lit) - }; - ($feature:tt, $feature_lit:tt : $($target_feature_lit:tt),*) => { - $(cfg!(target_feature = $target_feature_lit) ||)* - $crate::detect::__is_feature_detected::$feature() - }; - ($feature:tt, $feature_lit:tt, without cfg check: true) => { - $crate::detect::__is_feature_detected::$feature() - }; -} - -#[allow(unused_macros, reason = "it's used in the features! macro below")] -macro_rules! check_cfg_feature { - ($feature:tt, $feature_lit:tt) => { - check_cfg_feature!($feature, $feature_lit : $feature_lit) - }; - ($feature:tt, $feature_lit:tt : $($target_feature_lit:tt),*) => { - $(cfg!(target_feature = $target_feature_lit);)* - }; - ($feature:tt, $feature_lit:tt, without cfg check: $feature_cfg_check:literal) => { - #[allow(unexpected_cfgs, reason = $feature_lit)] - { cfg!(target_feature = $feature_lit) } - }; -} - -#[allow(unused)] -macro_rules! features { - ( - @TARGET: $target:ident; - @CFG: $cfg:meta; - @MACRO_NAME: $macro_name:ident; - @MACRO_ATTRS: $(#[$macro_attrs:meta])* - $(@BIND_FEATURE_NAME: $bind_feature:tt; $feature_impl:tt; $(#[$deprecate_attr:meta];)?)* - $(@NO_RUNTIME_DETECTION: $nort_feature:tt; )* - $(@FEATURE: #[$stability_attr:meta] $feature:ident: $feature_lit:tt; - $(without cfg check: $feature_cfg_check:tt;)? - $(implied by target_features: [$($target_feature_lit:tt),*];)? - $(#[$feature_comment:meta])*)* - ) => { - #[macro_export] - $(#[$macro_attrs])* - #[allow_internal_unstable(stdarch_internal)] - #[cfg($cfg)] - #[doc(cfg($cfg))] - macro_rules! $macro_name { - $( - ($feature_lit) => { - $crate::detect_feature!($feature, $feature_lit $(, without cfg check: $feature_cfg_check)? $(: $($target_feature_lit),*)?) - }; - )* - $( - ($bind_feature) => { - { - $( - #[$deprecate_attr] macro_rules! deprecated_feature { {} => {}; } - deprecated_feature! {}; - )? - $crate::$macro_name!($feature_impl) - } - }; - )* - $( - ($nort_feature) => { - compile_error!( - concat!( - stringify!($nort_feature), - " feature cannot be detected at run-time" - ) - ) - }; - )* - ($t:tt,) => { - $crate::$macro_name!($t); - }; - ($t:tt) => { - compile_error!( - concat!( - concat!("unknown ", stringify!($target)), - concat!(" target feature: ", $t) - ) - ) - }; - } - - $(#[$macro_attrs])* - #[macro_export] - #[cfg(not($cfg))] - #[doc(cfg($cfg))] - macro_rules! $macro_name { - $( - ($feature_lit) => { - compile_error!( - concat!( - r#"This macro cannot be used on the current target. - You can prevent it from being used in other architectures by - guarding it behind a cfg("#, - stringify!($cfg), - ")." - ) - ) - }; - )* - $( - ($bind_feature) => { $crate::$macro_name!($feature_impl) }; - )* - $( - ($nort_feature) => { - compile_error!( - concat!( - stringify!($nort_feature), - " feature cannot be detected at run-time" - ) - ) - }; - )* - ($t:tt,) => { - $crate::$macro_name!($t); - }; - ($t:tt) => { - compile_error!( - concat!( - concat!("unknown ", stringify!($target)), - concat!(" target feature: ", $t) - ) - ) - }; - } - - #[test] - #[deny(unexpected_cfgs)] - #[deny(unfulfilled_lint_expectations)] - fn unexpected_cfgs() { - $( - check_cfg_feature!($feature, $feature_lit $(, without cfg check: $feature_cfg_check)? $(: $($target_feature_lit),*)?); - )* - } - - /// Each variant denotes a position in a bitset for a particular feature. - /// - /// PLEASE: do not use this, it is an implementation detail subject - /// to change. - #[doc(hidden)] - #[allow(non_camel_case_types)] - #[derive(Copy, Clone)] - #[repr(u8)] - #[unstable(feature = "stdarch_internal", issue = "none")] - #[cfg($cfg)] - pub(crate) enum Feature { - $( - $(#[$feature_comment])* - $feature, - )* - - // Do not add variants after last: - _last - } - - #[cfg($cfg)] - impl Feature { - pub(crate) fn to_str(self) -> &'static str { - match self { - $(Feature::$feature => $feature_lit,)* - Feature::_last => unreachable!(), - } - } - - #[cfg(feature = "std_detect_env_override")] - pub(crate) fn from_str(s: &str) -> Result<Feature, ()> { - match s { - $($feature_lit => Ok(Feature::$feature),)* - _ => Err(()) - } - } - } - - /// Each function performs run-time feature detection for a single - /// feature. This allow us to use stability attributes on a per feature - /// basis. - /// - /// PLEASE: do not use this, it is an implementation detail subject - /// to change. - #[doc(hidden)] - #[cfg($cfg)] - #[unstable(feature = "stdarch_internal", issue = "none")] - pub mod __is_feature_detected { - $( - - /// PLEASE: do not use this, it is an implementation detail - /// subject to change. - #[inline] - #[doc(hidden)] - #[$stability_attr] - pub fn $feature() -> bool { - $crate::detect::check_for($crate::detect::Feature::$feature) - } - )* - } - }; -} diff --git a/library/stdarch/crates/std_detect/src/detect/mod.rs b/library/stdarch/crates/std_detect/src/detect/mod.rs deleted file mode 100644 index 8fd3d957932..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/mod.rs +++ /dev/null @@ -1,120 +0,0 @@ -//! This module implements run-time feature detection. -//! -//! The `is_{arch}_feature_detected!("feature-name")` macros take the name of a -//! feature as a string-literal, and return a boolean indicating whether the -//! feature is enabled at run-time or not. -//! -//! These macros do two things: -//! * map the string-literal into an integer stored as a `Feature` enum, -//! * call a `os::check_for(x: Feature)` function that returns `true` if the -//! feature is enabled. -//! -//! The `Feature` enums are also implemented in the `arch/{target_arch}.rs` -//! modules. -//! -//! The `check_for` functions are, in general, Operating System dependent. Most -//! architectures do not allow user-space programs to query the feature bits -//! due to security concerns (x86 is the big exception). These functions are -//! implemented in the `os/{target_os}.rs` modules. - -use cfg_if::cfg_if; - -#[macro_use] -mod macros; - -mod arch; - -// This module needs to be public because the `is_{arch}_feature_detected!` -// macros expand calls to items within it in user crates. -#[doc(hidden)] -#[unstable(feature = "stdarch_internal", issue = "none")] -pub use self::arch::__is_feature_detected; - -pub(crate) use self::arch::Feature; - -mod bit; -mod cache; - -cfg_if! { - if #[cfg(miri)] { - // When running under miri all target-features that are not enabled at - // compile-time are reported as disabled at run-time. - // - // For features for which `cfg(target_feature)` returns true, - // this run-time detection logic is never called. - #[path = "os/other.rs"] - mod os; - } else if #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] { - // On x86/x86_64 no OS specific functionality is required. - #[path = "os/x86.rs"] - mod os; - } else if #[cfg(all(any(target_os = "linux", target_os = "android"), feature = "libc"))] { - #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))] - #[path = "os/riscv.rs"] - mod riscv; - #[path = "os/linux/mod.rs"] - mod os; - } else if #[cfg(all(target_os = "freebsd", feature = "libc"))] { - #[cfg(target_arch = "aarch64")] - #[path = "os/aarch64.rs"] - mod aarch64; - #[path = "os/freebsd/mod.rs"] - mod os; - } else if #[cfg(all(target_os = "openbsd", target_arch = "aarch64", feature = "libc"))] { - #[allow(dead_code)] // we don't use code that calls the mrs instruction. - #[path = "os/aarch64.rs"] - mod aarch64; - #[path = "os/openbsd/aarch64.rs"] - mod os; - } else if #[cfg(all(target_os = "windows", any(target_arch = "aarch64", target_arch = "arm64ec")))] { - #[path = "os/windows/aarch64.rs"] - mod os; - } else if #[cfg(all(target_vendor = "apple", target_arch = "aarch64", feature = "libc"))] { - #[path = "os/darwin/aarch64.rs"] - mod os; - } else { - #[path = "os/other.rs"] - mod os; - } -} - -/// Performs run-time feature detection. -#[inline] -#[allow(dead_code)] -fn check_for(x: Feature) -> bool { - cache::test(x as u32) -} - -/// Returns an `Iterator<Item=(&'static str, bool)>` where -/// `Item.0` is the feature name, and `Item.1` is a `bool` which -/// is `true` if the feature is supported by the host and `false` otherwise. -#[unstable(feature = "stdarch_internal", issue = "none")] -pub fn features() -> impl Iterator<Item = (&'static str, bool)> { - cfg_if! { - if #[cfg(any( - target_arch = "x86", - target_arch = "x86_64", - target_arch = "arm", - target_arch = "aarch64", - target_arch = "arm64ec", - target_arch = "riscv32", - target_arch = "riscv64", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "mips", - target_arch = "mips64", - target_arch = "loongarch64", - target_arch = "s390x", - ))] { - (0_u8..Feature::_last as u8).map(|discriminant: u8| { - #[allow(bindings_with_variant_name)] // RISC-V has Feature::f - let f: Feature = unsafe { core::mem::transmute(discriminant) }; - let name: &'static str = f.to_str(); - let enabled: bool = check_for(f); - (name, enabled) - }) - } else { - None.into_iter() - } - } -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/aarch64.rs b/library/stdarch/crates/std_detect/src/detect/os/aarch64.rs deleted file mode 100644 index 1ff2a17e6e1..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/aarch64.rs +++ /dev/null @@ -1,130 +0,0 @@ -//! Run-time feature detection for Aarch64 on any OS that emulates the mrs instruction. -//! -//! On FreeBSD >= 12.0, Linux >= 4.11 and other operating systems, it is possible to use -//! privileged system registers from userspace to check CPU feature support. -//! -//! AArch64 system registers ID_AA64ISAR0_EL1, ID_AA64PFR0_EL1, ID_AA64ISAR1_EL1 -//! have bits dedicated to features like AdvSIMD, CRC32, AES, atomics (LSE), etc. -//! Each part of the register indicates the level of support for a certain feature, e.g. -//! when ID_AA64ISAR0_EL1\[7:4\] is >= 1, AES is supported; when it's >= 2, PMULL is supported. -//! -//! For proper support of [SoCs where different cores have different capabilities](https://medium.com/@jadr2ddude/a-big-little-problem-a-tale-of-big-little-gone-wrong-e7778ce744bb), -//! the OS has to always report only the features supported by all cores, like [FreeBSD does](https://reviews.freebsd.org/D17137#393947). -//! -//! References: -//! -//! - [Zircon implementation](https://fuchsia.googlesource.com/zircon/+/master/kernel/arch/arm64/feature.cpp) -//! - [Linux documentation](https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt) -//! - [ARM documentation](https://developer.arm.com/documentation/ddi0601/2022-12/AArch64-Registers?lang=en) - -use crate::detect::{Feature, cache}; -use core::arch::asm; - -/// Try to read the features from the system registers. -/// -/// This will cause SIGILL if the current OS is not trapping the mrs instruction. -pub(crate) fn detect_features() -> cache::Initializer { - // ID_AA64ISAR0_EL1 - Instruction Set Attribute Register 0 - let aa64isar0: u64; - unsafe { - asm!( - "mrs {}, ID_AA64ISAR0_EL1", - out(reg) aa64isar0, - options(pure, nomem, preserves_flags, nostack) - ); - } - - // ID_AA64ISAR1_EL1 - Instruction Set Attribute Register 1 - let aa64isar1: u64; - unsafe { - asm!( - "mrs {}, ID_AA64ISAR1_EL1", - out(reg) aa64isar1, - options(pure, nomem, preserves_flags, nostack) - ); - } - - // ID_AA64MMFR2_EL1 - AArch64 Memory Model Feature Register 2 - let aa64mmfr2: u64; - unsafe { - asm!( - "mrs {}, ID_AA64MMFR2_EL1", - out(reg) aa64mmfr2, - options(pure, nomem, preserves_flags, nostack) - ); - } - - // ID_AA64PFR0_EL1 - Processor Feature Register 0 - let aa64pfr0: u64; - unsafe { - asm!( - "mrs {}, ID_AA64PFR0_EL1", - out(reg) aa64pfr0, - options(pure, nomem, preserves_flags, nostack) - ); - } - - parse_system_registers(aa64isar0, aa64isar1, aa64mmfr2, Some(aa64pfr0)) -} - -pub(crate) fn parse_system_registers( - aa64isar0: u64, - aa64isar1: u64, - aa64mmfr2: u64, - aa64pfr0: Option<u64>, -) -> cache::Initializer { - let mut value = cache::Initializer::default(); - - let mut enable_feature = |f, enable| { - if enable { - value.set(f as u32); - } - }; - - // ID_AA64ISAR0_EL1 - Instruction Set Attribute Register 0 - enable_feature(Feature::pmull, bits_shift(aa64isar0, 7, 4) >= 2); - enable_feature(Feature::tme, bits_shift(aa64isar0, 27, 24) == 1); - enable_feature(Feature::lse, bits_shift(aa64isar0, 23, 20) >= 2); - enable_feature(Feature::crc, bits_shift(aa64isar0, 19, 16) >= 1); - - // ID_AA64PFR0_EL1 - Processor Feature Register 0 - if let Some(aa64pfr0) = aa64pfr0 { - let fp = bits_shift(aa64pfr0, 19, 16) < 0xF; - let fphp = bits_shift(aa64pfr0, 19, 16) >= 1; - let asimd = bits_shift(aa64pfr0, 23, 20) < 0xF; - let asimdhp = bits_shift(aa64pfr0, 23, 20) >= 1; - enable_feature(Feature::fp, fp); - enable_feature(Feature::fp16, fphp); - // SIMD support requires float support - if half-floats are - // supported, it also requires half-float support: - enable_feature(Feature::asimd, fp && asimd && (!fphp | asimdhp)); - // SIMD extensions require SIMD support: - enable_feature(Feature::aes, asimd && bits_shift(aa64isar0, 7, 4) >= 2); - let sha1 = bits_shift(aa64isar0, 11, 8) >= 1; - let sha2 = bits_shift(aa64isar0, 15, 12) >= 1; - enable_feature(Feature::sha2, asimd && sha1 && sha2); - enable_feature(Feature::rdm, asimd && bits_shift(aa64isar0, 31, 28) >= 1); - enable_feature( - Feature::dotprod, - asimd && bits_shift(aa64isar0, 47, 44) >= 1, - ); - enable_feature(Feature::sve, asimd && bits_shift(aa64pfr0, 35, 32) >= 1); - } - - // ID_AA64ISAR1_EL1 - Instruction Set Attribute Register 1 - // Check for either APA or API field - enable_feature(Feature::paca, bits_shift(aa64isar1, 11, 4) >= 1); - enable_feature(Feature::rcpc, bits_shift(aa64isar1, 23, 20) >= 1); - // Check for either GPA or GPI field - enable_feature(Feature::pacg, bits_shift(aa64isar1, 31, 24) >= 1); - - // ID_AA64MMFR2_EL1 - AArch64 Memory Model Feature Register 2 - enable_feature(Feature::lse2, bits_shift(aa64mmfr2, 35, 32) >= 1); - - value -} - -#[inline] -fn bits_shift(x: u64, high: usize, low: usize) -> u64 { - (x >> low) & ((1 << (high - low + 1)) - 1) -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/darwin/aarch64.rs b/library/stdarch/crates/std_detect/src/detect/os/darwin/aarch64.rs deleted file mode 100644 index 44d921689e5..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/darwin/aarch64.rs +++ /dev/null @@ -1,155 +0,0 @@ -//! Run-time feature detection for aarch64 on Darwin (macOS/iOS/tvOS/watchOS/visionOS). -//! -//! <https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_instruction_set_characteristics> - -use crate::detect::{Feature, cache}; -use core::ffi::CStr; - -#[inline] -fn _sysctlbyname(name: &CStr) -> bool { - use libc; - - let mut enabled: i32 = 0; - let mut enabled_len: usize = 4; - let enabled_ptr = &mut enabled as *mut i32 as *mut libc::c_void; - - let ret = unsafe { - libc::sysctlbyname( - name.as_ptr(), - enabled_ptr, - &mut enabled_len, - core::ptr::null_mut(), - 0, - ) - }; - - match ret { - 0 => enabled != 0, - _ => false, - } -} - -/// Try to read the features using sysctlbyname. -pub(crate) fn detect_features() -> cache::Initializer { - let mut value = cache::Initializer::default(); - - let mut enable_feature = |f, enable| { - if enable { - value.set(f as u32); - } - }; - - // Armv8.0 features not using the standard identifiers - let fp = _sysctlbyname(c"hw.optional.floatingpoint"); - let asimd = _sysctlbyname(c"hw.optional.AdvSIMD"); - let crc = _sysctlbyname(c"hw.optional.armv8_crc32"); - - // Armv8 and Armv9 features using the standard identifiers - let aes = _sysctlbyname(c"hw.optional.arm.FEAT_AES"); - let bf16 = _sysctlbyname(c"hw.optional.arm.FEAT_BF16"); - let bti = _sysctlbyname(c"hw.optional.arm.FEAT_BTI"); - let cssc = _sysctlbyname(c"hw.optional.arm.FEAT_CSSC"); - let dit = _sysctlbyname(c"hw.optional.arm.FEAT_DIT"); - let dpb = _sysctlbyname(c"hw.optional.arm.FEAT_DPB"); - let dpb2 = _sysctlbyname(c"hw.optional.arm.FEAT_DPB2"); - let dotprod = _sysctlbyname(c"hw.optional.arm.FEAT_DotProd"); - let ecv = _sysctlbyname(c"hw.optional.arm.FEAT_ECV"); - let fcma = _sysctlbyname(c"hw.optional.arm.FEAT_FCMA"); - let fhm = _sysctlbyname(c"hw.optional.arm.FEAT_FHM"); - let fp16 = _sysctlbyname(c"hw.optional.arm.FEAT_FP16"); - let frintts = _sysctlbyname(c"hw.optional.arm.FEAT_FRINTTS"); - let flagm = _sysctlbyname(c"hw.optional.arm.FEAT_FlagM"); - let flagm2 = _sysctlbyname(c"hw.optional.arm.FEAT_FlagM2"); - let hbc = _sysctlbyname(c"hw.optional.arm.FEAT_HBC"); - let i8mm = _sysctlbyname(c"hw.optional.arm.FEAT_I8MM"); - let jsconv = _sysctlbyname(c"hw.optional.arm.FEAT_JSCVT"); - let rcpc = _sysctlbyname(c"hw.optional.arm.FEAT_LRCPC"); - let rcpc2 = _sysctlbyname(c"hw.optional.arm.FEAT_LRCPC2"); - let lse = _sysctlbyname(c"hw.optional.arm.FEAT_LSE"); - let lse2 = _sysctlbyname(c"hw.optional.arm.FEAT_LSE2"); - let pauth = _sysctlbyname(c"hw.optional.arm.FEAT_PAuth"); - let pmull = _sysctlbyname(c"hw.optional.arm.FEAT_PMULL"); - let rdm = _sysctlbyname(c"hw.optional.arm.FEAT_RDM"); - let sb = _sysctlbyname(c"hw.optional.arm.FEAT_SB"); - let sha1 = _sysctlbyname(c"hw.optional.arm.FEAT_SHA1"); - let sha256 = _sysctlbyname(c"hw.optional.arm.FEAT_SHA256"); - let sha3 = _sysctlbyname(c"hw.optional.arm.FEAT_SHA3"); - let sha512 = _sysctlbyname(c"hw.optional.arm.FEAT_SHA512"); - let sme = _sysctlbyname(c"hw.optional.arm.FEAT_SME"); - let sme2 = _sysctlbyname(c"hw.optional.arm.FEAT_SME2"); - let sme_f64f64 = _sysctlbyname(c"hw.optional.arm.FEAT_SME_F64F64"); - let sme_i16i64 = _sysctlbyname(c"hw.optional.arm.FEAT_SME_I16I64"); - let ssbs = _sysctlbyname(c"hw.optional.arm.FEAT_SSBS"); - let wfxt = _sysctlbyname(c"hw.optional.arm.FEAT_WFxT"); - - // The following features are not exposed by `is_aarch64_feature_detected`, - // but *are* reported by `sysctl`. They are here as documentation that they - // exist, and may potentially be exposed later. - /* - let afp = _sysctlbyname(c"hw.optional.arm.FEAT_AFP"); - let csv2 = _sysctlbyname(c"hw.optional.arm.FEAT_CSV2"); - let csv3 = _sysctlbyname(c"hw.optional.arm.FEAT_CSV3"); - let ebf16 = _sysctlbyname(c"hw.optional.arm.FEAT_EBF16"); - let fpac = _sysctlbyname(c"hw.optional.arm.FEAT_FPAC"); - let fpaccombine = _sysctlbyname(c"hw.optional.arm.FEAT_FPACCOMBINE"); - let pacimp = _sysctlbyname(c"hw.optional.arm.FEAT_PACIMP"); - let pauth2 = _sysctlbyname(c"hw.optional.arm.FEAT_PAuth2"); - let rpres = _sysctlbyname(c"hw.optional.arm.FEAT_RPRES"); - let specres = _sysctlbyname(c"hw.optional.arm.FEAT_SPECRES"); - let specres2 = _sysctlbyname(c"hw.optional.arm.FEAT_SPECRES2"); - */ - - // The following "features" are reported by `sysctl` but are mandatory parts - // of SME or SME2, and so are not exposed separately by - // `is_aarch64_feature_detected`. They are here to document their - // existence, in case they're needed in the future. - /* - let sme_b16f32 = _sysctlbyname(c"hw.optional.arm.SME_B16F32"); - let sme_bi32i32 = _sysctlbyname(c"hw.optional.arm.SME_BI32I32"); - let sme_f16f32 = _sysctlbyname(c"hw.optional.arm.SME_F16F32"); - let sme_f32f32 = _sysctlbyname(c"hw.optional.arm.SME_F32F32"); - let sme_i16i32 = _sysctlbyname(c"hw.optional.arm.SME_I16I32"); - let sme_i8i32 = _sysctlbyname(c"hw.optional.arm.SME_I8I32"); - */ - - enable_feature(Feature::aes, aes && pmull); - enable_feature(Feature::asimd, asimd); - enable_feature(Feature::bf16, bf16); - enable_feature(Feature::bti, bti); - enable_feature(Feature::crc, crc); - enable_feature(Feature::cssc, cssc); - enable_feature(Feature::dit, dit); - enable_feature(Feature::dotprod, dotprod); - enable_feature(Feature::dpb, dpb); - enable_feature(Feature::dpb2, dpb2); - enable_feature(Feature::ecv, ecv); - enable_feature(Feature::fcma, fcma); - enable_feature(Feature::fhm, fhm); - enable_feature(Feature::flagm, flagm); - enable_feature(Feature::flagm2, flagm2); - enable_feature(Feature::fp, fp); - enable_feature(Feature::fp16, fp16); - enable_feature(Feature::frintts, frintts); - enable_feature(Feature::hbc, hbc); - enable_feature(Feature::i8mm, i8mm); - enable_feature(Feature::jsconv, jsconv); - enable_feature(Feature::lse, lse); - enable_feature(Feature::lse2, lse2); - enable_feature(Feature::paca, pauth); - enable_feature(Feature::pacg, pauth); - enable_feature(Feature::pmull, aes && pmull); - enable_feature(Feature::rcpc, rcpc); - enable_feature(Feature::rcpc2, rcpc2); - enable_feature(Feature::rdm, rdm); - enable_feature(Feature::sb, sb); - enable_feature(Feature::sha2, sha1 && sha256 && asimd); - enable_feature(Feature::sha3, sha512 && sha3 && asimd); - enable_feature(Feature::sme, sme); - enable_feature(Feature::sme2, sme2); - enable_feature(Feature::sme_f64f64, sme_f64f64); - enable_feature(Feature::sme_i16i64, sme_i16i64); - enable_feature(Feature::ssbs, ssbs); - enable_feature(Feature::wfxt, wfxt); - - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/freebsd/aarch64.rs b/library/stdarch/crates/std_detect/src/detect/os/freebsd/aarch64.rs deleted file mode 100644 index ccc48f53605..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/freebsd/aarch64.rs +++ /dev/null @@ -1,3 +0,0 @@ -//! Run-time feature detection for Aarch64 on FreeBSD. - -pub(crate) use super::super::aarch64::detect_features; diff --git a/library/stdarch/crates/std_detect/src/detect/os/freebsd/arm.rs b/library/stdarch/crates/std_detect/src/detect/os/freebsd/arm.rs deleted file mode 100644 index 0a15156e1bd..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/freebsd/arm.rs +++ /dev/null @@ -1,36 +0,0 @@ -//! Run-time feature detection for ARM on FreeBSD - -use super::auxvec; -use crate::detect::{Feature, cache}; - -// Defined in machine/elf.h. -// https://github.com/freebsd/freebsd-src/blob/deb63adf945d446ed91a9d84124c71f15ae571d1/sys/arm/include/elf.h -const HWCAP_NEON: usize = 0x00001000; -const HWCAP2_AES: usize = 0x00000001; -const HWCAP2_PMULL: usize = 0x00000002; -const HWCAP2_SHA1: usize = 0x00000004; -const HWCAP2_SHA2: usize = 0x00000008; -const HWCAP2_CRC32: usize = 0x00000010; - -/// Try to read the features from the auxiliary vector -pub(crate) fn detect_features() -> cache::Initializer { - let mut value = cache::Initializer::default(); - let enable_feature = |value: &mut cache::Initializer, f, enable| { - if enable { - value.set(f as u32); - } - }; - - if let Ok(auxv) = auxvec::auxv() { - enable_feature(&mut value, Feature::neon, auxv.hwcap & HWCAP_NEON != 0); - enable_feature(&mut value, Feature::pmull, auxv.hwcap2 & HWCAP2_PMULL != 0); - enable_feature(&mut value, Feature::crc, auxv.hwcap2 & HWCAP2_CRC32 != 0); - enable_feature(&mut value, Feature::aes, auxv.hwcap2 & HWCAP2_AES != 0); - // SHA2 requires SHA1 & SHA2 features - let sha1 = auxv.hwcap2 & HWCAP2_SHA1 != 0; - let sha2 = auxv.hwcap2 & HWCAP2_SHA2 != 0; - enable_feature(&mut value, Feature::sha2, sha1 && sha2); - return value; - } - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/freebsd/auxvec.rs b/library/stdarch/crates/std_detect/src/detect/os/freebsd/auxvec.rs deleted file mode 100644 index 4e72bf22d76..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/freebsd/auxvec.rs +++ /dev/null @@ -1,66 +0,0 @@ -//! Parses ELF auxiliary vectors. -#![cfg_attr( - any( - target_arch = "aarch64", - target_arch = "arm", - target_arch = "powerpc64", - target_arch = "riscv64" - ), - allow(dead_code) -)] - -/// Cache HWCAP bitfields of the ELF Auxiliary Vector. -/// -/// If an entry cannot be read all the bits in the bitfield are set to zero. -/// This should be interpreted as all the features being disabled. -#[derive(Debug, Copy, Clone)] -pub(crate) struct AuxVec { - pub hwcap: usize, - pub hwcap2: usize, -} - -/// ELF Auxiliary Vector -/// -/// The auxiliary vector is a memory region in a running ELF program's stack -/// composed of (key: usize, value: usize) pairs. -/// -/// The keys used in the aux vector are platform dependent. For FreeBSD, they are -/// defined in [sys/elf_common.h][elf_common_h]. The hardware capabilities of a given -/// CPU can be queried with the `AT_HWCAP` and `AT_HWCAP2` keys. -/// -/// Note that run-time feature detection is not invoked for features that can -/// be detected at compile-time. -/// -/// [elf_common.h]: https://svnweb.freebsd.org/base/release/12.0.0/sys/sys/elf_common.h?revision=341707 -pub(crate) fn auxv() -> Result<AuxVec, ()> { - let hwcap = archauxv(libc::AT_HWCAP); - let hwcap2 = archauxv(libc::AT_HWCAP2); - // Zero could indicate that no features were detected, but it's also used to - // indicate an error. In particular, on many platforms AT_HWCAP2 will be - // legitimately zero, since it contains the most recent feature flags. - if hwcap != 0 || hwcap2 != 0 { - return Ok(AuxVec { hwcap, hwcap2 }); - } - Err(()) -} - -/// Tries to read the `key` from the auxiliary vector. -fn archauxv(key: libc::c_int) -> usize { - const OUT_LEN: libc::c_int = core::mem::size_of::<libc::c_ulong>() as libc::c_int; - let mut out: libc::c_ulong = 0; - unsafe { - // elf_aux_info is available on FreeBSD 12.0+ and 11.4+: - // https://github.com/freebsd/freebsd-src/commit/0b08ae2120cdd08c20a2b806e2fcef4d0a36c470 - // https://github.com/freebsd/freebsd-src/blob/release/11.4.0/sys/sys/auxv.h - // FreeBSD 11 support in std has been removed in Rust 1.75 (https://github.com/rust-lang/rust/pull/114521), - // so we can safely use this function. - let res = libc::elf_aux_info( - key, - &mut out as *mut libc::c_ulong as *mut libc::c_void, - OUT_LEN, - ); - // If elf_aux_info fails, `out` will be left at zero (which is the proper default value). - debug_assert!(res == 0 || out == 0); - } - out as usize -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/freebsd/mod.rs b/library/stdarch/crates/std_detect/src/detect/os/freebsd/mod.rs deleted file mode 100644 index ade7fb6269d..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/freebsd/mod.rs +++ /dev/null @@ -1,22 +0,0 @@ -//! Run-time feature detection on FreeBSD - -mod auxvec; - -cfg_if::cfg_if! { - if #[cfg(target_arch = "aarch64")] { - mod aarch64; - pub(crate) use self::aarch64::detect_features; - } else if #[cfg(target_arch = "arm")] { - mod arm; - pub(crate) use self::arm::detect_features; - } else if #[cfg(target_arch = "powerpc64")] { - mod powerpc; - pub(crate) use self::powerpc::detect_features; - } else { - use crate::detect::cache; - /// Performs run-time feature detection. - pub(crate) fn detect_features() -> cache::Initializer { - cache::Initializer::default() - } - } -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/freebsd/powerpc.rs b/library/stdarch/crates/std_detect/src/detect/os/freebsd/powerpc.rs deleted file mode 100644 index d03af68cd08..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/freebsd/powerpc.rs +++ /dev/null @@ -1,21 +0,0 @@ -//! Run-time feature detection for PowerPC on FreeBSD. - -use super::auxvec; -use crate::detect::{Feature, cache}; - -pub(crate) fn detect_features() -> cache::Initializer { - let mut value = cache::Initializer::default(); - let enable_feature = |value: &mut cache::Initializer, f, enable| { - if enable { - value.set(f as u32); - } - }; - - if let Ok(auxv) = auxvec::auxv() { - enable_feature(&mut value, Feature::altivec, auxv.hwcap & 0x10000000 != 0); - enable_feature(&mut value, Feature::vsx, auxv.hwcap & 0x00000080 != 0); - enable_feature(&mut value, Feature::power8, auxv.hwcap2 & 0x80000000 != 0); - return value; - } - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/aarch64.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/aarch64.rs deleted file mode 100644 index 22a9cefff7b..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/aarch64.rs +++ /dev/null @@ -1,484 +0,0 @@ -//! Run-time feature detection for Aarch64 on Linux. - -use super::auxvec; -use crate::detect::{Feature, bit, cache}; - -/// Try to read the features from the auxiliary vector. -pub(crate) fn detect_features() -> cache::Initializer { - #[cfg(target_os = "android")] - let is_exynos9810 = { - // Samsung Exynos 9810 has a bug that big and little cores have different - // ISAs. And on older Android (pre-9), the kernel incorrectly reports - // that features available only on some cores are available on all cores. - // https://reviews.llvm.org/D114523 - let mut arch = [0_u8; libc::PROP_VALUE_MAX as usize]; - let len = unsafe { - libc::__system_property_get(c"ro.arch".as_ptr(), arch.as_mut_ptr() as *mut libc::c_char) - }; - // On Exynos, ro.arch is not available on Android 12+, but it is fine - // because Android 9+ includes the fix. - len > 0 && arch.starts_with(b"exynos9810") - }; - #[cfg(not(target_os = "android"))] - let is_exynos9810 = false; - - if let Ok(auxv) = auxvec::auxv() { - let hwcap: AtHwcap = auxv.into(); - return hwcap.cache(is_exynos9810); - } - cache::Initializer::default() -} - -/// These values are part of the platform-specific [asm/hwcap.h][hwcap] . -/// -/// The names match those used for cpuinfo. -/// -/// [hwcap]: https://github.com/torvalds/linux/blob/master/arch/arm64/include/uapi/asm/hwcap.h -#[derive(Debug, Default, PartialEq)] -struct AtHwcap { - // AT_HWCAP - fp: bool, - asimd: bool, - // evtstrm: No LLVM support. - aes: bool, - pmull: bool, - sha1: bool, - sha2: bool, - crc32: bool, - atomics: bool, - fphp: bool, - asimdhp: bool, - // cpuid: No LLVM support. - asimdrdm: bool, - jscvt: bool, - fcma: bool, - lrcpc: bool, - dcpop: bool, - sha3: bool, - sm3: bool, - sm4: bool, - asimddp: bool, - sha512: bool, - sve: bool, - fhm: bool, - dit: bool, - uscat: bool, - ilrcpc: bool, - flagm: bool, - ssbs: bool, - sb: bool, - paca: bool, - pacg: bool, - - // AT_HWCAP2 - dcpodp: bool, - sve2: bool, - sveaes: bool, - svepmull: bool, - svebitperm: bool, - svesha3: bool, - svesm4: bool, - flagm2: bool, - frint: bool, - // svei8mm: See i8mm feature. - svef32mm: bool, - svef64mm: bool, - // svebf16: See bf16 feature. - i8mm: bool, - bf16: bool, - // dgh: No LLVM support. - rng: bool, - bti: bool, - mte: bool, - ecv: bool, - // afp: bool, - // rpres: bool, - // mte3: bool, - sme: bool, - smei16i64: bool, - smef64f64: bool, - // smei8i32: bool, - // smef16f32: bool, - // smeb16f32: bool, - // smef32f32: bool, - smefa64: bool, - wfxt: bool, - // ebf16: bool, - // sveebf16: bool, - cssc: bool, - // rprfm: bool, - sve2p1: bool, - sme2: bool, - sme2p1: bool, - // smei16i32: bool, - // smebi32i32: bool, - smeb16b16: bool, - smef16f16: bool, - mops: bool, - hbc: bool, - sveb16b16: bool, - lrcpc3: bool, - lse128: bool, - fpmr: bool, - lut: bool, - faminmax: bool, - f8cvt: bool, - f8fma: bool, - f8dp4: bool, - f8dp2: bool, - f8e4m3: bool, - f8e5m2: bool, - smelutv2: bool, - smef8f16: bool, - smef8f32: bool, - smesf8fma: bool, - smesf8dp4: bool, - smesf8dp2: bool, - // pauthlr: bool, -} - -impl From<auxvec::AuxVec> for AtHwcap { - /// Reads AtHwcap from the auxiliary vector. - fn from(auxv: auxvec::AuxVec) -> Self { - AtHwcap { - fp: bit::test(auxv.hwcap, 0), - asimd: bit::test(auxv.hwcap, 1), - // evtstrm: bit::test(auxv.hwcap, 2), - aes: bit::test(auxv.hwcap, 3), - pmull: bit::test(auxv.hwcap, 4), - sha1: bit::test(auxv.hwcap, 5), - sha2: bit::test(auxv.hwcap, 6), - crc32: bit::test(auxv.hwcap, 7), - atomics: bit::test(auxv.hwcap, 8), - fphp: bit::test(auxv.hwcap, 9), - asimdhp: bit::test(auxv.hwcap, 10), - // cpuid: bit::test(auxv.hwcap, 11), - asimdrdm: bit::test(auxv.hwcap, 12), - jscvt: bit::test(auxv.hwcap, 13), - fcma: bit::test(auxv.hwcap, 14), - lrcpc: bit::test(auxv.hwcap, 15), - dcpop: bit::test(auxv.hwcap, 16), - sha3: bit::test(auxv.hwcap, 17), - sm3: bit::test(auxv.hwcap, 18), - sm4: bit::test(auxv.hwcap, 19), - asimddp: bit::test(auxv.hwcap, 20), - sha512: bit::test(auxv.hwcap, 21), - sve: bit::test(auxv.hwcap, 22), - fhm: bit::test(auxv.hwcap, 23), - dit: bit::test(auxv.hwcap, 24), - uscat: bit::test(auxv.hwcap, 25), - ilrcpc: bit::test(auxv.hwcap, 26), - flagm: bit::test(auxv.hwcap, 27), - ssbs: bit::test(auxv.hwcap, 28), - sb: bit::test(auxv.hwcap, 29), - paca: bit::test(auxv.hwcap, 30), - pacg: bit::test(auxv.hwcap, 31), - - // AT_HWCAP2 - dcpodp: bit::test(auxv.hwcap2, 0), - sve2: bit::test(auxv.hwcap2, 1), - sveaes: bit::test(auxv.hwcap2, 2), - svepmull: bit::test(auxv.hwcap2, 3), - svebitperm: bit::test(auxv.hwcap2, 4), - svesha3: bit::test(auxv.hwcap2, 5), - svesm4: bit::test(auxv.hwcap2, 6), - flagm2: bit::test(auxv.hwcap2, 7), - frint: bit::test(auxv.hwcap2, 8), - // svei8mm: bit::test(auxv.hwcap2, 9), - svef32mm: bit::test(auxv.hwcap2, 10), - svef64mm: bit::test(auxv.hwcap2, 11), - // svebf16: bit::test(auxv.hwcap2, 12), - i8mm: bit::test(auxv.hwcap2, 13), - bf16: bit::test(auxv.hwcap2, 14), - // dgh: bit::test(auxv.hwcap2, 15), - rng: bit::test(auxv.hwcap2, 16), - bti: bit::test(auxv.hwcap2, 17), - mte: bit::test(auxv.hwcap2, 18), - ecv: bit::test(auxv.hwcap2, 19), - // afp: bit::test(auxv.hwcap2, 20), - // rpres: bit::test(auxv.hwcap2, 21), - // mte3: bit::test(auxv.hwcap2, 22), - sme: bit::test(auxv.hwcap2, 23), - smei16i64: bit::test(auxv.hwcap2, 24), - smef64f64: bit::test(auxv.hwcap2, 25), - // smei8i32: bit::test(auxv.hwcap2, 26), - // smef16f32: bit::test(auxv.hwcap2, 27), - // smeb16f32: bit::test(auxv.hwcap2, 28), - // smef32f32: bit::test(auxv.hwcap2, 29), - smefa64: bit::test(auxv.hwcap2, 30), - wfxt: bit::test(auxv.hwcap2, 31), - // ebf16: bit::test(auxv.hwcap2, 32), - // sveebf16: bit::test(auxv.hwcap2, 33), - cssc: bit::test(auxv.hwcap2, 34), - // rprfm: bit::test(auxv.hwcap2, 35), - sve2p1: bit::test(auxv.hwcap2, 36), - sme2: bit::test(auxv.hwcap2, 37), - sme2p1: bit::test(auxv.hwcap2, 38), - // smei16i32: bit::test(auxv.hwcap2, 39), - // smebi32i32: bit::test(auxv.hwcap2, 40), - smeb16b16: bit::test(auxv.hwcap2, 41), - smef16f16: bit::test(auxv.hwcap2, 42), - mops: bit::test(auxv.hwcap2, 43), - hbc: bit::test(auxv.hwcap2, 44), - sveb16b16: bit::test(auxv.hwcap2, 45), - lrcpc3: bit::test(auxv.hwcap2, 46), - lse128: bit::test(auxv.hwcap2, 47), - fpmr: bit::test(auxv.hwcap2, 48), - lut: bit::test(auxv.hwcap2, 49), - faminmax: bit::test(auxv.hwcap2, 50), - f8cvt: bit::test(auxv.hwcap2, 51), - f8fma: bit::test(auxv.hwcap2, 52), - f8dp4: bit::test(auxv.hwcap2, 53), - f8dp2: bit::test(auxv.hwcap2, 54), - f8e4m3: bit::test(auxv.hwcap2, 55), - f8e5m2: bit::test(auxv.hwcap2, 56), - smelutv2: bit::test(auxv.hwcap2, 57), - smef8f16: bit::test(auxv.hwcap2, 58), - smef8f32: bit::test(auxv.hwcap2, 59), - smesf8fma: bit::test(auxv.hwcap2, 60), - smesf8dp4: bit::test(auxv.hwcap2, 61), - smesf8dp2: bit::test(auxv.hwcap2, 62), - // pauthlr: bit::test(auxv.hwcap2, ??), - } - } -} - -impl AtHwcap { - /// Initializes the cache from the feature -bits. - /// - /// The feature dependencies here come directly from LLVM's feature definitions: - /// https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AArch64/AArch64.td - fn cache(self, is_exynos9810: bool) -> cache::Initializer { - let mut value = cache::Initializer::default(); - { - let mut enable_feature = |f, enable| { - if enable { - value.set(f as u32); - } - }; - - // Samsung Exynos 9810 has a bug that big and little cores have different - // ISAs. And on older Android (pre-9), the kernel incorrectly reports - // that features available only on some cores are available on all cores. - // So, only check features that are known to be available on exynos-m3: - // $ rustc --print cfg --target aarch64-linux-android -C target-cpu=exynos-m3 | grep target_feature - // See also https://github.com/rust-lang/stdarch/pull/1378#discussion_r1103748342. - if is_exynos9810 { - enable_feature(Feature::fp, self.fp); - enable_feature(Feature::crc, self.crc32); - // ASIMD support requires float support - if half-floats are - // supported, it also requires half-float support: - let asimd = self.fp && self.asimd && (!self.fphp | self.asimdhp); - enable_feature(Feature::asimd, asimd); - // Cryptographic extensions require ASIMD - // AES also covers FEAT_PMULL - enable_feature(Feature::aes, self.aes && self.pmull && asimd); - enable_feature(Feature::sha2, self.sha1 && self.sha2 && asimd); - return value; - } - - enable_feature(Feature::fp, self.fp); - // Half-float support requires float support - enable_feature(Feature::fp16, self.fp && self.fphp); - // FHM (fp16fml in LLVM) requires half float support - enable_feature(Feature::fhm, self.fphp && self.fhm); - enable_feature(Feature::pmull, self.pmull); - enable_feature(Feature::crc, self.crc32); - enable_feature(Feature::lse, self.atomics); - enable_feature(Feature::lse2, self.uscat); - enable_feature(Feature::lse128, self.lse128 && self.atomics); - enable_feature(Feature::rcpc, self.lrcpc); - // RCPC2 (rcpc-immo in LLVM) requires RCPC support - let rcpc2 = self.ilrcpc && self.lrcpc; - enable_feature(Feature::rcpc2, rcpc2); - enable_feature(Feature::rcpc3, self.lrcpc3 && rcpc2); - enable_feature(Feature::dit, self.dit); - enable_feature(Feature::flagm, self.flagm); - enable_feature(Feature::flagm2, self.flagm2); - enable_feature(Feature::ssbs, self.ssbs); - enable_feature(Feature::sb, self.sb); - enable_feature(Feature::paca, self.paca); - enable_feature(Feature::pacg, self.pacg); - // enable_feature(Feature::pauth_lr, self.pauthlr); - enable_feature(Feature::dpb, self.dcpop); - enable_feature(Feature::dpb2, self.dcpodp); - enable_feature(Feature::rand, self.rng); - enable_feature(Feature::bti, self.bti); - enable_feature(Feature::mte, self.mte); - // jsconv requires float support - enable_feature(Feature::jsconv, self.jscvt && self.fp); - enable_feature(Feature::rdm, self.asimdrdm); - enable_feature(Feature::dotprod, self.asimddp); - enable_feature(Feature::frintts, self.frint); - - // FEAT_I8MM & FEAT_BF16 also include optional SVE components which linux exposes - // separately. We ignore that distinction here. - enable_feature(Feature::i8mm, self.i8mm); - enable_feature(Feature::bf16, self.bf16); - - // ASIMD support requires float support - if half-floats are - // supported, it also requires half-float support: - let asimd = self.fp && self.asimd && (!self.fphp | self.asimdhp); - enable_feature(Feature::asimd, asimd); - // ASIMD extensions require ASIMD support: - enable_feature(Feature::fcma, self.fcma && asimd); - enable_feature(Feature::sve, self.sve && asimd); - - // SVE extensions require SVE & ASIMD - enable_feature(Feature::f32mm, self.svef32mm && self.sve && asimd); - enable_feature(Feature::f64mm, self.svef64mm && self.sve && asimd); - - // Cryptographic extensions require ASIMD - enable_feature(Feature::aes, self.aes && asimd); - enable_feature(Feature::sha2, self.sha1 && self.sha2 && asimd); - // SHA512/SHA3 require SHA1 & SHA256 - enable_feature( - Feature::sha3, - self.sha512 && self.sha3 && self.sha1 && self.sha2 && asimd, - ); - enable_feature(Feature::sm4, self.sm3 && self.sm4 && asimd); - - // SVE2 requires SVE - let sve2 = self.sve2 && self.sve && asimd; - enable_feature(Feature::sve2, sve2); - enable_feature(Feature::sve2p1, self.sve2p1 && sve2); - // SVE2 extensions require SVE2 and crypto features - enable_feature( - Feature::sve2_aes, - self.sveaes && self.svepmull && sve2 && self.aes, - ); - enable_feature( - Feature::sve2_sm4, - self.svesm4 && sve2 && self.sm3 && self.sm4, - ); - enable_feature( - Feature::sve2_sha3, - self.svesha3 && sve2 && self.sha512 && self.sha3 && self.sha1 && self.sha2, - ); - enable_feature(Feature::sve2_bitperm, self.svebitperm && self.sve2); - enable_feature(Feature::sve_b16b16, self.bf16 && self.sveb16b16); - enable_feature(Feature::hbc, self.hbc); - enable_feature(Feature::mops, self.mops); - enable_feature(Feature::ecv, self.ecv); - enable_feature(Feature::lut, self.lut); - enable_feature(Feature::cssc, self.cssc); - enable_feature(Feature::fpmr, self.fpmr); - enable_feature(Feature::faminmax, self.faminmax); - let fp8 = self.f8cvt && self.faminmax && self.lut && self.bf16; - enable_feature(Feature::fp8, fp8); - let fp8fma = self.f8fma && fp8; - enable_feature(Feature::fp8fma, fp8fma); - let fp8dot4 = self.f8dp4 && fp8fma; - enable_feature(Feature::fp8dot4, fp8dot4); - enable_feature(Feature::fp8dot2, self.f8dp2 && fp8dot4); - enable_feature(Feature::wfxt, self.wfxt); - let sme = self.sme && self.bf16; - enable_feature(Feature::sme, sme); - enable_feature(Feature::sme_i16i64, self.smei16i64 && sme); - enable_feature(Feature::sme_f64f64, self.smef64f64 && sme); - enable_feature(Feature::sme_fa64, self.smefa64 && sme && sve2); - let sme2 = self.sme2 && sme; - enable_feature(Feature::sme2, sme2); - enable_feature(Feature::sme2p1, self.sme2p1 && sme2); - enable_feature( - Feature::sme_b16b16, - sme2 && self.bf16 && self.sveb16b16 && self.smeb16b16, - ); - enable_feature(Feature::sme_f16f16, self.smef16f16 && sme2); - enable_feature(Feature::sme_lutv2, self.smelutv2); - let sme_f8f32 = self.smef8f32 && sme2 && fp8; - enable_feature(Feature::sme_f8f32, sme_f8f32); - enable_feature(Feature::sme_f8f16, self.smef8f16 && sme_f8f32); - let ssve_fp8fma = self.smesf8fma && sme2 && fp8; - enable_feature(Feature::ssve_fp8fma, ssve_fp8fma); - let ssve_fp8dot4 = self.smesf8dp4 && ssve_fp8fma; - enable_feature(Feature::ssve_fp8dot4, ssve_fp8dot4); - enable_feature(Feature::ssve_fp8dot2, self.smesf8dp2 && ssve_fp8dot4); - } - value - } -} - -#[cfg(target_endian = "little")] -#[cfg(test)] -mod tests { - use super::*; - - #[cfg(feature = "std_detect_file_io")] - mod auxv_from_file { - use super::auxvec::auxv_from_file; - use super::*; - // The baseline hwcaps used in the (artificial) auxv test files. - fn baseline_hwcaps() -> AtHwcap { - AtHwcap { - fp: true, - asimd: true, - aes: true, - pmull: true, - sha1: true, - sha2: true, - crc32: true, - atomics: true, - fphp: true, - asimdhp: true, - asimdrdm: true, - lrcpc: true, - dcpop: true, - asimddp: true, - ssbs: true, - ..AtHwcap::default() - } - } - - #[test] - fn linux_empty_hwcap2_aarch64() { - let file = concat!( - env!("CARGO_MANIFEST_DIR"), - "/src/detect/test_data/linux-empty-hwcap2-aarch64.auxv" - ); - println!("file: {file}"); - let v = auxv_from_file(file).unwrap(); - println!("HWCAP : 0x{:0x}", v.hwcap); - println!("HWCAP2: 0x{:0x}", v.hwcap2); - assert_eq!(AtHwcap::from(v), baseline_hwcaps()); - } - #[test] - fn linux_no_hwcap2_aarch64() { - let file = concat!( - env!("CARGO_MANIFEST_DIR"), - "/src/detect/test_data/linux-no-hwcap2-aarch64.auxv" - ); - println!("file: {file}"); - let v = auxv_from_file(file).unwrap(); - println!("HWCAP : 0x{:0x}", v.hwcap); - println!("HWCAP2: 0x{:0x}", v.hwcap2); - assert_eq!(AtHwcap::from(v), baseline_hwcaps()); - } - #[test] - fn linux_hwcap2_aarch64() { - let file = concat!( - env!("CARGO_MANIFEST_DIR"), - "/src/detect/test_data/linux-hwcap2-aarch64.auxv" - ); - println!("file: {file}"); - let v = auxv_from_file(file).unwrap(); - println!("HWCAP : 0x{:0x}", v.hwcap); - println!("HWCAP2: 0x{:0x}", v.hwcap2); - assert_eq!( - AtHwcap::from(v), - AtHwcap { - // Some other HWCAP bits. - paca: true, - pacg: true, - // HWCAP2-only bits. - dcpodp: true, - frint: true, - rng: true, - bti: true, - mte: true, - ..baseline_hwcaps() - } - ); - } - } -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/arm.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/arm.rs deleted file mode 100644 index bbb173227d0..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/arm.rs +++ /dev/null @@ -1,34 +0,0 @@ -//! Run-time feature detection for ARM on Linux. - -use super::auxvec; -use crate::detect::{Feature, bit, cache}; - -/// Try to read the features from the auxiliary vector. -pub(crate) fn detect_features() -> cache::Initializer { - let mut value = cache::Initializer::default(); - let enable_feature = |value: &mut cache::Initializer, f, enable| { - if enable { - value.set(f as u32); - } - }; - - // The values are part of the platform-specific [asm/hwcap.h][hwcap] - // - // [hwcap]: https://github.com/torvalds/linux/blob/master/arch/arm/include/uapi/asm/hwcap.h - if let Ok(auxv) = auxvec::auxv() { - enable_feature(&mut value, Feature::i8mm, bit::test(auxv.hwcap, 27)); - enable_feature(&mut value, Feature::dotprod, bit::test(auxv.hwcap, 24)); - enable_feature(&mut value, Feature::neon, bit::test(auxv.hwcap, 12)); - enable_feature(&mut value, Feature::pmull, bit::test(auxv.hwcap2, 1)); - enable_feature(&mut value, Feature::crc, bit::test(auxv.hwcap2, 4)); - enable_feature(&mut value, Feature::aes, bit::test(auxv.hwcap2, 0)); - // SHA2 requires SHA1 & SHA2 features - enable_feature( - &mut value, - Feature::sha2, - bit::test(auxv.hwcap2, 2) && bit::test(auxv.hwcap2, 3), - ); - return value; - } - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/auxvec.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/auxvec.rs deleted file mode 100644 index c30379ff065..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/auxvec.rs +++ /dev/null @@ -1,339 +0,0 @@ -//! Parses ELF auxiliary vectors. -#![allow(dead_code)] - -pub(crate) const AT_NULL: usize = 0; - -/// Key to access the CPU Hardware capabilities bitfield. -pub(crate) const AT_HWCAP: usize = 16; -/// Key to access the CPU Hardware capabilities 2 bitfield. -#[cfg(any( - target_arch = "aarch64", - target_arch = "arm", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", -))] -pub(crate) const AT_HWCAP2: usize = 26; - -/// Cache HWCAP bitfields of the ELF Auxiliary Vector. -/// -/// If an entry cannot be read all the bits in the bitfield are set to zero. -/// This should be interpreted as all the features being disabled. -#[derive(Debug, Copy, Clone)] -#[cfg_attr(test, derive(PartialEq))] -pub(crate) struct AuxVec { - pub hwcap: usize, - #[cfg(any( - target_arch = "aarch64", - target_arch = "arm", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", - ))] - pub hwcap2: usize, -} - -/// ELF Auxiliary Vector -/// -/// The auxiliary vector is a memory region in a running ELF program's stack -/// composed of (key: usize, value: usize) pairs. -/// -/// The keys used in the aux vector are platform dependent. For Linux, they are -/// defined in [linux/auxvec.h][auxvec_h]. The hardware capabilities of a given -/// CPU can be queried with the `AT_HWCAP` and `AT_HWCAP2` keys. -/// -/// There is no perfect way of reading the auxiliary vector. -/// -/// - If the `std_detect_dlsym_getauxval` cargo feature is enabled, this will use -/// `getauxval` if its linked to the binary, and otherwise proceed to a fallback implementation. -/// When `std_detect_dlsym_getauxval` is disabled, this will assume that `getauxval` is -/// linked to the binary - if that is not the case the behavior is undefined. -/// - Otherwise, if the `std_detect_file_io` cargo feature is enabled, it will -/// try to read `/proc/self/auxv`. -/// - If that fails, this function returns an error. -/// -/// Note that run-time feature detection is not invoked for features that can -/// be detected at compile-time. -/// -/// Note: The `std_detect_dlsym_getauxval` cargo feature is ignored on -/// `*-linux-{gnu,musl,ohos}*` and `*-android*` targets because we can safely assume `getauxval` -/// is linked to the binary. -/// - `*-linux-gnu*` targets ([since Rust 1.64](https://blog.rust-lang.org/2022/08/01/Increasing-glibc-kernel-requirements.html)) -/// have glibc requirements higher than [glibc 2.16 that added `getauxval`](https://sourceware.org/legacy-ml/libc-announce/2012/msg00000.html). -/// - `*-linux-musl*` targets ([at least since Rust 1.15](https://github.com/rust-lang/rust/blob/1.15.0/src/ci/docker/x86_64-musl/build-musl.sh#L15)) -/// use musl newer than [musl 1.1.0 that added `getauxval`](https://git.musl-libc.org/cgit/musl/tree/WHATSNEW?h=v1.1.0#n1197) -/// - `*-linux-ohos*` targets use a [fork of musl 1.2](https://gitee.com/openharmony/docs/blob/master/en/application-dev/reference/native-lib/musl.md) -/// - `*-android*` targets ([since Rust 1.68](https://blog.rust-lang.org/2023/01/09/android-ndk-update-r25.html)) -/// have the minimum supported API level higher than [Android 4.3 (API level 18) that added `getauxval`](https://github.com/aosp-mirror/platform_bionic/blob/d3ebc2f7c49a9893b114124d4a6b315f3a328764/libc/include/sys/auxv.h#L49). -/// -/// For more information about when `getauxval` is available check the great -/// [`auxv` crate documentation][auxv_docs]. -/// -/// [auxvec_h]: https://github.com/torvalds/linux/blob/master/include/uapi/linux/auxvec.h -/// [auxv_docs]: https://docs.rs/auxv/0.3.3/auxv/ -pub(crate) fn auxv() -> Result<AuxVec, ()> { - // Try to call a getauxval function. - if let Ok(hwcap) = getauxval(AT_HWCAP) { - // Targets with only AT_HWCAP: - #[cfg(any( - target_arch = "riscv32", - target_arch = "riscv64", - target_arch = "mips", - target_arch = "mips64", - target_arch = "loongarch64", - ))] - { - // Zero could indicate that no features were detected, but it's also used to indicate - // an error. In either case, try the fallback. - if hwcap != 0 { - return Ok(AuxVec { hwcap }); - } - } - - // Targets with AT_HWCAP and AT_HWCAP2: - #[cfg(any( - target_arch = "aarch64", - target_arch = "arm", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", - ))] - { - if let Ok(hwcap2) = getauxval(AT_HWCAP2) { - // Zero could indicate that no features were detected, but it's also used to indicate - // an error. In particular, on many platforms AT_HWCAP2 will be legitimately zero, - // since it contains the most recent feature flags. Use the fallback only if no - // features were detected at all. - if hwcap != 0 || hwcap2 != 0 { - return Ok(AuxVec { hwcap, hwcap2 }); - } - } - } - - // Intentionnaly not used - let _ = hwcap; - } - - #[cfg(feature = "std_detect_file_io")] - { - // If calling getauxval fails, try to read the auxiliary vector from - // its file: - auxv_from_file("/proc/self/auxv") - } - #[cfg(not(feature = "std_detect_file_io"))] - { - Err(()) - } -} - -/// Tries to read the `key` from the auxiliary vector by calling the -/// `getauxval` function. If the function is not linked, this function return `Err`. -fn getauxval(key: usize) -> Result<usize, ()> { - type F = unsafe extern "C" fn(libc::c_ulong) -> libc::c_ulong; - cfg_if::cfg_if! { - if #[cfg(all( - feature = "std_detect_dlsym_getauxval", - not(all( - target_os = "linux", - any(target_env = "gnu", target_env = "musl", target_env = "ohos"), - )), - not(target_os = "android"), - ))] { - let ffi_getauxval: F = unsafe { - let ptr = libc::dlsym(libc::RTLD_DEFAULT, c"getauxval".as_ptr()); - if ptr.is_null() { - return Err(()); - } - core::mem::transmute(ptr) - }; - } else { - let ffi_getauxval: F = libc::getauxval; - } - } - Ok(unsafe { ffi_getauxval(key as libc::c_ulong) as usize }) -} - -/// Tries to read the auxiliary vector from the `file`. If this fails, this -/// function returns `Err`. -#[cfg(feature = "std_detect_file_io")] -pub(super) fn auxv_from_file(file: &str) -> Result<AuxVec, ()> { - let file = super::read_file(file)?; - - // See <https://github.com/torvalds/linux/blob/v5.15/include/uapi/linux/auxvec.h>. - // - // The auxiliary vector contains at most 34 (key,value) fields: from - // `AT_MINSIGSTKSZ` to `AT_NULL`, but its number may increase. - let len = file.len(); - let mut buf = alloc::vec![0_usize; 1 + len / core::mem::size_of::<usize>()]; - unsafe { - core::ptr::copy_nonoverlapping(file.as_ptr(), buf.as_mut_ptr() as *mut u8, len); - } - - auxv_from_buf(&buf) -} - -/// Tries to interpret the `buffer` as an auxiliary vector. If that fails, this -/// function returns `Err`. -#[cfg(feature = "std_detect_file_io")] -fn auxv_from_buf(buf: &[usize]) -> Result<AuxVec, ()> { - // Targets with only AT_HWCAP: - #[cfg(any( - target_arch = "riscv32", - target_arch = "riscv64", - target_arch = "mips", - target_arch = "mips64", - target_arch = "loongarch64", - ))] - { - for el in buf.chunks(2) { - match el[0] { - AT_NULL => break, - AT_HWCAP => return Ok(AuxVec { hwcap: el[1] }), - _ => (), - } - } - } - // Targets with AT_HWCAP and AT_HWCAP2: - #[cfg(any( - target_arch = "aarch64", - target_arch = "arm", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", - ))] - { - let mut hwcap = None; - // For some platforms, AT_HWCAP2 was added recently, so let it default to zero. - let mut hwcap2 = 0; - for el in buf.chunks(2) { - match el[0] { - AT_NULL => break, - AT_HWCAP => hwcap = Some(el[1]), - AT_HWCAP2 => hwcap2 = el[1], - _ => (), - } - } - - if let Some(hwcap) = hwcap { - return Ok(AuxVec { hwcap, hwcap2 }); - } - } - // Suppress unused variable - let _ = buf; - Err(()) -} - -#[cfg(test)] -mod tests { - use super::*; - - // FIXME: on mips/mips64 getauxval returns 0, and /proc/self/auxv - // does not always contain the AT_HWCAP key under qemu. - #[cfg(any( - target_arch = "arm", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", - ))] - #[test] - fn auxv_crate() { - let v = auxv(); - if let Ok(hwcap) = getauxval(AT_HWCAP) { - let rt_hwcap = v.expect("failed to find hwcap key").hwcap; - assert_eq!(rt_hwcap, hwcap); - } - - // Targets with AT_HWCAP and AT_HWCAP2: - #[cfg(any( - target_arch = "aarch64", - target_arch = "arm", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", - ))] - { - if let Ok(hwcap2) = getauxval(AT_HWCAP2) { - let rt_hwcap2 = v.expect("failed to find hwcap2 key").hwcap2; - assert_eq!(rt_hwcap2, hwcap2); - } - } - } - - #[test] - fn auxv_dump() { - if let Ok(auxvec) = auxv() { - println!("{:?}", auxvec); - } else { - println!("both getauxval() and reading /proc/self/auxv failed!"); - } - } - - #[cfg(feature = "std_detect_file_io")] - cfg_if::cfg_if! { - if #[cfg(target_arch = "arm")] { - #[test] - fn linux_rpi3() { - let file = concat!(env!("CARGO_MANIFEST_DIR"), "/src/detect/test_data/linux-rpi3.auxv"); - println!("file: {file}"); - let v = auxv_from_file(file).unwrap(); - assert_eq!(v.hwcap, 4174038); - assert_eq!(v.hwcap2, 16); - } - - #[test] - fn linux_macos_vb() { - let file = concat!(env!("CARGO_MANIFEST_DIR"), "/src/detect/test_data/macos-virtualbox-linux-x86-4850HQ.auxv"); - println!("file: {file}"); - // The file contains HWCAP but not HWCAP2. In that case, we treat HWCAP2 as zero. - let v = auxv_from_file(file).unwrap(); - assert_eq!(v.hwcap, 126614527); - assert_eq!(v.hwcap2, 0); - } - } else if #[cfg(target_arch = "aarch64")] { - #[cfg(target_endian = "little")] - #[test] - fn linux_artificial_aarch64() { - let file = concat!(env!("CARGO_MANIFEST_DIR"), "/src/detect/test_data/linux-artificial-aarch64.auxv"); - println!("file: {file}"); - let v = auxv_from_file(file).unwrap(); - assert_eq!(v.hwcap, 0x0123456789abcdef); - assert_eq!(v.hwcap2, 0x02468ace13579bdf); - } - #[cfg(target_endian = "little")] - #[test] - fn linux_no_hwcap2_aarch64() { - let file = concat!(env!("CARGO_MANIFEST_DIR"), "/src/detect/test_data/linux-no-hwcap2-aarch64.auxv"); - println!("file: {file}"); - let v = auxv_from_file(file).unwrap(); - // An absent HWCAP2 is treated as zero, and does not prevent acceptance of HWCAP. - assert_ne!(v.hwcap, 0); - assert_eq!(v.hwcap2, 0); - } - } - } - - #[test] - #[cfg(feature = "std_detect_file_io")] - fn auxv_dump_procfs() { - if let Ok(auxvec) = auxv_from_file("/proc/self/auxv") { - println!("{:?}", auxvec); - } else { - println!("reading /proc/self/auxv failed!"); - } - } - - #[cfg(any( - target_arch = "aarch64", - target_arch = "arm", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", - ))] - #[test] - #[cfg(feature = "std_detect_file_io")] - fn auxv_crate_procfs() { - if let Ok(procfs_auxv) = auxv_from_file("/proc/self/auxv") { - assert_eq!(auxv().unwrap(), procfs_auxv); - } - } -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/loongarch.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/loongarch.rs deleted file mode 100644 index 14cc7a73183..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/loongarch.rs +++ /dev/null @@ -1,68 +0,0 @@ -//! Run-time feature detection for LoongArch on Linux. - -use super::auxvec; -use crate::detect::{Feature, bit, cache}; -use core::arch::asm; - -/// Try to read the features from the auxiliary vector. -pub(crate) fn detect_features() -> cache::Initializer { - let mut value = cache::Initializer::default(); - let enable_feature = |value: &mut cache::Initializer, feature, enable| { - if enable { - value.set(feature as u32); - } - }; - - // The values are part of the platform-specific [cpucfg] - // - // [cpucfg]: LoongArch Reference Manual Volume 1: Basic Architecture v1.1 - let cpucfg2: usize; - unsafe { - asm!( - "cpucfg {}, {}", - out(reg) cpucfg2, in(reg) 2, - options(pure, nomem, preserves_flags, nostack) - ); - } - let cpucfg3: usize; - unsafe { - asm!( - "cpucfg {}, {}", - out(reg) cpucfg3, in(reg) 3, - options(pure, nomem, preserves_flags, nostack) - ); - } - enable_feature(&mut value, Feature::frecipe, bit::test(cpucfg2, 25)); - enable_feature(&mut value, Feature::div32, bit::test(cpucfg2, 26)); - enable_feature(&mut value, Feature::lam_bh, bit::test(cpucfg2, 27)); - enable_feature(&mut value, Feature::lamcas, bit::test(cpucfg2, 28)); - enable_feature(&mut value, Feature::scq, bit::test(cpucfg2, 30)); - enable_feature(&mut value, Feature::ld_seq_sa, bit::test(cpucfg3, 23)); - - // The values are part of the platform-specific [asm/hwcap.h][hwcap] - // - // [hwcap]: https://github.com/torvalds/linux/blob/master/arch/loongarch/include/uapi/asm/hwcap.h - if let Ok(auxv) = auxvec::auxv() { - enable_feature( - &mut value, - Feature::f, - bit::test(cpucfg2, 1) && bit::test(auxv.hwcap, 3), - ); - enable_feature( - &mut value, - Feature::d, - bit::test(cpucfg2, 2) && bit::test(auxv.hwcap, 3), - ); - enable_feature(&mut value, Feature::lsx, bit::test(auxv.hwcap, 4)); - enable_feature(&mut value, Feature::lasx, bit::test(auxv.hwcap, 5)); - enable_feature( - &mut value, - Feature::lbt, - bit::test(auxv.hwcap, 10) && bit::test(auxv.hwcap, 11) && bit::test(auxv.hwcap, 12), - ); - enable_feature(&mut value, Feature::lvz, bit::test(auxv.hwcap, 9)); - enable_feature(&mut value, Feature::ual, bit::test(auxv.hwcap, 2)); - return value; - } - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/mips.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/mips.rs deleted file mode 100644 index 0cfa8869887..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/mips.rs +++ /dev/null @@ -1,23 +0,0 @@ -//! Run-time feature detection for MIPS on Linux. - -use super::auxvec; -use crate::detect::{Feature, bit, cache}; - -/// Try to read the features from the auxiliary vector. -pub(crate) fn detect_features() -> cache::Initializer { - let mut value = cache::Initializer::default(); - let enable_feature = |value: &mut cache::Initializer, f, enable| { - if enable { - value.set(f as u32); - } - }; - - // The values are part of the platform-specific [asm/hwcap.h][hwcap] - // - // [hwcap]: https://github.com/torvalds/linux/blob/master/arch/mips/include/uapi/asm/hwcap.h - if let Ok(auxv) = auxvec::auxv() { - enable_feature(&mut value, Feature::msa, bit::test(auxv.hwcap, 1)); - return value; - } - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/mod.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/mod.rs deleted file mode 100644 index 8c689d0b1f0..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/mod.rs +++ /dev/null @@ -1,67 +0,0 @@ -//! Run-time feature detection on Linux -//! -#[cfg(feature = "std_detect_file_io")] -use alloc::vec::Vec; - -mod auxvec; - -#[cfg(feature = "std_detect_file_io")] -fn read_file(path: &str) -> Result<Vec<u8>, ()> { - let mut path = Vec::from(path.as_bytes()); - path.push(0); - - unsafe { - let file = libc::open(path.as_ptr() as *const libc::c_char, libc::O_RDONLY); - if file == -1 { - return Err(()); - } - - let mut data = Vec::new(); - loop { - data.reserve(4096); - let spare = data.spare_capacity_mut(); - match libc::read(file, spare.as_mut_ptr() as *mut _, spare.len()) { - -1 => { - libc::close(file); - return Err(()); - } - 0 => break, - n => data.set_len(data.len() + n as usize), - } - } - - libc::close(file); - Ok(data) - } -} - -cfg_if::cfg_if! { - if #[cfg(target_arch = "aarch64")] { - mod aarch64; - pub(crate) use self::aarch64::detect_features; - } else if #[cfg(target_arch = "arm")] { - mod arm; - pub(crate) use self::arm::detect_features; - } else if #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))] { - mod riscv; - pub(crate) use self::riscv::detect_features; - } else if #[cfg(any(target_arch = "mips", target_arch = "mips64"))] { - mod mips; - pub(crate) use self::mips::detect_features; - } else if #[cfg(any(target_arch = "powerpc", target_arch = "powerpc64"))] { - mod powerpc; - pub(crate) use self::powerpc::detect_features; - } else if #[cfg(target_arch = "loongarch64")] { - mod loongarch; - pub(crate) use self::loongarch::detect_features; - } else if #[cfg(target_arch = "s390x")] { - mod s390x; - pub(crate) use self::s390x::detect_features; - } else { - use crate::detect::cache; - /// Performs run-time feature detection. - pub(crate) fn detect_features() -> cache::Initializer { - cache::Initializer::default() - } - } -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/powerpc.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/powerpc.rs deleted file mode 100644 index 6a4f7e715d9..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/powerpc.rs +++ /dev/null @@ -1,35 +0,0 @@ -//! Run-time feature detection for PowerPC on Linux. - -use super::auxvec; -use crate::detect::{Feature, cache}; - -/// Try to read the features from the auxiliary vector. -pub(crate) fn detect_features() -> cache::Initializer { - let mut value = cache::Initializer::default(); - let enable_feature = |value: &mut cache::Initializer, f, enable| { - if enable { - value.set(f as u32); - } - }; - - // The values are part of the platform-specific [asm/cputable.h][cputable] - // - // [cputable]: https://github.com/torvalds/linux/blob/master/arch/powerpc/include/uapi/asm/cputable.h - if let Ok(auxv) = auxvec::auxv() { - // note: the PowerPC values are the mask to do the test (instead of the - // index of the bit to test like in ARM and Aarch64) - enable_feature(&mut value, Feature::altivec, auxv.hwcap & 0x10000000 != 0); - enable_feature(&mut value, Feature::vsx, auxv.hwcap & 0x00000080 != 0); - let power8_features = auxv.hwcap2 & 0x80000000 != 0; - enable_feature(&mut value, Feature::power8, power8_features); - enable_feature(&mut value, Feature::power8_altivec, power8_features); - enable_feature(&mut value, Feature::power8_crypto, power8_features); - enable_feature(&mut value, Feature::power8_vector, power8_features); - let power9_features = auxv.hwcap2 & 0x00800000 != 0; - enable_feature(&mut value, Feature::power9, power9_features); - enable_feature(&mut value, Feature::power9_altivec, power9_features); - enable_feature(&mut value, Feature::power9_vector, power9_features); - return value; - } - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs deleted file mode 100644 index db20538af95..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs +++ /dev/null @@ -1,330 +0,0 @@ -//! Run-time feature detection for RISC-V on Linux. -//! -//! On RISC-V, detection using auxv only supports single-letter extensions. -//! So, we use riscv_hwprobe that supports multi-letter extensions if available. -//! <https://www.kernel.org/doc/html/latest/arch/riscv/hwprobe.html> - -use core::ptr; - -use super::super::riscv::imply_features; -use super::auxvec; -use crate::detect::{Feature, bit, cache}; - -// See <https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/uapi/linux/prctl.h?h=v6.15> -// for runtime status query constants. -const PR_RISCV_V_GET_CONTROL: libc::c_int = 70; -const PR_RISCV_V_VSTATE_CTRL_ON: libc::c_int = 2; -const PR_RISCV_V_VSTATE_CTRL_CUR_MASK: libc::c_int = 3; - -// See <https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/riscv/include/uapi/asm/hwprobe.h?h=v6.15> -// for riscv_hwprobe struct and hardware probing constants. - -#[repr(C)] -struct riscv_hwprobe { - key: i64, - value: u64, -} - -impl riscv_hwprobe { - // key is overwritten to -1 if not supported by riscv_hwprobe syscall. - pub fn get(&self) -> Option<u64> { - (self.key != -1).then_some(self.value) - } -} - -#[allow(non_upper_case_globals)] -const __NR_riscv_hwprobe: libc::c_long = 258; - -const RISCV_HWPROBE_KEY_BASE_BEHAVIOR: i64 = 3; -const RISCV_HWPROBE_BASE_BEHAVIOR_IMA: u64 = 1 << 0; - -const RISCV_HWPROBE_KEY_IMA_EXT_0: i64 = 4; -const RISCV_HWPROBE_IMA_FD: u64 = 1 << 0; -const RISCV_HWPROBE_IMA_C: u64 = 1 << 1; -const RISCV_HWPROBE_IMA_V: u64 = 1 << 2; -const RISCV_HWPROBE_EXT_ZBA: u64 = 1 << 3; -const RISCV_HWPROBE_EXT_ZBB: u64 = 1 << 4; -const RISCV_HWPROBE_EXT_ZBS: u64 = 1 << 5; -const RISCV_HWPROBE_EXT_ZICBOZ: u64 = 1 << 6; -const RISCV_HWPROBE_EXT_ZBC: u64 = 1 << 7; -const RISCV_HWPROBE_EXT_ZBKB: u64 = 1 << 8; -const RISCV_HWPROBE_EXT_ZBKC: u64 = 1 << 9; -const RISCV_HWPROBE_EXT_ZBKX: u64 = 1 << 10; -const RISCV_HWPROBE_EXT_ZKND: u64 = 1 << 11; -const RISCV_HWPROBE_EXT_ZKNE: u64 = 1 << 12; -const RISCV_HWPROBE_EXT_ZKNH: u64 = 1 << 13; -const RISCV_HWPROBE_EXT_ZKSED: u64 = 1 << 14; -const RISCV_HWPROBE_EXT_ZKSH: u64 = 1 << 15; -const RISCV_HWPROBE_EXT_ZKT: u64 = 1 << 16; -const RISCV_HWPROBE_EXT_ZVBB: u64 = 1 << 17; -const RISCV_HWPROBE_EXT_ZVBC: u64 = 1 << 18; -const RISCV_HWPROBE_EXT_ZVKB: u64 = 1 << 19; -const RISCV_HWPROBE_EXT_ZVKG: u64 = 1 << 20; -const RISCV_HWPROBE_EXT_ZVKNED: u64 = 1 << 21; -const RISCV_HWPROBE_EXT_ZVKNHA: u64 = 1 << 22; -const RISCV_HWPROBE_EXT_ZVKNHB: u64 = 1 << 23; -const RISCV_HWPROBE_EXT_ZVKSED: u64 = 1 << 24; -const RISCV_HWPROBE_EXT_ZVKSH: u64 = 1 << 25; -const RISCV_HWPROBE_EXT_ZVKT: u64 = 1 << 26; -const RISCV_HWPROBE_EXT_ZFH: u64 = 1 << 27; -const RISCV_HWPROBE_EXT_ZFHMIN: u64 = 1 << 28; -const RISCV_HWPROBE_EXT_ZIHINTNTL: u64 = 1 << 29; -const RISCV_HWPROBE_EXT_ZVFH: u64 = 1 << 30; -const RISCV_HWPROBE_EXT_ZVFHMIN: u64 = 1 << 31; -const RISCV_HWPROBE_EXT_ZFA: u64 = 1 << 32; -const RISCV_HWPROBE_EXT_ZTSO: u64 = 1 << 33; -const RISCV_HWPROBE_EXT_ZACAS: u64 = 1 << 34; -const RISCV_HWPROBE_EXT_ZICOND: u64 = 1 << 35; -const RISCV_HWPROBE_EXT_ZIHINTPAUSE: u64 = 1 << 36; -const RISCV_HWPROBE_EXT_ZVE32X: u64 = 1 << 37; -const RISCV_HWPROBE_EXT_ZVE32F: u64 = 1 << 38; -const RISCV_HWPROBE_EXT_ZVE64X: u64 = 1 << 39; -const RISCV_HWPROBE_EXT_ZVE64F: u64 = 1 << 40; -const RISCV_HWPROBE_EXT_ZVE64D: u64 = 1 << 41; -const RISCV_HWPROBE_EXT_ZIMOP: u64 = 1 << 42; -const RISCV_HWPROBE_EXT_ZCA: u64 = 1 << 43; -const RISCV_HWPROBE_EXT_ZCB: u64 = 1 << 44; -const RISCV_HWPROBE_EXT_ZCD: u64 = 1 << 45; -const RISCV_HWPROBE_EXT_ZCF: u64 = 1 << 46; -const RISCV_HWPROBE_EXT_ZCMOP: u64 = 1 << 47; -const RISCV_HWPROBE_EXT_ZAWRS: u64 = 1 << 48; -// Excluded because it only reports the existence of `prctl`-based pointer masking control. -// const RISCV_HWPROBE_EXT_SUPM: u64 = 1 << 49; -const RISCV_HWPROBE_EXT_ZICNTR: u64 = 1 << 50; -const RISCV_HWPROBE_EXT_ZIHPM: u64 = 1 << 51; -const RISCV_HWPROBE_EXT_ZFBFMIN: u64 = 1 << 52; -const RISCV_HWPROBE_EXT_ZVFBFMIN: u64 = 1 << 53; -const RISCV_HWPROBE_EXT_ZVFBFWMA: u64 = 1 << 54; -const RISCV_HWPROBE_EXT_ZICBOM: u64 = 1 << 55; -const RISCV_HWPROBE_EXT_ZAAMO: u64 = 1 << 56; -const RISCV_HWPROBE_EXT_ZALRSC: u64 = 1 << 57; - -const RISCV_HWPROBE_KEY_CPUPERF_0: i64 = 5; -const RISCV_HWPROBE_MISALIGNED_FAST: u64 = 3; -const RISCV_HWPROBE_MISALIGNED_MASK: u64 = 7; - -const RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF: i64 = 9; -const RISCV_HWPROBE_MISALIGNED_SCALAR_FAST: u64 = 3; - -const RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF: i64 = 10; -const RISCV_HWPROBE_MISALIGNED_VECTOR_FAST: u64 = 3; - -// syscall returns an unsupported error if riscv_hwprobe is not supported, -// so we can safely use this function on older versions of Linux. -fn _riscv_hwprobe(out: &mut [riscv_hwprobe]) -> bool { - unsafe fn __riscv_hwprobe( - pairs: *mut riscv_hwprobe, - pair_count: libc::size_t, - cpu_set_size: libc::size_t, - cpus: *mut libc::c_ulong, - flags: libc::c_uint, - ) -> libc::c_long { - unsafe { - libc::syscall( - __NR_riscv_hwprobe, - pairs, - pair_count, - cpu_set_size, - cpus, - flags, - ) - } - } - - unsafe { __riscv_hwprobe(out.as_mut_ptr(), out.len(), 0, ptr::null_mut(), 0) == 0 } -} - -/// Read list of supported features from (1) the auxiliary vector -/// and (2) the results of `riscv_hwprobe` and `prctl` system calls. -pub(crate) fn detect_features() -> cache::Initializer { - let mut value = cache::Initializer::default(); - let mut enable_feature = |feature, enable| { - if enable { - value.set(feature as u32); - } - }; - - // Use auxiliary vector to enable single-letter ISA extensions. - // The values are part of the platform-specific [asm/hwcap.h][hwcap] - // - // [hwcap]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/riscv/include/uapi/asm/hwcap.h?h=v6.15 - let auxv = auxvec::auxv().expect("read auxvec"); // should not fail on RISC-V platform - let mut has_i = bit::test(auxv.hwcap, (b'i' - b'a').into()); - #[allow(clippy::eq_op)] - enable_feature(Feature::a, bit::test(auxv.hwcap, (b'a' - b'a').into())); - enable_feature(Feature::c, bit::test(auxv.hwcap, (b'c' - b'a').into())); - enable_feature(Feature::d, bit::test(auxv.hwcap, (b'd' - b'a').into())); - enable_feature(Feature::f, bit::test(auxv.hwcap, (b'f' - b'a').into())); - enable_feature(Feature::m, bit::test(auxv.hwcap, (b'm' - b'a').into())); - let has_v = bit::test(auxv.hwcap, (b'v' - b'a').into()); - let mut is_v_set = false; - - // Use riscv_hwprobe syscall to query more extensions and - // performance-related capabilities. - 'hwprobe: { - macro_rules! init { - { $($name: ident : $key: expr),* $(,)? } => { - #[repr(usize)] - enum Indices { $($name),* } - let mut t = [$(riscv_hwprobe { key: $key, value: 0 }),*]; - macro_rules! data_mut { () => { &mut t } } - macro_rules! query { [$idx: ident] => { t[Indices::$idx as usize].get() } } - } - } - init! { - BaseBehavior: RISCV_HWPROBE_KEY_BASE_BEHAVIOR, - Extensions: RISCV_HWPROBE_KEY_IMA_EXT_0, - MisalignedScalarPerf: RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF, - MisalignedVectorPerf: RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF, - MisalignedScalarPerfFallback: RISCV_HWPROBE_KEY_CPUPERF_0, - }; - if !_riscv_hwprobe(data_mut!()) { - break 'hwprobe; - } - - // Query scalar misaligned behavior. - if let Some(value) = query![MisalignedScalarPerf] { - enable_feature( - Feature::unaligned_scalar_mem, - value == RISCV_HWPROBE_MISALIGNED_SCALAR_FAST, - ); - } else if let Some(value) = query![MisalignedScalarPerfFallback] { - // Deprecated method for fallback - enable_feature( - Feature::unaligned_scalar_mem, - value & RISCV_HWPROBE_MISALIGNED_MASK == RISCV_HWPROBE_MISALIGNED_FAST, - ); - } - - // Query vector misaligned behavior. - if let Some(value) = query![MisalignedVectorPerf] { - enable_feature( - Feature::unaligned_vector_mem, - value == RISCV_HWPROBE_MISALIGNED_VECTOR_FAST, - ); - } - - // Query whether "I" base and extensions "M" and "A" (as in the ISA - // manual version 2.2) are enabled. "I" base at that time corresponds - // to "I", "Zicsr", "Zicntr" and "Zifencei" (as in the ISA manual version - // 20240411). - // This is a current requirement of - // `RISCV_HWPROBE_KEY_IMA_EXT_0`-based tests. - if query![BaseBehavior].is_none_or(|value| value & RISCV_HWPROBE_BASE_BEHAVIOR_IMA == 0) { - break 'hwprobe; - } - has_i = true; - enable_feature(Feature::zicsr, true); - enable_feature(Feature::zicntr, true); - enable_feature(Feature::zifencei, true); - enable_feature(Feature::m, true); - enable_feature(Feature::a, true); - - // Enable features based on `RISCV_HWPROBE_KEY_IMA_EXT_0`. - let Some(ima_ext_0) = query![Extensions] else { - break 'hwprobe; - }; - let test = |mask| (ima_ext_0 & mask) != 0; - - enable_feature(Feature::d, test(RISCV_HWPROBE_IMA_FD)); // F is implied. - enable_feature(Feature::c, test(RISCV_HWPROBE_IMA_C)); - - enable_feature(Feature::zicntr, test(RISCV_HWPROBE_EXT_ZICNTR)); - enable_feature(Feature::zihpm, test(RISCV_HWPROBE_EXT_ZIHPM)); - - enable_feature(Feature::zihintntl, test(RISCV_HWPROBE_EXT_ZIHINTNTL)); - enable_feature(Feature::zihintpause, test(RISCV_HWPROBE_EXT_ZIHINTPAUSE)); - enable_feature(Feature::zimop, test(RISCV_HWPROBE_EXT_ZIMOP)); - enable_feature(Feature::zicbom, test(RISCV_HWPROBE_EXT_ZICBOM)); - enable_feature(Feature::zicboz, test(RISCV_HWPROBE_EXT_ZICBOZ)); - enable_feature(Feature::zicond, test(RISCV_HWPROBE_EXT_ZICOND)); - - enable_feature(Feature::zalrsc, test(RISCV_HWPROBE_EXT_ZALRSC)); - enable_feature(Feature::zaamo, test(RISCV_HWPROBE_EXT_ZAAMO)); - enable_feature(Feature::zawrs, test(RISCV_HWPROBE_EXT_ZAWRS)); - enable_feature(Feature::zacas, test(RISCV_HWPROBE_EXT_ZACAS)); - enable_feature(Feature::ztso, test(RISCV_HWPROBE_EXT_ZTSO)); - - enable_feature(Feature::zba, test(RISCV_HWPROBE_EXT_ZBA)); - enable_feature(Feature::zbb, test(RISCV_HWPROBE_EXT_ZBB)); - enable_feature(Feature::zbs, test(RISCV_HWPROBE_EXT_ZBS)); - enable_feature(Feature::zbc, test(RISCV_HWPROBE_EXT_ZBC)); - - enable_feature(Feature::zbkb, test(RISCV_HWPROBE_EXT_ZBKB)); - enable_feature(Feature::zbkc, test(RISCV_HWPROBE_EXT_ZBKC)); - enable_feature(Feature::zbkx, test(RISCV_HWPROBE_EXT_ZBKX)); - enable_feature(Feature::zknd, test(RISCV_HWPROBE_EXT_ZKND)); - enable_feature(Feature::zkne, test(RISCV_HWPROBE_EXT_ZKNE)); - enable_feature(Feature::zknh, test(RISCV_HWPROBE_EXT_ZKNH)); - enable_feature(Feature::zksed, test(RISCV_HWPROBE_EXT_ZKSED)); - enable_feature(Feature::zksh, test(RISCV_HWPROBE_EXT_ZKSH)); - enable_feature(Feature::zkt, test(RISCV_HWPROBE_EXT_ZKT)); - - enable_feature(Feature::zcmop, test(RISCV_HWPROBE_EXT_ZCMOP)); - enable_feature(Feature::zca, test(RISCV_HWPROBE_EXT_ZCA)); - enable_feature(Feature::zcf, test(RISCV_HWPROBE_EXT_ZCF)); - enable_feature(Feature::zcd, test(RISCV_HWPROBE_EXT_ZCD)); - enable_feature(Feature::zcb, test(RISCV_HWPROBE_EXT_ZCB)); - - enable_feature(Feature::zfh, test(RISCV_HWPROBE_EXT_ZFH)); - enable_feature(Feature::zfhmin, test(RISCV_HWPROBE_EXT_ZFHMIN)); - enable_feature(Feature::zfa, test(RISCV_HWPROBE_EXT_ZFA)); - enable_feature(Feature::zfbfmin, test(RISCV_HWPROBE_EXT_ZFBFMIN)); - - // Use prctl (if any) to determine whether the vector extension - // is enabled on the current thread (assuming the entire process - // share the same status). If prctl fails (e.g. QEMU userland emulator - // as of version 9.2.3), use auxiliary vector to retrieve the default - // vector status on the process startup. - let has_vectors = { - let v_status = unsafe { libc::prctl(PR_RISCV_V_GET_CONTROL) }; - if v_status >= 0 { - (v_status & PR_RISCV_V_VSTATE_CTRL_CUR_MASK) == PR_RISCV_V_VSTATE_CTRL_ON - } else { - has_v - } - }; - if has_vectors { - enable_feature(Feature::v, test(RISCV_HWPROBE_IMA_V)); - enable_feature(Feature::zve32x, test(RISCV_HWPROBE_EXT_ZVE32X)); - enable_feature(Feature::zve32f, test(RISCV_HWPROBE_EXT_ZVE32F)); - enable_feature(Feature::zve64x, test(RISCV_HWPROBE_EXT_ZVE64X)); - enable_feature(Feature::zve64f, test(RISCV_HWPROBE_EXT_ZVE64F)); - enable_feature(Feature::zve64d, test(RISCV_HWPROBE_EXT_ZVE64D)); - - enable_feature(Feature::zvbb, test(RISCV_HWPROBE_EXT_ZVBB)); - enable_feature(Feature::zvbc, test(RISCV_HWPROBE_EXT_ZVBC)); - enable_feature(Feature::zvkb, test(RISCV_HWPROBE_EXT_ZVKB)); - enable_feature(Feature::zvkg, test(RISCV_HWPROBE_EXT_ZVKG)); - enable_feature(Feature::zvkned, test(RISCV_HWPROBE_EXT_ZVKNED)); - enable_feature(Feature::zvknha, test(RISCV_HWPROBE_EXT_ZVKNHA)); - enable_feature(Feature::zvknhb, test(RISCV_HWPROBE_EXT_ZVKNHB)); - enable_feature(Feature::zvksed, test(RISCV_HWPROBE_EXT_ZVKSED)); - enable_feature(Feature::zvksh, test(RISCV_HWPROBE_EXT_ZVKSH)); - enable_feature(Feature::zvkt, test(RISCV_HWPROBE_EXT_ZVKT)); - - enable_feature(Feature::zvfh, test(RISCV_HWPROBE_EXT_ZVFH)); - enable_feature(Feature::zvfhmin, test(RISCV_HWPROBE_EXT_ZVFHMIN)); - enable_feature(Feature::zvfbfmin, test(RISCV_HWPROBE_EXT_ZVFBFMIN)); - enable_feature(Feature::zvfbfwma, test(RISCV_HWPROBE_EXT_ZVFBFWMA)); - } - is_v_set = true; - }; - - // Set V purely depending on the auxiliary vector - // only if no fine-grained vector extension detection is available. - if !is_v_set { - enable_feature(Feature::v, has_v); - } - - // Handle base ISA. - // If future RV128I is supported, implement with `enable_feature` here. - // Note that we should use `target_arch` instead of `target_pointer_width` - // to avoid misdetection caused by experimental ABIs such as RV64ILP32. - #[cfg(target_arch = "riscv64")] - enable_feature(Feature::rv64i, has_i); - #[cfg(target_arch = "riscv32")] - enable_feature(Feature::rv32i, has_i); - - imply_features(value) -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/s390x.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/s390x.rs deleted file mode 100644 index 9b53f526d61..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/s390x.rs +++ /dev/null @@ -1,152 +0,0 @@ -//! Run-time feature detection for s390x on Linux. - -use super::auxvec; -use crate::detect::{Feature, bit, cache}; - -/// Try to read the features from the auxiliary vector -pub(crate) fn detect_features() -> cache::Initializer { - let opt_hwcap: Option<AtHwcap> = auxvec::auxv().ok().map(Into::into); - let facilities = ExtendedFacilityList::new(); - cache(opt_hwcap, facilities) -} - -#[derive(Debug, Default, PartialEq)] -struct AtHwcap { - esan3: bool, - zarch: bool, - stfle: bool, - msa: bool, - ldisp: bool, - eimm: bool, - dfp: bool, - hpage: bool, - etf3eh: bool, - high_gprs: bool, - te: bool, - vxrs: bool, - vxrs_bcd: bool, - vxrs_ext: bool, - gs: bool, - vxrs_ext2: bool, - vxrs_pde: bool, - sort: bool, - dflt: bool, - vxrs_pde2: bool, - nnpa: bool, - pci_mio: bool, - sie: bool, -} - -impl From<auxvec::AuxVec> for AtHwcap { - /// Reads AtHwcap from the auxiliary vector. - fn from(auxv: auxvec::AuxVec) -> Self { - AtHwcap { - esan3: bit::test(auxv.hwcap, 0), - zarch: bit::test(auxv.hwcap, 1), - stfle: bit::test(auxv.hwcap, 2), - msa: bit::test(auxv.hwcap, 3), - ldisp: bit::test(auxv.hwcap, 4), - eimm: bit::test(auxv.hwcap, 5), - dfp: bit::test(auxv.hwcap, 6), - hpage: bit::test(auxv.hwcap, 7), - etf3eh: bit::test(auxv.hwcap, 8), - high_gprs: bit::test(auxv.hwcap, 9), - te: bit::test(auxv.hwcap, 10), - vxrs: bit::test(auxv.hwcap, 11), - vxrs_bcd: bit::test(auxv.hwcap, 12), - vxrs_ext: bit::test(auxv.hwcap, 13), - gs: bit::test(auxv.hwcap, 14), - vxrs_ext2: bit::test(auxv.hwcap, 15), - vxrs_pde: bit::test(auxv.hwcap, 16), - sort: bit::test(auxv.hwcap, 17), - dflt: bit::test(auxv.hwcap, 18), - vxrs_pde2: bit::test(auxv.hwcap, 19), - nnpa: bit::test(auxv.hwcap, 20), - pci_mio: bit::test(auxv.hwcap, 21), - sie: bit::test(auxv.hwcap, 22), - } - } -} - -struct ExtendedFacilityList([u64; 4]); - -impl ExtendedFacilityList { - fn new() -> Self { - let mut result: [u64; 4] = [0; 4]; - // SAFETY: rust/llvm only support s390x version with the `stfle` instruction. - unsafe { - core::arch::asm!( - // equivalently ".insn s, 0xb2b00000, 0({1})", - "stfle 0({})", - in(reg_addr) result.as_mut_ptr() , - inout("r0") result.len() as u64 - 1 => _, - options(nostack) - ); - } - Self(result) - } - - const fn get_bit(&self, n: usize) -> bool { - // NOTE: bits are numbered from the left. - self.0[n / 64] & (1 << (63 - (n % 64))) != 0 - } -} - -/// Initializes the cache from the feature bits. -/// -/// These values are part of the platform-specific [asm/elf.h][kernel], and are a selection of the -/// fields found in the [Facility Indications]. -/// -/// [Facility Indications]: https://www.ibm.com/support/pages/sites/default/files/2021-05/SA22-7871-10.pdf#page=63 -/// [kernel]: https://github.com/torvalds/linux/blob/b62cef9a5c673f1b8083159f5dc03c1c5daced2f/arch/s390/include/asm/elf.h#L129 -fn cache(hwcap: Option<AtHwcap>, facilities: ExtendedFacilityList) -> cache::Initializer { - let mut value = cache::Initializer::default(); - - { - let mut enable_if_set = |bit_index, f| { - if facilities.get_bit(bit_index) { - value.set(f as u32); - } - }; - - // We use HWCAP for `vector` because it requires both hardware and kernel support. - if let Some(AtHwcap { vxrs: true, .. }) = hwcap { - // vector and related - - enable_if_set(129, Feature::vector); - - enable_if_set(135, Feature::vector_enhancements_1); - enable_if_set(148, Feature::vector_enhancements_2); - enable_if_set(198, Feature::vector_enhancements_3); - - enable_if_set(134, Feature::vector_packed_decimal); - enable_if_set(152, Feature::vector_packed_decimal_enhancement); - enable_if_set(192, Feature::vector_packed_decimal_enhancement_2); - enable_if_set(199, Feature::vector_packed_decimal_enhancement_3); - - enable_if_set(165, Feature::nnp_assist); - } - - // others - - enable_if_set(76, Feature::message_security_assist_extension3); - enable_if_set(77, Feature::message_security_assist_extension4); - enable_if_set(57, Feature::message_security_assist_extension5); - enable_if_set(146, Feature::message_security_assist_extension8); - enable_if_set(155, Feature::message_security_assist_extension9); - enable_if_set(86, Feature::message_security_assist_extension12); - - enable_if_set(58, Feature::miscellaneous_extensions_2); - enable_if_set(61, Feature::miscellaneous_extensions_3); - enable_if_set(84, Feature::miscellaneous_extensions_4); - - enable_if_set(45, Feature::high_word); - enable_if_set(73, Feature::transactional_execution); - enable_if_set(133, Feature::guarded_storage); - enable_if_set(150, Feature::enhanced_sort); - enable_if_set(151, Feature::deflate_conversion); - enable_if_set(201, Feature::concurrent_functions); - } - - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/openbsd/aarch64.rs b/library/stdarch/crates/std_detect/src/detect/os/openbsd/aarch64.rs deleted file mode 100644 index cfe4ad10ad6..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/openbsd/aarch64.rs +++ /dev/null @@ -1,55 +0,0 @@ -//! Run-time feature detection for Aarch64 on OpenBSD. -//! -//! OpenBSD doesn't trap the mrs instruction, but exposes the system registers through sysctl. -//! https://github.com/openbsd/src/commit/d335af936b9d7dd9cf655cae1ce19560c45de6c8 -//! https://github.com/golang/go/commit/cd54ef1f61945459486e9eea2f016d99ef1da925 - -use crate::detect::cache; -use core::{mem::MaybeUninit, ptr}; - -// Defined in machine/cpu.h. -// https://github.com/openbsd/src/blob/72ccc03bd11da614f31f7ff76e3f6fce99bc1c79/sys/arch/arm64/include/cpu.h#L25-L40 -const CPU_ID_AA64ISAR0: libc::c_int = 2; -const CPU_ID_AA64ISAR1: libc::c_int = 3; -const CPU_ID_AA64MMFR2: libc::c_int = 7; -const CPU_ID_AA64PFR0: libc::c_int = 8; - -/// Try to read the features from the system registers. -pub(crate) fn detect_features() -> cache::Initializer { - // ID_AA64ISAR0_EL1 and ID_AA64ISAR1_EL1 are supported on OpenBSD 7.1+. - // https://github.com/openbsd/src/commit/d335af936b9d7dd9cf655cae1ce19560c45de6c8 - // Others are supported on OpenBSD 7.3+. - // https://github.com/openbsd/src/commit/c7654cd65262d532212f65123ee3905ba200365c - // sysctl returns an unsupported error if operation is not supported, - // so we can safely use this function on older versions of OpenBSD. - let aa64isar0 = sysctl64(&[libc::CTL_MACHDEP, CPU_ID_AA64ISAR0]).unwrap_or(0); - let aa64isar1 = sysctl64(&[libc::CTL_MACHDEP, CPU_ID_AA64ISAR1]).unwrap_or(0); - let aa64mmfr2 = sysctl64(&[libc::CTL_MACHDEP, CPU_ID_AA64MMFR2]).unwrap_or(0); - // Do not use unwrap_or(0) because in fp and asimd fields, 0 indicates that - // the feature is available. - let aa64pfr0 = sysctl64(&[libc::CTL_MACHDEP, CPU_ID_AA64PFR0]); - - super::aarch64::parse_system_registers(aa64isar0, aa64isar1, aa64mmfr2, aa64pfr0) -} - -#[inline] -fn sysctl64(mib: &[libc::c_int]) -> Option<u64> { - const OUT_LEN: libc::size_t = core::mem::size_of::<u64>(); - let mut out = MaybeUninit::<u64>::uninit(); - let mut out_len = OUT_LEN; - let res = unsafe { - libc::sysctl( - mib.as_ptr(), - mib.len() as libc::c_uint, - out.as_mut_ptr() as *mut libc::c_void, - &mut out_len, - ptr::null_mut(), - 0, - ) - }; - if res == -1 || out_len != OUT_LEN { - return None; - } - // SAFETY: we've checked that sysctl was successful and `out` was filled. - Some(unsafe { out.assume_init() }) -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/other.rs b/library/stdarch/crates/std_detect/src/detect/os/other.rs deleted file mode 100644 index 091fafc4ebf..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/other.rs +++ /dev/null @@ -1,8 +0,0 @@ -//! Other operating systems - -use crate::detect::cache; - -#[allow(dead_code)] -pub(crate) fn detect_features() -> cache::Initializer { - cache::Initializer::default() -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/riscv.rs b/library/stdarch/crates/std_detect/src/detect/os/riscv.rs deleted file mode 100644 index 4c59ede8029..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/riscv.rs +++ /dev/null @@ -1,203 +0,0 @@ -//! Run-time feature detection utility for RISC-V. -//! -//! On RISC-V, full feature detection needs a help of one or more -//! feature detection mechanisms (usually provided by the operating system). -//! -//! RISC-V architecture defines many extensions and some have dependency to others. -//! More importantly, some of them cannot be enabled without resolving such -//! dependencies due to limited set of features that such mechanisms provide. -//! -//! This module provides an OS-independent utility to process such relations -//! between RISC-V extensions. - -use crate::detect::{Feature, cache}; - -/// Imply features by the given set of enabled features. -/// -/// Note that it does not perform any consistency checks including existence of -/// conflicting extensions and/or complicated requirements. Eliminating such -/// inconsistencies is the responsibility of the feature detection logic and -/// its provider(s). -pub(crate) fn imply_features(mut value: cache::Initializer) -> cache::Initializer { - loop { - // Check convergence of the feature flags later. - let prev = value; - - // Expect that the optimizer turns repeated operations into - // a fewer number of bit-manipulation operations. - macro_rules! imply { - // Regular implication: - // A1 => (B1[, B2...]), A2 => (B1[, B2...]) and so on. - ($($from: ident)|+ => $($to: ident)&+) => { - if [$(Feature::$from as u32),+].iter().any(|&x| value.test(x)) { - $( - value.set(Feature::$to as u32); - )+ - } - }; - // Implication with multiple requirements: - // A1 && A2 ... => (B1[, B2...]). - ($($from: ident)&+ => $($to: ident)&+) => { - if [$(Feature::$from as u32),+].iter().all(|&x| value.test(x)) { - $( - value.set(Feature::$to as u32); - )+ - } - }; - } - macro_rules! group { - ($group: ident == $($member: ident)&+) => { - // Forward implication as defined in the specifications. - imply!($group => $($member)&+); - // Reverse implication to "group extension" from its members. - // This is not a part of specifications but convenient for - // feature detection and implemented in e.g. LLVM. - imply!($($member)&+ => $group); - }; - } - - /* - If a dependency/implication is not explicitly stated in the - specification, it is denoted as a comment as follows: - "defined as subset": - The latter extension is described as a subset of the former - (but the evidence is weak). - "functional": - The former extension is functionally a superset of the latter - (no direct references though). - */ - - imply!(zvbb => zvkb); - - // Certain set of vector cryptography extensions form a group. - group!(zvkn == zvkned & zvknhb & zvkb & zvkt); - group!(zvknc == zvkn & zvbc); - group!(zvkng == zvkn & zvkg); - group!(zvks == zvksed & zvksh & zvkb & zvkt); - group!(zvksc == zvks & zvbc); - group!(zvksg == zvks & zvkg); - - imply!(zvknhb => zvknha); // functional - - // For vector cryptography, Zvknhb and Zvbc require integer arithmetic - // with EEW=64 (Zve64x) while others not depending on them - // require EEW=32 (Zve32x). - imply!(zvknhb | zvbc => zve64x); - imply!(zvbb | zvkb | zvkg | zvkned | zvknha | zvksed | zvksh => zve32x); - - imply!(zbc => zbkc); // defined as subset - group!(zkn == zbkb & zbkc & zbkx & zkne & zknd & zknh); - group!(zks == zbkb & zbkc & zbkx & zksed & zksh); - group!(zk == zkn & zkr & zkt); - - imply!(zacas => zaamo); - group!(a == zalrsc & zaamo); - - group!(b == zba & zbb & zbs); - - imply!(zcf => zca & f); - imply!(zcd => zca & d); - imply!(zcmop | zcb => zca); - - imply!(zhinx => zhinxmin); - imply!(zdinx | zhinxmin => zfinx); - - imply!(zvfh => zvfhmin); // functional - imply!(zvfh => zve32f & zfhmin); - imply!(zvfhmin => zve32f); - imply!(zvfbfwma => zvfbfmin & zfbfmin); - imply!(zvfbfmin => zve32f); - - imply!(v => zve64d); - imply!(zve64d => zve64f & d); - imply!(zve64f => zve64x & zve32f); - imply!(zve64x => zve32x); - imply!(zve32f => zve32x & f); - - imply!(zfh => zfhmin); - imply!(q => d); - imply!(d | zfhmin | zfa => f); - imply!(zfbfmin => f); // and some of (not all) "Zfh" instructions. - - // Relatively complex implication rules from the "C" extension. - imply!(c => zca); - imply!(c & d => zcd); - #[cfg(target_arch = "riscv32")] - imply!(c & f => zcf); - - imply!(zicntr | zihpm | f | zfinx | zve32x => zicsr); - - // Loop until the feature flags converge. - if prev == value { - return value; - } - } -} - -#[cfg(test)] -mod tests { - use super::*; - - #[test] - fn simple_direct() { - let mut value = cache::Initializer::default(); - value.set(Feature::f as u32); - // F (and other extensions with CSRs) -> Zicsr - assert!(imply_features(value).test(Feature::zicsr as u32)); - } - - #[test] - fn simple_indirect() { - let mut value = cache::Initializer::default(); - value.set(Feature::q as u32); - // Q -> D, D -> F, F -> Zicsr - assert!(imply_features(value).test(Feature::zicsr as u32)); - } - - #[test] - fn complex_zcd() { - let mut value = cache::Initializer::default(); - // C & D -> Zcd - value.set(Feature::c as u32); - assert!(!imply_features(value).test(Feature::zcd as u32)); - value.set(Feature::d as u32); - assert!(imply_features(value).test(Feature::zcd as u32)); - } - - #[test] - fn group_simple_forward() { - let mut value = cache::Initializer::default(); - // A -> Zalrsc & Zaamo (forward implication) - value.set(Feature::a as u32); - let value = imply_features(value); - assert!(value.test(Feature::zalrsc as u32)); - assert!(value.test(Feature::zaamo as u32)); - } - - #[test] - fn group_simple_backward() { - let mut value = cache::Initializer::default(); - // Zalrsc & Zaamo -> A (reverse implication) - value.set(Feature::zalrsc as u32); - value.set(Feature::zaamo as u32); - assert!(imply_features(value).test(Feature::a as u32)); - } - - #[test] - fn group_complex_convergence() { - let mut value = cache::Initializer::default(); - // Needs 3 iterations to converge - // (and 4th iteration for convergence checking): - // 1. [Zvksc] -> Zvks & Zvbc - // 2. Zvks -> Zvksed & Zvksh & Zvkb & Zvkt - // 3a. [Zvkned] & [Zvknhb] & [Zvkb] & Zvkt -> {Zvkn} - // 3b. Zvkn & Zvbc -> {Zvknc} - value.set(Feature::zvksc as u32); - value.set(Feature::zvkned as u32); - value.set(Feature::zvknhb as u32); - value.set(Feature::zvkb as u32); - let value = imply_features(value); - assert!(value.test(Feature::zvkn as u32)); - assert!(value.test(Feature::zvknc as u32)); - } -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/windows/aarch64.rs b/library/stdarch/crates/std_detect/src/detect/os/windows/aarch64.rs deleted file mode 100644 index 937f9f26eed..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/windows/aarch64.rs +++ /dev/null @@ -1,125 +0,0 @@ -//! Run-time feature detection for Aarch64 on Windows. - -use crate::detect::{Feature, cache}; - -/// Try to read the features using IsProcessorFeaturePresent. -pub(crate) fn detect_features() -> cache::Initializer { - type DWORD = u32; - type BOOL = i32; - - const FALSE: BOOL = 0; - // The following Microsoft documents isn't updated for aarch64. - // https://docs.microsoft.com/en-us/windows/win32/api/processthreadsapi/nf-processthreadsapi-isprocessorfeaturepresent - // These are defined in winnt.h of Windows SDK - const PF_ARM_VFP_32_REGISTERS_AVAILABLE: u32 = 18; - const PF_ARM_NEON_INSTRUCTIONS_AVAILABLE: u32 = 19; - const PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE: u32 = 30; - const PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE: u32 = 31; - const PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE: u32 = 34; - const PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE: u32 = 43; - const PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE: u32 = 44; - const PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE: u32 = 45; - const PF_ARM_SVE_INSTRUCTIONS_AVAILABLE: u32 = 46; - const PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE: u32 = 47; - const PF_ARM_SVE2_1_INSTRUCTIONS_AVAILABLE: u32 = 48; - const PF_ARM_SVE_AES_INSTRUCTIONS_AVAILABLE: u32 = 49; - const PF_ARM_SVE_PMULL128_INSTRUCTIONS_AVAILABLE: u32 = 50; - const PF_ARM_SVE_BITPERM_INSTRUCTIONS_AVAILABLE: u32 = 51; - // const PF_ARM_SVE_BF16_INSTRUCTIONS_AVAILABLE: u32 = 52; - // const PF_ARM_SVE_EBF16_INSTRUCTIONS_AVAILABLE: u32 = 53; - const PF_ARM_SVE_B16B16_INSTRUCTIONS_AVAILABLE: u32 = 54; - const PF_ARM_SVE_SHA3_INSTRUCTIONS_AVAILABLE: u32 = 55; - const PF_ARM_SVE_SM4_INSTRUCTIONS_AVAILABLE: u32 = 56; - // const PF_ARM_SVE_I8MM_INSTRUCTIONS_AVAILABLE: u32 = 57; - // const PF_ARM_SVE_F32MM_INSTRUCTIONS_AVAILABLE: u32 = 58; - // const PF_ARM_SVE_F64MM_INSTRUCTIONS_AVAILABLE: u32 = 59; - - unsafe extern "system" { - fn IsProcessorFeaturePresent(ProcessorFeature: DWORD) -> BOOL; - } - - let mut value = cache::Initializer::default(); - { - let mut enable_feature = |f, enable| { - if enable { - value.set(f as u32); - } - }; - - // Some features may be supported on current CPU, - // but no way to detect it by OS API. - // Also, we require unsafe block for the extern "system" calls. - unsafe { - enable_feature( - Feature::fp, - IsProcessorFeaturePresent(PF_ARM_VFP_32_REGISTERS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::asimd, - IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::crc, - IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::lse, - IsProcessorFeaturePresent(PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::dotprod, - IsProcessorFeaturePresent(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::jsconv, - IsProcessorFeaturePresent(PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::rcpc, - IsProcessorFeaturePresent(PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::sve, - IsProcessorFeaturePresent(PF_ARM_SVE_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::sve2, - IsProcessorFeaturePresent(PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::sve2p1, - IsProcessorFeaturePresent(PF_ARM_SVE2_1_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::sve2_aes, - IsProcessorFeaturePresent(PF_ARM_SVE_AES_INSTRUCTIONS_AVAILABLE) != FALSE - && IsProcessorFeaturePresent(PF_ARM_SVE_PMULL128_INSTRUCTIONS_AVAILABLE) - != FALSE, - ); - enable_feature( - Feature::sve2_bitperm, - IsProcessorFeaturePresent(PF_ARM_SVE_BITPERM_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::sve_b16b16, - IsProcessorFeaturePresent(PF_ARM_SVE_B16B16_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::sve2_sha3, - IsProcessorFeaturePresent(PF_ARM_SVE_SHA3_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - enable_feature( - Feature::sve2_sm4, - IsProcessorFeaturePresent(PF_ARM_SVE_SM4_INSTRUCTIONS_AVAILABLE) != FALSE, - ); - // PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE means aes, sha1, sha2 and - // pmull support - let crypto = - IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) != FALSE; - enable_feature(Feature::aes, crypto); - enable_feature(Feature::pmull, crypto); - enable_feature(Feature::sha2, crypto); - } - } - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/os/x86.rs b/library/stdarch/crates/std_detect/src/detect/os/x86.rs deleted file mode 100644 index 8565c2f85e2..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/os/x86.rs +++ /dev/null @@ -1,335 +0,0 @@ -//! x86 run-time feature detection is OS independent. - -#[cfg(target_arch = "x86")] -use core::arch::x86::*; -#[cfg(target_arch = "x86_64")] -use core::arch::x86_64::*; - -use core::mem; - -use crate::detect::{Feature, bit, cache}; - -/// Run-time feature detection on x86 works by using the CPUID instruction. -/// -/// The [CPUID Wikipedia page][wiki_cpuid] contains -/// all the information about which flags to set to query which values, and in -/// which registers these are reported. -/// -/// The definitive references are: -/// - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2: -/// Instruction Set Reference, A-Z][intel64_ref]. -/// - [AMD64 Architecture Programmer's Manual, Volume 3: General-Purpose and -/// System Instructions][amd64_ref]. -/// -/// [wiki_cpuid]: https://en.wikipedia.org/wiki/CPUID -/// [intel64_ref]: http://www.intel.de/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf -/// [amd64_ref]: http://support.amd.com/TechDocs/24594.pdf -#[allow(clippy::similar_names)] -pub(crate) fn detect_features() -> cache::Initializer { - let mut value = cache::Initializer::default(); - - if cfg!(target_env = "sgx") { - // doesn't support this because it is untrusted data - return value; - } - - // Calling `__cpuid`/`__cpuid_count` from here on is safe because the CPU - // has `cpuid` support. - - // 0. EAX = 0: Basic Information: - // - EAX returns the "Highest Function Parameter", that is, the maximum - // leaf value for subsequent calls of `cpuinfo` in range [0, - // 0x8000_0000]. - The vendor ID is stored in 12 u8 ascii chars, - // returned in EBX, EDX, and ECX (in that order): - let (max_basic_leaf, vendor_id) = unsafe { - let CpuidResult { - eax: max_basic_leaf, - ebx, - ecx, - edx, - } = __cpuid(0); - let vendor_id: [[u8; 4]; 3] = [ebx.to_ne_bytes(), edx.to_ne_bytes(), ecx.to_ne_bytes()]; - let vendor_id: [u8; 12] = mem::transmute(vendor_id); - (max_basic_leaf, vendor_id) - }; - - if max_basic_leaf < 1 { - // Earlier Intel 486, CPUID not implemented - return value; - } - - // EAX = 1, ECX = 0: Queries "Processor Info and Feature Bits"; - // Contains information about most x86 features. - let CpuidResult { - ecx: proc_info_ecx, - edx: proc_info_edx, - .. - } = unsafe { __cpuid(0x0000_0001_u32) }; - - // EAX = 7: Queries "Extended Features"; - // Contains information about bmi,bmi2, and avx2 support. - let ( - extended_features_ebx, - extended_features_ecx, - extended_features_edx, - extended_features_eax_leaf_1, - extended_features_edx_leaf_1, - ) = if max_basic_leaf >= 7 { - let CpuidResult { ebx, ecx, edx, .. } = unsafe { __cpuid(0x0000_0007_u32) }; - let CpuidResult { - eax: eax_1, - edx: edx_1, - .. - } = unsafe { __cpuid_count(0x0000_0007_u32, 0x0000_0001_u32) }; - (ebx, ecx, edx, eax_1, edx_1) - } else { - (0, 0, 0, 0, 0) // CPUID does not support "Extended Features" - }; - - // EAX = 0x8000_0000, ECX = 0: Get Highest Extended Function Supported - // - EAX returns the max leaf value for extended information, that is, - // `cpuid` calls in range [0x8000_0000; u32::MAX]: - let CpuidResult { - eax: extended_max_basic_leaf, - .. - } = unsafe { __cpuid(0x8000_0000_u32) }; - - // EAX = 0x8000_0001, ECX=0: Queries "Extended Processor Info and Feature - // Bits" - let extended_proc_info_ecx = if extended_max_basic_leaf >= 1 { - let CpuidResult { ecx, .. } = unsafe { __cpuid(0x8000_0001_u32) }; - ecx - } else { - 0 - }; - - { - // borrows value till the end of this scope: - let mut enable = |r, rb, f| { - let present = bit::test(r as usize, rb); - if present { - value.set(f as u32); - } - present - }; - - enable(proc_info_ecx, 0, Feature::sse3); - enable(proc_info_ecx, 1, Feature::pclmulqdq); - enable(proc_info_ecx, 9, Feature::ssse3); - enable(proc_info_ecx, 13, Feature::cmpxchg16b); - enable(proc_info_ecx, 19, Feature::sse4_1); - enable(proc_info_ecx, 20, Feature::sse4_2); - enable(proc_info_ecx, 22, Feature::movbe); - enable(proc_info_ecx, 23, Feature::popcnt); - enable(proc_info_ecx, 25, Feature::aes); - let f16c = enable(proc_info_ecx, 29, Feature::f16c); - enable(proc_info_ecx, 30, Feature::rdrand); - enable(extended_features_ebx, 18, Feature::rdseed); - enable(extended_features_ebx, 19, Feature::adx); - enable(extended_features_ebx, 11, Feature::rtm); - enable(proc_info_edx, 4, Feature::tsc); - enable(proc_info_edx, 23, Feature::mmx); - enable(proc_info_edx, 24, Feature::fxsr); - enable(proc_info_edx, 25, Feature::sse); - enable(proc_info_edx, 26, Feature::sse2); - enable(extended_features_ebx, 29, Feature::sha); - - enable(extended_features_ecx, 8, Feature::gfni); - enable(extended_features_ecx, 9, Feature::vaes); - enable(extended_features_ecx, 10, Feature::vpclmulqdq); - - enable(extended_features_ebx, 3, Feature::bmi1); - enable(extended_features_ebx, 8, Feature::bmi2); - - enable(extended_features_ebx, 9, Feature::ermsb); - - enable(extended_features_eax_leaf_1, 31, Feature::movrs); - - // Detect if CPUID.19h available - if bit::test(extended_features_ecx as usize, 23) { - let CpuidResult { ebx, .. } = unsafe { __cpuid(0x19) }; - enable(ebx, 0, Feature::kl); - enable(ebx, 2, Feature::widekl); - } - - // `XSAVE` and `AVX` support: - let cpu_xsave = bit::test(proc_info_ecx as usize, 26); - if cpu_xsave { - // 0. Here the CPU supports `XSAVE`. - - // 1. Detect `OSXSAVE`, that is, whether the OS is AVX enabled and - // supports saving the state of the AVX/AVX2 vector registers on - // context-switches, see: - // - // - [intel: is avx enabled?][is_avx_enabled], - // - [mozilla: sse.cpp][mozilla_sse_cpp]. - // - // [is_avx_enabled]: https://software.intel.com/en-us/blogs/2011/04/14/is-avx-enabled - // [mozilla_sse_cpp]: https://hg.mozilla.org/mozilla-central/file/64bab5cbb9b6/mozglue/build/SSE.cpp#l190 - let cpu_osxsave = bit::test(proc_info_ecx as usize, 27); - - if cpu_osxsave { - // 2. The OS must have signaled the CPU that it supports saving and - // restoring the: - // - // * SSE -> `XCR0.SSE[1]` - // * AVX -> `XCR0.AVX[2]` - // * AVX-512 -> `XCR0.AVX-512[7:5]`. - // * AMX -> `XCR0.AMX[18:17]` - // - // by setting the corresponding bits of `XCR0` to `1`. - // - // This is safe because the CPU supports `xsave` - // and the OS has set `osxsave`. - let xcr0 = unsafe { _xgetbv(0) }; - // Test `XCR0.SSE[1]` and `XCR0.AVX[2]` with the mask `0b110 == 6`: - let os_avx_support = xcr0 & 6 == 6; - // Test `XCR0.AVX-512[7:5]` with the mask `0b1110_0000 == 0xe0`: - let os_avx512_support = xcr0 & 0xe0 == 0xe0; - // Test `XCR0.AMX[18:17]` with the mask `0b110_0000_0000_0000_0000 == 0x60000` - let os_amx_support = xcr0 & 0x60000 == 0x60000; - - // Only if the OS and the CPU support saving/restoring the AVX - // registers we enable `xsave` support: - if os_avx_support { - // See "13.3 ENABLING THE XSAVE FEATURE SET AND XSAVE-ENABLED - // FEATURES" in the "Intel® 64 and IA-32 Architectures Software - // Developer’s Manual, Volume 1: Basic Architecture": - // - // "Software enables the XSAVE feature set by setting - // CR4.OSXSAVE[bit 18] to 1 (e.g., with the MOV to CR4 - // instruction). If this bit is 0, execution of any of XGETBV, - // XRSTOR, XRSTORS, XSAVE, XSAVEC, XSAVEOPT, XSAVES, and XSETBV - // causes an invalid-opcode exception (#UD)" - // - enable(proc_info_ecx, 26, Feature::xsave); - - // For `xsaveopt`, `xsavec`, and `xsaves` we need to query: - // Processor Extended State Enumeration Sub-leaf (EAX = 0DH, - // ECX = 1): - if max_basic_leaf >= 0xd { - let CpuidResult { - eax: proc_extended_state1_eax, - .. - } = unsafe { __cpuid_count(0xd_u32, 1) }; - enable(proc_extended_state1_eax, 0, Feature::xsaveopt); - enable(proc_extended_state1_eax, 1, Feature::xsavec); - enable(proc_extended_state1_eax, 3, Feature::xsaves); - } - - // FMA (uses 256-bit wide registers): - let fma = enable(proc_info_ecx, 12, Feature::fma); - - // And AVX/AVX2: - enable(proc_info_ecx, 28, Feature::avx); - enable(extended_features_ebx, 5, Feature::avx2); - - // "Short" versions of AVX512 instructions - enable(extended_features_eax_leaf_1, 4, Feature::avxvnni); - enable(extended_features_eax_leaf_1, 23, Feature::avxifma); - enable(extended_features_edx_leaf_1, 4, Feature::avxvnniint8); - enable(extended_features_edx_leaf_1, 5, Feature::avxneconvert); - enable(extended_features_edx_leaf_1, 10, Feature::avxvnniint16); - - enable(extended_features_eax_leaf_1, 0, Feature::sha512); - enable(extended_features_eax_leaf_1, 1, Feature::sm3); - enable(extended_features_eax_leaf_1, 2, Feature::sm4); - - // For AVX-512 the OS also needs to support saving/restoring - // the extended state, only then we enable AVX-512 support: - // Also, Rust makes `avx512f` imply `fma` and `f16c`, because - // otherwise the assembler is broken. But Intel doesn't guarantee - // that `fma` and `f16c` are available with `avx512f`, so we - // need to check for them separately. - if os_avx512_support && f16c && fma { - enable(extended_features_ebx, 16, Feature::avx512f); - enable(extended_features_ebx, 17, Feature::avx512dq); - enable(extended_features_ebx, 21, Feature::avx512ifma); - enable(extended_features_ebx, 26, Feature::avx512pf); - enable(extended_features_ebx, 27, Feature::avx512er); - enable(extended_features_ebx, 28, Feature::avx512cd); - enable(extended_features_ebx, 30, Feature::avx512bw); - enable(extended_features_ebx, 31, Feature::avx512vl); - enable(extended_features_ecx, 1, Feature::avx512vbmi); - enable(extended_features_ecx, 6, Feature::avx512vbmi2); - enable(extended_features_ecx, 11, Feature::avx512vnni); - enable(extended_features_ecx, 12, Feature::avx512bitalg); - enable(extended_features_ecx, 14, Feature::avx512vpopcntdq); - enable(extended_features_edx, 8, Feature::avx512vp2intersect); - enable(extended_features_edx, 23, Feature::avx512fp16); - enable(extended_features_eax_leaf_1, 5, Feature::avx512bf16); - } - } - - if os_amx_support { - enable(extended_features_edx, 24, Feature::amx_tile); - enable(extended_features_edx, 25, Feature::amx_int8); - enable(extended_features_edx, 22, Feature::amx_bf16); - enable(extended_features_eax_leaf_1, 21, Feature::amx_fp16); - enable(extended_features_edx_leaf_1, 8, Feature::amx_complex); - - if max_basic_leaf >= 0x1e { - let CpuidResult { - eax: amx_feature_flags_eax, - .. - } = unsafe { __cpuid_count(0x1e_u32, 1) }; - - enable(amx_feature_flags_eax, 4, Feature::amx_fp8); - enable(amx_feature_flags_eax, 5, Feature::amx_transpose); - enable(amx_feature_flags_eax, 6, Feature::amx_tf32); - enable(amx_feature_flags_eax, 7, Feature::amx_avx512); - enable(amx_feature_flags_eax, 8, Feature::amx_movrs); - } - } - } - } - - // This detects ABM on AMD CPUs and LZCNT on Intel CPUs. - // On intel CPUs with popcnt, lzcnt implements the - // "missing part" of ABM, so we map both to the same - // internal feature. - // - // The `is_x86_feature_detected!("lzcnt")` macro then - // internally maps to Feature::abm. - enable(extended_proc_info_ecx, 5, Feature::lzcnt); - - // As Hygon Dhyana originates from AMD technology and shares most of the architecture with - // AMD's family 17h, but with different CPU Vendor ID("HygonGenuine")/Family series - // number(Family 18h). - // - // For CPUID feature bits, Hygon Dhyana(family 18h) share the same definition with AMD - // family 17h. - // - // Related AMD CPUID specification is https://www.amd.com/system/files/TechDocs/25481.pdf. - // Related Hygon kernel patch can be found on - // http://lkml.kernel.org/r/5ce86123a7b9dad925ac583d88d2f921040e859b.1538583282.git.puwen@hygon.cn - if vendor_id == *b"AuthenticAMD" || vendor_id == *b"HygonGenuine" { - // These features are available on AMD arch CPUs: - enable(extended_proc_info_ecx, 6, Feature::sse4a); - enable(extended_proc_info_ecx, 21, Feature::tbm); - enable(extended_proc_info_ecx, 11, Feature::xop); - } - } - - // Unfortunately, some Skylake chips erroneously report support for BMI1 and - // BMI2 without actual support. These chips don't support AVX, and it seems - // that all Intel chips with non-erroneous support BMI do (I didn't check - // other vendors), so we can disable these flags for chips that don't also - // report support for AVX. - // - // It's possible this will pessimize future chips that do support BMI and - // not AVX, but this seems minor compared to a hard crash you get when - // executing an unsupported instruction (to put it another way, it's safe - // for us to under-report CPU features, but not to over-report them). Still, - // to limit any impact this may have in the future, we only do this for - // Intel chips, as it's a bug only present in their chips. - // - // This bug is documented as `SKL052` in the errata section of this document: - // http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/desktop-6th-gen-core-family-spec-update.pdf - if vendor_id == *b"GenuineIntel" && !value.test(Feature::avx as u32) { - value.unset(Feature::bmi1 as u32); - value.unset(Feature::bmi2 as u32); - } - - value -} diff --git a/library/stdarch/crates/std_detect/src/detect/test_data/linux-artificial-aarch64.auxv b/library/stdarch/crates/std_detect/src/detect/test_data/linux-artificial-aarch64.auxv deleted file mode 100644 index ec826afcf38..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/test_data/linux-artificial-aarch64.auxv +++ /dev/null Binary files differdiff --git a/library/stdarch/crates/std_detect/src/detect/test_data/linux-empty-hwcap2-aarch64.auxv b/library/stdarch/crates/std_detect/src/detect/test_data/linux-empty-hwcap2-aarch64.auxv deleted file mode 100644 index 95537b73f20..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/test_data/linux-empty-hwcap2-aarch64.auxv +++ /dev/null Binary files differdiff --git a/library/stdarch/crates/std_detect/src/detect/test_data/linux-hwcap2-aarch64.auxv b/library/stdarch/crates/std_detect/src/detect/test_data/linux-hwcap2-aarch64.auxv deleted file mode 100644 index 1d87264b221..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/test_data/linux-hwcap2-aarch64.auxv +++ /dev/null Binary files differdiff --git a/library/stdarch/crates/std_detect/src/detect/test_data/linux-no-hwcap2-aarch64.auxv b/library/stdarch/crates/std_detect/src/detect/test_data/linux-no-hwcap2-aarch64.auxv deleted file mode 100644 index 35f01cc767c..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/test_data/linux-no-hwcap2-aarch64.auxv +++ /dev/null Binary files differdiff --git a/library/stdarch/crates/std_detect/src/detect/test_data/linux-rpi3.auxv b/library/stdarch/crates/std_detect/src/detect/test_data/linux-rpi3.auxv deleted file mode 100644 index 0538e661f63..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/test_data/linux-rpi3.auxv +++ /dev/null Binary files differdiff --git a/library/stdarch/crates/std_detect/src/detect/test_data/macos-virtualbox-linux-x86-4850HQ.auxv b/library/stdarch/crates/std_detect/src/detect/test_data/macos-virtualbox-linux-x86-4850HQ.auxv deleted file mode 100644 index 75abc02d178..00000000000 --- a/library/stdarch/crates/std_detect/src/detect/test_data/macos-virtualbox-linux-x86-4850HQ.auxv +++ /dev/null Binary files differdiff --git a/library/stdarch/crates/std_detect/src/lib.rs b/library/stdarch/crates/std_detect/src/lib.rs deleted file mode 100644 index ab1b77bad5b..00000000000 --- a/library/stdarch/crates/std_detect/src/lib.rs +++ /dev/null @@ -1,36 +0,0 @@ -//! Run-time feature detection for the Rust standard library. -//! -//! To detect whether a feature is enabled in the system running the binary -//! use one of the appropriate macro for the target: -//! -//! * `x86` and `x86_64`: [`is_x86_feature_detected`] -//! * `arm`: [`is_arm_feature_detected`] -//! * `aarch64`: [`is_aarch64_feature_detected`] -//! * `riscv`: [`is_riscv_feature_detected`] -//! * `mips`: [`is_mips_feature_detected`] -//! * `mips64`: [`is_mips64_feature_detected`] -//! * `powerpc`: [`is_powerpc_feature_detected`] -//! * `powerpc64`: [`is_powerpc64_feature_detected`] -//! * `loongarch`: [`is_loongarch_feature_detected`] -//! * `s390x`: [`is_s390x_feature_detected`] - -#![unstable(feature = "stdarch_internal", issue = "none")] -#![feature(staged_api, doc_cfg, allow_internal_unstable)] -#![deny(rust_2018_idioms)] -#![allow(clippy::shadow_reuse)] -#![cfg_attr(test, allow(unused_imports))] -#![no_std] -#![allow(internal_features)] - -#[cfg(test)] -#[macro_use] -extern crate std; - -// rust-lang/rust#83888: removing `extern crate` gives an error that `vec_spare> -#[cfg_attr(feature = "std_detect_file_io", allow(unused_extern_crates))] -#[cfg(feature = "std_detect_file_io")] -extern crate alloc; - -#[doc(hidden)] -#[unstable(feature = "stdarch_internal", issue = "none")] -pub mod detect; diff --git a/library/stdarch/crates/std_detect/tests/cpu-detection.rs b/library/stdarch/crates/std_detect/tests/cpu-detection.rs deleted file mode 100644 index 7976aedc758..00000000000 --- a/library/stdarch/crates/std_detect/tests/cpu-detection.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(internal_features)] -#![feature(stdarch_internal)] -#![cfg_attr(target_arch = "arm", feature(stdarch_arm_feature_detection))] -#![cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - feature(stdarch_aarch64_feature_detection) -)] -#![cfg_attr( - any(target_arch = "riscv32", target_arch = "riscv64"), - feature(stdarch_riscv_feature_detection) -)] -#![cfg_attr(target_arch = "powerpc", feature(stdarch_powerpc_feature_detection))] -#![cfg_attr(target_arch = "powerpc64", feature(stdarch_powerpc_feature_detection))] -#![cfg_attr(target_arch = "s390x", feature(stdarch_s390x_feature_detection))] -#![allow(clippy::unwrap_used, clippy::use_debug, clippy::print_stdout)] - -#[cfg_attr( - any( - target_arch = "arm", - target_arch = "aarch64", - target_arch = "arm64ec", - target_arch = "riscv32", - target_arch = "riscv64", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", - ), - macro_use -)] -extern crate std_detect; - -#[test] -fn all() { - for (f, e) in std_detect::detect::features() { - println!("{f}: {e}"); - } -} - -#[test] -#[cfg(all(target_arch = "arm", target_os = "freebsd"))] -fn arm_freebsd() { - println!("neon: {}", is_arm_feature_detected!("neon")); - println!("pmull: {}", is_arm_feature_detected!("pmull")); - println!("crc: {}", is_arm_feature_detected!("crc")); - println!("aes: {}", is_arm_feature_detected!("aes")); - println!("sha2: {}", is_arm_feature_detected!("sha2")); -} - -#[test] -#[cfg(all(target_arch = "arm", any(target_os = "linux", target_os = "android")))] -fn arm_linux() { - println!("neon: {}", is_arm_feature_detected!("neon")); - println!("pmull: {}", is_arm_feature_detected!("pmull")); - println!("crc: {}", is_arm_feature_detected!("crc")); - println!("aes: {}", is_arm_feature_detected!("aes")); - println!("sha2: {}", is_arm_feature_detected!("sha2")); - println!("dotprod: {}", is_arm_feature_detected!("dotprod")); - println!("i8mm: {}", is_arm_feature_detected!("i8mm")); -} - -#[test] -#[cfg(all( - target_arch = "aarch64", - any(target_os = "linux", target_os = "android") -))] -fn aarch64_linux() { - println!("asimd: {}", is_aarch64_feature_detected!("asimd")); - println!("neon: {}", is_aarch64_feature_detected!("neon")); - println!("pmull: {}", is_aarch64_feature_detected!("pmull")); - println!("fp: {}", is_aarch64_feature_detected!("fp")); - println!("fp16: {}", is_aarch64_feature_detected!("fp16")); - println!("sve: {}", is_aarch64_feature_detected!("sve")); - println!("crc: {}", is_aarch64_feature_detected!("crc")); - println!("lse: {}", is_aarch64_feature_detected!("lse")); - println!("lse2: {}", is_aarch64_feature_detected!("lse2")); - println!("lse128: {}", is_aarch64_feature_detected!("lse128")); - println!("rdm: {}", is_aarch64_feature_detected!("rdm")); - println!("rcpc: {}", is_aarch64_feature_detected!("rcpc")); - println!("rcpc2: {}", is_aarch64_feature_detected!("rcpc2")); - println!("rcpc3: {}", is_aarch64_feature_detected!("rcpc3")); - println!("dotprod: {}", is_aarch64_feature_detected!("dotprod")); - println!("tme: {}", is_aarch64_feature_detected!("tme")); - println!("fhm: {}", is_aarch64_feature_detected!("fhm")); - println!("dit: {}", is_aarch64_feature_detected!("dit")); - println!("flagm: {}", is_aarch64_feature_detected!("flagm")); - println!("flagm2: {}", is_aarch64_feature_detected!("flagm2")); - println!("ssbs: {}", is_aarch64_feature_detected!("ssbs")); - println!("sb: {}", is_aarch64_feature_detected!("sb")); - println!("paca: {}", is_aarch64_feature_detected!("paca")); - println!("pacg: {}", is_aarch64_feature_detected!("pacg")); - // println!("pauth-lr: {}", is_aarch64_feature_detected!("pauth-lr")); - println!("dpb: {}", is_aarch64_feature_detected!("dpb")); - println!("dpb2: {}", is_aarch64_feature_detected!("dpb2")); - println!("sve-b16b16: {}", is_aarch64_feature_detected!("sve-b16b16")); - println!("sve2: {}", is_aarch64_feature_detected!("sve2")); - println!("sve2p1: {}", is_aarch64_feature_detected!("sve2p1")); - println!("sve2-aes: {}", is_aarch64_feature_detected!("sve2-aes")); - println!("sve2-sm4: {}", is_aarch64_feature_detected!("sve2-sm4")); - println!("sve2-sha3: {}", is_aarch64_feature_detected!("sve2-sha3")); - println!( - "sve2-bitperm: {}", - is_aarch64_feature_detected!("sve2-bitperm") - ); - println!("frintts: {}", is_aarch64_feature_detected!("frintts")); - println!("i8mm: {}", is_aarch64_feature_detected!("i8mm")); - println!("f32mm: {}", is_aarch64_feature_detected!("f32mm")); - println!("f64mm: {}", is_aarch64_feature_detected!("f64mm")); - println!("bf16: {}", is_aarch64_feature_detected!("bf16")); - println!("rand: {}", is_aarch64_feature_detected!("rand")); - println!("bti: {}", is_aarch64_feature_detected!("bti")); - println!("mte: {}", is_aarch64_feature_detected!("mte")); - println!("jsconv: {}", is_aarch64_feature_detected!("jsconv")); - println!("fcma: {}", is_aarch64_feature_detected!("fcma")); - println!("aes: {}", is_aarch64_feature_detected!("aes")); - println!("sha2: {}", is_aarch64_feature_detected!("sha2")); - println!("sha3: {}", is_aarch64_feature_detected!("sha3")); - println!("sm4: {}", is_aarch64_feature_detected!("sm4")); - println!("hbc: {}", is_aarch64_feature_detected!("hbc")); - println!("mops: {}", is_aarch64_feature_detected!("mops")); - println!("ecv: {}", is_aarch64_feature_detected!("ecv")); - println!("cssc: {}", is_aarch64_feature_detected!("cssc")); - println!("fpmr: {}", is_aarch64_feature_detected!("fpmr")); - println!("lut: {}", is_aarch64_feature_detected!("lut")); - println!("faminmax: {}", is_aarch64_feature_detected!("faminmax")); - println!("fp8: {}", is_aarch64_feature_detected!("fp8")); - println!("fp8fma: {}", is_aarch64_feature_detected!("fp8fma")); - println!("fp8dot4: {}", is_aarch64_feature_detected!("fp8dot4")); - println!("fp8dot2: {}", is_aarch64_feature_detected!("fp8dot2")); - println!("wfxt: {}", is_aarch64_feature_detected!("wfxt")); - println!("sme: {}", is_aarch64_feature_detected!("sme")); - println!("sme-b16b16: {}", is_aarch64_feature_detected!("sme-b16b16")); - println!("sme-i16i64: {}", is_aarch64_feature_detected!("sme-i16i64")); - println!("sme-f64f64: {}", is_aarch64_feature_detected!("sme-f64f64")); - println!("sme-fa64: {}", is_aarch64_feature_detected!("sme-fa64")); - println!("sme2: {}", is_aarch64_feature_detected!("sme2")); - println!("sme2p1: {}", is_aarch64_feature_detected!("sme2p1")); - println!("sme-f16f16: {}", is_aarch64_feature_detected!("sme-f16f16")); - println!("sme-lutv2: {}", is_aarch64_feature_detected!("sme-lutv2")); - println!("sme-f8f16: {}", is_aarch64_feature_detected!("sme-f8f16")); - println!("sme-f8f32: {}", is_aarch64_feature_detected!("sme-f8f32")); - println!( - "ssve-fp8fma: {}", - is_aarch64_feature_detected!("ssve-fp8fma") - ); - println!( - "ssve-fp8dot4: {}", - is_aarch64_feature_detected!("ssve-fp8dot4") - ); - println!( - "ssve-fp8dot2: {}", - is_aarch64_feature_detected!("ssve-fp8dot2") - ); -} - -#[test] -#[cfg(all( - any(target_arch = "aarch64", target_arch = "arm64ec"), - target_os = "windows" -))] -fn aarch64_windows() { - println!("asimd: {:?}", is_aarch64_feature_detected!("asimd")); - println!("fp: {:?}", is_aarch64_feature_detected!("fp")); - println!("crc: {:?}", is_aarch64_feature_detected!("crc")); - println!("lse: {:?}", is_aarch64_feature_detected!("lse")); - println!("dotprod: {:?}", is_aarch64_feature_detected!("dotprod")); - println!("jsconv: {:?}", is_aarch64_feature_detected!("jsconv")); - println!("rcpc: {:?}", is_aarch64_feature_detected!("rcpc")); - println!("aes: {:?}", is_aarch64_feature_detected!("aes")); - println!("pmull: {:?}", is_aarch64_feature_detected!("pmull")); - println!("sha2: {:?}", is_aarch64_feature_detected!("sha2")); -} - -#[test] -#[cfg(all( - target_arch = "aarch64", - any(target_os = "freebsd", target_os = "openbsd") -))] -fn aarch64_bsd() { - println!("asimd: {:?}", is_aarch64_feature_detected!("asimd")); - println!("pmull: {:?}", is_aarch64_feature_detected!("pmull")); - println!("fp: {:?}", is_aarch64_feature_detected!("fp")); - println!("fp16: {:?}", is_aarch64_feature_detected!("fp16")); - println!("sve: {:?}", is_aarch64_feature_detected!("sve")); - println!("crc: {:?}", is_aarch64_feature_detected!("crc")); - println!("lse: {:?}", is_aarch64_feature_detected!("lse")); - println!("lse2: {:?}", is_aarch64_feature_detected!("lse2")); - println!("rdm: {:?}", is_aarch64_feature_detected!("rdm")); - println!("rcpc: {:?}", is_aarch64_feature_detected!("rcpc")); - println!("dotprod: {:?}", is_aarch64_feature_detected!("dotprod")); - println!("tme: {:?}", is_aarch64_feature_detected!("tme")); - println!("paca: {:?}", is_aarch64_feature_detected!("paca")); - println!("pacg: {:?}", is_aarch64_feature_detected!("pacg")); - println!("aes: {:?}", is_aarch64_feature_detected!("aes")); - println!("sha2: {:?}", is_aarch64_feature_detected!("sha2")); -} - -#[test] -#[cfg(all(target_arch = "aarch64", target_vendor = "apple"))] -fn aarch64_darwin() { - println!("asimd: {:?}", is_aarch64_feature_detected!("asimd")); - println!("fp: {:?}", is_aarch64_feature_detected!("fp")); - println!("fp16: {:?}", is_aarch64_feature_detected!("fp16")); - println!("pmull: {:?}", is_aarch64_feature_detected!("pmull")); - println!("crc: {:?}", is_aarch64_feature_detected!("crc")); - println!("lse: {:?}", is_aarch64_feature_detected!("lse")); - println!("lse2: {:?}", is_aarch64_feature_detected!("lse2")); - println!("rdm: {:?}", is_aarch64_feature_detected!("rdm")); - println!("rcpc: {:?}", is_aarch64_feature_detected!("rcpc")); - println!("rcpc2: {:?}", is_aarch64_feature_detected!("rcpc2")); - println!("dotprod: {:?}", is_aarch64_feature_detected!("dotprod")); - println!("fhm: {:?}", is_aarch64_feature_detected!("fhm")); - println!("flagm: {:?}", is_aarch64_feature_detected!("flagm")); - println!("ssbs: {:?}", is_aarch64_feature_detected!("ssbs")); - println!("sb: {:?}", is_aarch64_feature_detected!("sb")); - println!("paca: {:?}", is_aarch64_feature_detected!("paca")); - println!("dpb: {:?}", is_aarch64_feature_detected!("dpb")); - println!("dpb2: {:?}", is_aarch64_feature_detected!("dpb2")); - println!("frintts: {:?}", is_aarch64_feature_detected!("frintts")); - println!("i8mm: {:?}", is_aarch64_feature_detected!("i8mm")); - println!("bf16: {:?}", is_aarch64_feature_detected!("bf16")); - println!("bti: {:?}", is_aarch64_feature_detected!("bti")); - println!("fcma: {:?}", is_aarch64_feature_detected!("fcma")); - println!("jsconv: {:?}", is_aarch64_feature_detected!("jsconv")); - println!("aes: {:?}", is_aarch64_feature_detected!("aes")); - println!("sha2: {:?}", is_aarch64_feature_detected!("sha2")); - println!("sha3: {:?}", is_aarch64_feature_detected!("sha3")); -} - -#[test] -#[cfg(all( - any(target_arch = "riscv32", target_arch = "riscv64"), - any(target_os = "linux", target_os = "android") -))] -fn riscv_linux() { - println!("rv32i: {}", is_riscv_feature_detected!("rv32i")); - println!("rv32e: {}", is_riscv_feature_detected!("rv32e")); - println!("rv64i: {}", is_riscv_feature_detected!("rv64i")); - println!("rv128i: {}", is_riscv_feature_detected!("rv128i")); - println!( - "unaligned-scalar-mem: {}", - is_riscv_feature_detected!("unaligned-scalar-mem") - ); - println!( - "unaligned-vector-mem: {}", - is_riscv_feature_detected!("unaligned-vector-mem") - ); - println!("zicsr: {}", is_riscv_feature_detected!("zicsr")); - println!("zicntr: {}", is_riscv_feature_detected!("zicntr")); - println!("zihpm: {}", is_riscv_feature_detected!("zihpm")); - println!("zifencei: {}", is_riscv_feature_detected!("zifencei")); - println!("zihintntl: {}", is_riscv_feature_detected!("zihintntl")); - println!("zihintpause: {}", is_riscv_feature_detected!("zihintpause")); - println!("zimop: {}", is_riscv_feature_detected!("zimop")); - println!("zicbom: {}", is_riscv_feature_detected!("zicbom")); - println!("zicboz: {}", is_riscv_feature_detected!("zicboz")); - println!("zicond: {}", is_riscv_feature_detected!("zicond")); - println!("m: {}", is_riscv_feature_detected!("m")); - println!("a: {}", is_riscv_feature_detected!("a")); - println!("zalrsc: {}", is_riscv_feature_detected!("zalrsc")); - println!("zaamo: {}", is_riscv_feature_detected!("zaamo")); - println!("zawrs: {}", is_riscv_feature_detected!("zawrs")); - println!("zacas: {}", is_riscv_feature_detected!("zacas")); - println!("zam: {}", is_riscv_feature_detected!("zam")); - println!("ztso: {}", is_riscv_feature_detected!("ztso")); - println!("f: {}", is_riscv_feature_detected!("f")); - println!("d: {}", is_riscv_feature_detected!("d")); - println!("q: {}", is_riscv_feature_detected!("q")); - println!("zfh: {}", is_riscv_feature_detected!("zfh")); - println!("zfhmin: {}", is_riscv_feature_detected!("zfhmin")); - println!("zfa: {}", is_riscv_feature_detected!("zfa")); - println!("zfbfmin: {}", is_riscv_feature_detected!("zfbfmin")); - println!("zfinx: {}", is_riscv_feature_detected!("zfinx")); - println!("zdinx: {}", is_riscv_feature_detected!("zdinx")); - println!("zhinx: {}", is_riscv_feature_detected!("zhinx")); - println!("zhinxmin: {}", is_riscv_feature_detected!("zhinxmin")); - println!("c: {}", is_riscv_feature_detected!("c")); - println!("zca: {}", is_riscv_feature_detected!("zca")); - println!("zcf: {}", is_riscv_feature_detected!("zcf")); - println!("zcd: {}", is_riscv_feature_detected!("zcd")); - println!("zcb: {}", is_riscv_feature_detected!("zcb")); - println!("zcmop: {}", is_riscv_feature_detected!("zcmop")); - println!("b: {}", is_riscv_feature_detected!("b")); - println!("zba: {}", is_riscv_feature_detected!("zba")); - println!("zbb: {}", is_riscv_feature_detected!("zbb")); - println!("zbc: {}", is_riscv_feature_detected!("zbc")); - println!("zbs: {}", is_riscv_feature_detected!("zbs")); - println!("zbkb: {}", is_riscv_feature_detected!("zbkb")); - println!("zbkc: {}", is_riscv_feature_detected!("zbkc")); - println!("zbkx: {}", is_riscv_feature_detected!("zbkx")); - println!("zknd: {}", is_riscv_feature_detected!("zknd")); - println!("zkne: {}", is_riscv_feature_detected!("zkne")); - println!("zknh: {}", is_riscv_feature_detected!("zknh")); - println!("zksed: {}", is_riscv_feature_detected!("zksed")); - println!("zksh: {}", is_riscv_feature_detected!("zksh")); - println!("zkr: {}", is_riscv_feature_detected!("zkr")); - println!("zkn: {}", is_riscv_feature_detected!("zkn")); - println!("zks: {}", is_riscv_feature_detected!("zks")); - println!("zk: {}", is_riscv_feature_detected!("zk")); - println!("zkt: {}", is_riscv_feature_detected!("zkt")); - println!("v: {}", is_riscv_feature_detected!("v")); - println!("zve32x: {}", is_riscv_feature_detected!("zve32x")); - println!("zve32f: {}", is_riscv_feature_detected!("zve32f")); - println!("zve64x: {}", is_riscv_feature_detected!("zve64x")); - println!("zve64f: {}", is_riscv_feature_detected!("zve64f")); - println!("zve64d: {}", is_riscv_feature_detected!("zve64d")); - println!("zvfh: {}", is_riscv_feature_detected!("zvfh")); - println!("zvfhmin: {}", is_riscv_feature_detected!("zvfhmin")); - println!("zvfbfmin: {}", is_riscv_feature_detected!("zvfbfmin")); - println!("zvfbfwma: {}", is_riscv_feature_detected!("zvfbfwma")); - println!("zvbb: {}", is_riscv_feature_detected!("zvbb")); - println!("zvbc: {}", is_riscv_feature_detected!("zvbc")); - println!("zvkb: {}", is_riscv_feature_detected!("zvkb")); - println!("zvkg: {}", is_riscv_feature_detected!("zvkg")); - println!("zvkned: {}", is_riscv_feature_detected!("zvkned")); - println!("zvknha: {}", is_riscv_feature_detected!("zvknha")); - println!("zvknhb: {}", is_riscv_feature_detected!("zvknhb")); - println!("zvksed: {}", is_riscv_feature_detected!("zvksed")); - println!("zvksh: {}", is_riscv_feature_detected!("zvksh")); - println!("zvkn: {}", is_riscv_feature_detected!("zvkn")); - println!("zvknc: {}", is_riscv_feature_detected!("zvknc")); - println!("zvkng: {}", is_riscv_feature_detected!("zvkng")); - println!("zvks: {}", is_riscv_feature_detected!("zvks")); - println!("zvksc: {}", is_riscv_feature_detected!("zvksc")); - println!("zvksg: {}", is_riscv_feature_detected!("zvksg")); - println!("zvkt: {}", is_riscv_feature_detected!("zvkt")); - println!("j: {}", is_riscv_feature_detected!("j")); - println!("p: {}", is_riscv_feature_detected!("p")); -} - -#[test] -#[cfg(all(target_arch = "powerpc", target_os = "linux"))] -fn powerpc_linux() { - println!("altivec: {}", is_powerpc_feature_detected!("altivec")); - println!("vsx: {}", is_powerpc_feature_detected!("vsx")); - println!("power8: {}", is_powerpc_feature_detected!("power8")); -} - -#[test] -#[cfg(all( - target_arch = "powerpc64", - any(target_os = "linux", target_os = "freebsd"), -))] -fn powerpc64_linux_or_freebsd() { - println!("altivec: {}", is_powerpc64_feature_detected!("altivec")); - println!("vsx: {}", is_powerpc64_feature_detected!("vsx")); - println!("power8: {}", is_powerpc64_feature_detected!("power8")); - println!("power9: {}", is_powerpc64_feature_detected!("power9")); -} - -#[test] -#[cfg(all(target_arch = "s390x", target_os = "linux",))] -fn s390x_linux() { - println!("vector: {}", is_s390x_feature_detected!("vector")); -} diff --git a/library/stdarch/crates/std_detect/tests/macro_trailing_commas.rs b/library/stdarch/crates/std_detect/tests/macro_trailing_commas.rs deleted file mode 100644 index fa3a23c7968..00000000000 --- a/library/stdarch/crates/std_detect/tests/macro_trailing_commas.rs +++ /dev/null @@ -1,107 +0,0 @@ -#![allow(internal_features)] -#![cfg_attr( - any( - target_arch = "arm", - target_arch = "aarch64", - target_arch = "arm64ec", - target_arch = "x86", - target_arch = "x86_64", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", - target_arch = "riscv32", - target_arch = "riscv64", - target_arch = "loongarch64" - ), - feature(stdarch_internal) -)] -#![cfg_attr(target_arch = "arm", feature(stdarch_arm_feature_detection))] -#![cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - feature(stdarch_aarch64_feature_detection) -)] -#![cfg_attr( - any(target_arch = "powerpc", target_arch = "powerpc64"), - feature(stdarch_powerpc_feature_detection) -)] -#![cfg_attr(target_arch = "s390x", feature(stdarch_s390x_feature_detection))] -#![cfg_attr( - any(target_arch = "riscv32", target_arch = "riscv64"), - feature(stdarch_riscv_feature_detection) -)] -#![cfg_attr( - target_arch = "loongarch64", - feature(stdarch_loongarch_feature_detection) -)] - -#[cfg(any( - target_arch = "arm", - target_arch = "aarch64", - target_arch = "arm64ec", - target_arch = "x86", - target_arch = "x86_64", - target_arch = "powerpc", - target_arch = "powerpc64", - target_arch = "s390x", - target_arch = "riscv32", - target_arch = "riscv64", - target_arch = "loongarch64" -))] -#[macro_use] -extern crate std_detect; - -#[test] -#[cfg(target_arch = "arm")] -fn arm() { - let _ = is_arm_feature_detected!("neon"); - let _ = is_arm_feature_detected!("neon",); -} - -#[test] -#[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] -fn aarch64() { - let _ = is_aarch64_feature_detected!("fp"); - let _ = is_aarch64_feature_detected!("fp",); -} - -#[test] -#[cfg(target_arch = "loongarch64")] -fn loongarch64() { - let _ = is_loongarch_feature_detected!("lsx"); - let _ = is_loongarch_feature_detected!("lsx",); -} - -#[test] -#[cfg(target_arch = "powerpc")] -fn powerpc() { - let _ = is_powerpc_feature_detected!("altivec"); - let _ = is_powerpc_feature_detected!("altivec",); -} - -#[test] -#[cfg(target_arch = "powerpc64")] -fn powerpc64() { - let _ = is_powerpc64_feature_detected!("altivec"); - let _ = is_powerpc64_feature_detected!("altivec",); -} - -#[test] -#[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))] -fn riscv() { - let _ = is_riscv_feature_detected!("zk"); - let _ = is_riscv_feature_detected!("zk",); -} - -#[test] -#[cfg(target_arch = "s390x")] -fn s390x() { - let _ = is_s390x_feature_detected!("vector"); - let _ = is_s390x_feature_detected!("vector",); -} - -#[test] -#[cfg(any(target_arch = "x86", target_arch = "x86_64"))] -fn x86() { - let _ = is_x86_feature_detected!("sse"); - let _ = is_x86_feature_detected!("sse",); -} diff --git a/library/stdarch/crates/std_detect/tests/x86-specific.rs b/library/stdarch/crates/std_detect/tests/x86-specific.rs deleted file mode 100644 index d9ec79821ba..00000000000 --- a/library/stdarch/crates/std_detect/tests/x86-specific.rs +++ /dev/null @@ -1,117 +0,0 @@ -#![cfg(any(target_arch = "x86", target_arch = "x86_64"))] -#![allow(internal_features)] -#![feature( - stdarch_internal, - x86_amx_intrinsics, - xop_target_feature, - movrs_target_feature -)] - -#[macro_use] -extern crate std_detect; - -#[test] -fn dump() { - println!("aes: {:?}", is_x86_feature_detected!("aes")); - println!("pclmulqdq: {:?}", is_x86_feature_detected!("pclmulqdq")); - println!("rdrand: {:?}", is_x86_feature_detected!("rdrand")); - println!("rdseed: {:?}", is_x86_feature_detected!("rdseed")); - println!("tsc: {:?}", is_x86_feature_detected!("tsc")); - println!("sse: {:?}", is_x86_feature_detected!("sse")); - println!("sse2: {:?}", is_x86_feature_detected!("sse2")); - println!("sse3: {:?}", is_x86_feature_detected!("sse3")); - println!("ssse3: {:?}", is_x86_feature_detected!("ssse3")); - println!("sse4.1: {:?}", is_x86_feature_detected!("sse4.1")); - println!("sse4.2: {:?}", is_x86_feature_detected!("sse4.2")); - println!("sse4a: {:?}", is_x86_feature_detected!("sse4a")); - println!("sha: {:?}", is_x86_feature_detected!("sha")); - println!("f16c: {:?}", is_x86_feature_detected!("f16c")); - println!("avx: {:?}", is_x86_feature_detected!("avx")); - println!("avx2: {:?}", is_x86_feature_detected!("avx2")); - println!("sha512: {:?}", is_x86_feature_detected!("sha512")); - println!("sm3: {:?}", is_x86_feature_detected!("sm3")); - println!("sm4: {:?}", is_x86_feature_detected!("sm4")); - println!("avx512f: {:?}", is_x86_feature_detected!("avx512f")); - println!("avx512cd: {:?}", is_x86_feature_detected!("avx512cd")); - println!("avx512er: {:?}", is_x86_feature_detected!("avx512er")); - println!("avx512pf: {:?}", is_x86_feature_detected!("avx512pf")); - println!("avx512bw: {:?}", is_x86_feature_detected!("avx512bw")); - println!("avx512dq: {:?}", is_x86_feature_detected!("avx512dq")); - println!("avx512vl: {:?}", is_x86_feature_detected!("avx512vl")); - println!("avx512_ifma: {:?}", is_x86_feature_detected!("avx512ifma")); - println!("avx512vbmi {:?}", is_x86_feature_detected!("avx512vbmi")); - println!( - "avx512_vpopcntdq: {:?}", - is_x86_feature_detected!("avx512vpopcntdq") - ); - println!("avx512vbmi2: {:?}", is_x86_feature_detected!("avx512vbmi2")); - println!("gfni: {:?}", is_x86_feature_detected!("gfni")); - println!("vaes: {:?}", is_x86_feature_detected!("vaes")); - println!("vpclmulqdq: {:?}", is_x86_feature_detected!("vpclmulqdq")); - println!("avx512vnni: {:?}", is_x86_feature_detected!("avx512vnni")); - println!( - "avx512bitalg: {:?}", - is_x86_feature_detected!("avx512bitalg") - ); - println!("avx512bf16: {:?}", is_x86_feature_detected!("avx512bf16")); - println!( - "avx512vp2intersect: {:?}", - is_x86_feature_detected!("avx512vp2intersect") - ); - println!("avx512fp16: {:?}", is_x86_feature_detected!("avx512fp16")); - println!("fma: {:?}", is_x86_feature_detected!("fma")); - println!("abm: {:?}", is_x86_feature_detected!("abm")); - println!("bmi: {:?}", is_x86_feature_detected!("bmi1")); - println!("bmi2: {:?}", is_x86_feature_detected!("bmi2")); - println!("tbm: {:?}", is_x86_feature_detected!("tbm")); - println!("popcnt: {:?}", is_x86_feature_detected!("popcnt")); - println!("lzcnt: {:?}", is_x86_feature_detected!("lzcnt")); - println!("fxsr: {:?}", is_x86_feature_detected!("fxsr")); - println!("xsave: {:?}", is_x86_feature_detected!("xsave")); - println!("xsaveopt: {:?}", is_x86_feature_detected!("xsaveopt")); - println!("xsaves: {:?}", is_x86_feature_detected!("xsaves")); - println!("xsavec: {:?}", is_x86_feature_detected!("xsavec")); - println!("cmpxchg16b: {:?}", is_x86_feature_detected!("cmpxchg16b")); - println!("adx: {:?}", is_x86_feature_detected!("adx")); - println!("rtm: {:?}", is_x86_feature_detected!("rtm")); - println!("movbe: {:?}", is_x86_feature_detected!("movbe")); - println!("avxvnni: {:?}", is_x86_feature_detected!("avxvnni")); - println!("avxvnniint8: {:?}", is_x86_feature_detected!("avxvnniint8")); - println!( - "avxneconvert: {:?}", - is_x86_feature_detected!("avxneconvert") - ); - println!("avxifma: {:?}", is_x86_feature_detected!("avxifma")); - println!( - "avxvnniint16: {:?}", - is_x86_feature_detected!("avxvnniint16") - ); - println!("amx-bf16: {:?}", is_x86_feature_detected!("amx-bf16")); - println!("amx-tile: {:?}", is_x86_feature_detected!("amx-tile")); - println!("amx-int8: {:?}", is_x86_feature_detected!("amx-int8")); - println!("amx-fp16: {:?}", is_x86_feature_detected!("amx-fp16")); - println!("amx-complex: {:?}", is_x86_feature_detected!("amx-complex")); - println!("xop: {:?}", is_x86_feature_detected!("xop")); - println!("kl: {:?}", is_x86_feature_detected!("kl")); - println!("widekl: {:?}", is_x86_feature_detected!("widekl")); - println!("movrs: {:?}", is_x86_feature_detected!("movrs")); - println!("amx-fp8: {:?}", is_x86_feature_detected!("amx-fp8")); - println!( - "amx-transpose: {:?}", - is_x86_feature_detected!("amx-transpose") - ); - println!("amx-tf32: {:?}", is_x86_feature_detected!("amx-tf32")); - println!("amx-avx512: {:?}", is_x86_feature_detected!("amx-avx512")); - println!("amx-movrs: {:?}", is_x86_feature_detected!("amx-movrs")); -} - -#[test] -#[allow(deprecated)] -fn x86_deprecated() { - println!("avx512gfni {:?}", is_x86_feature_detected!("avx512gfni")); - println!("avx512vaes {:?}", is_x86_feature_detected!("avx512vaes")); - println!( - "avx512vpclmulqdq {:?}", - is_x86_feature_detected!("avx512vpclmulqdq") - ); -} diff --git a/library/stdarch/crates/stdarch-gen-arm/Cargo.toml b/library/stdarch/crates/stdarch-gen-arm/Cargo.toml index 899296d25ea..312019f454c 100644 --- a/library/stdarch/crates/stdarch-gen-arm/Cargo.toml +++ b/library/stdarch/crates/stdarch-gen-arm/Cargo.toml @@ -13,7 +13,6 @@ edition = "2024" [dependencies] itertools = "0.14.0" -lazy_static = "1.4.0" proc-macro2 = "1.0" quote = "1.0" regex = "1.5" diff --git a/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml b/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml index f0dce681d9c..a31613e6b1a 100644 --- a/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml +++ b/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml @@ -187,7 +187,7 @@ intrinsics: arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"] return_type: "{neon_type[1]}" attr: [*neon-stable] - assert_instr: [sabdl] + assert_instr: [sabdl2] safety: safe types: - [int8x16_t, int16x8_t, int8x8_t, uint8x8_t] @@ -230,7 +230,7 @@ intrinsics: - stable - - 'feature = "neon_intrinsics"' - 'since = "1.59.0"' - assert_instr: [sabdl] + assert_instr: [sabdl2] safety: safe types: - [int16x8_t, int32x4_t, int16x4_t, uint16x4_t] @@ -273,7 +273,7 @@ intrinsics: - stable - - 'feature = "neon_intrinsics"' - 'since = "1.59.0"' - assert_instr: [sabdl] + assert_instr: [sabdl2] safety: safe types: - [int32x4_t, int64x2_t, int32x2_t, uint32x2_t] @@ -1462,7 +1462,7 @@ intrinsics: arguments: ["a: {neon_type[0]}"] return_type: "{neon_type[1]}" attr: - - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtl]]}]] + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtl2]]}]] - FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']] safety: safe types: @@ -1530,7 +1530,7 @@ intrinsics: arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[2]}" attr: - - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtn]]}]] + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtn2]]}]] - FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']] safety: safe types: @@ -1582,7 +1582,7 @@ intrinsics: arguments: ["a: {type[0]}", "b: {neon_type[1]}"] return_type: "{type[2]}" attr: - - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtxn]]}]] + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtxn2]]}]] - FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']] safety: safe types: @@ -5147,7 +5147,7 @@ intrinsics: attr: - *neon-stable safety: safe - assert_instr: [pmull] + assert_instr: [pmull2] types: - [poly8x16_t, poly8x8_t, '[8, 9, 10, 11, 12, 13, 14, 15]', poly16x8_t] compose: @@ -5169,7 +5169,7 @@ intrinsics: - *neon-aes - *neon-stable safety: safe - assert_instr: [pmull] + assert_instr: [pmull2] types: - [poly64x2_t, "p128"] compose: @@ -5741,7 +5741,7 @@ intrinsics: arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[0]}" attr: [*neon-stable] - assert_instr: [ssubw] + assert_instr: [ssubw2] safety: safe types: - [int16x8_t, int8x16_t, int8x8_t, '[8, 9, 10, 11, 12, 13, 14, 15]'] @@ -5762,7 +5762,7 @@ intrinsics: arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[0]}" attr: [*neon-stable] - assert_instr: [usubw] + assert_instr: [usubw2] safety: safe types: - [uint16x8_t, uint8x16_t, uint8x8_t, '[8, 9, 10, 11, 12, 13, 14, 15]'] @@ -5783,7 +5783,7 @@ intrinsics: arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"] return_type: "{neon_type[1]}" attr: [*neon-stable] - assert_instr: [ssubl] + assert_instr: [ssubl2] safety: safe types: - [int8x16_t, int16x8_t, '[8, 9, 10, 11, 12, 13, 14, 15]', int8x8_t] @@ -5813,7 +5813,7 @@ intrinsics: arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"] return_type: "{neon_type[1]}" attr: [*neon-stable] - assert_instr: [usubl] + assert_instr: [usubl2] safety: safe types: - [uint8x16_t, uint16x8_t, '[8, 9, 10, 11, 12, 13, 14, 15]', uint8x8_t] @@ -6580,7 +6580,6 @@ intrinsics: arch: aarch64,arm64ec - - name: "vmaxnm{neon_type.no}" doc: Floating-point Maximum Number (vector) arguments: ["a: {neon_type}", "b: {neon_type}"] @@ -6592,11 +6591,7 @@ intrinsics: - float64x1_t - float64x2_t compose: - - LLVMLink: - name: "fmaxnm.{neon_type}" - links: - - link: "llvm.aarch64.neon.fmaxnm.{neon_type}" - arch: aarch64,arm64ec + - FnCall: [simd_fmax, [a, b]] - name: "vmaxnmh_{type}" @@ -6611,11 +6606,7 @@ intrinsics: types: - f16 compose: - - LLVMLink: - name: "vmaxh.{neon_type}" - links: - - link: "llvm.aarch64.neon.fmaxnm.{type}" - arch: aarch64,arm64ec + - FnCall: ["f16::max", [a, b]] - name: "vminnmh_{type}" @@ -6630,11 +6621,7 @@ intrinsics: types: - f16 compose: - - LLVMLink: - name: "vminh.{neon_type}" - links: - - link: "llvm.aarch64.neon.fminnm.{type}" - arch: aarch64,arm64ec + - FnCall: ["f16::min", [a, b]] - name: "vmaxnmv{neon_type[0].no}" @@ -6648,11 +6635,7 @@ intrinsics: - [float32x2_t, f32] - [float64x2_t, f64] compose: - - LLVMLink: - name: "fmaxnmv.{neon_type[0]}" - links: - - link: "llvm.aarch64.neon.fmaxnmv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_max, [a]] - name: "vmaxnmv{neon_type[0].no}" doc: Floating-point maximum number across vector @@ -6664,11 +6647,7 @@ intrinsics: types: - [float32x4_t, f32] compose: - - LLVMLink: - name: "fmaxnmv.{neon_type[0]}" - links: - - link: "llvm.aarch64.neon.fmaxnmv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_max, [a]] - name: "vmaxnmv{neon_type[0].no}" @@ -6684,11 +6663,7 @@ intrinsics: - [float16x4_t, f16] - [float16x8_t, f16] compose: - - LLVMLink: - name: "fmaxnmv.{neon_type[0]}" - links: - - link: "llvm.aarch64.neon.fmaxnmv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_max, [a]] - name: "vminnmv{neon_type[0].no}" @@ -6704,11 +6679,7 @@ intrinsics: - [float16x4_t, f16] - [float16x8_t, f16] compose: - - LLVMLink: - name: "fminnmv.{neon_type[0]}" - links: - - link: "llvm.aarch64.neon.fminnmv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_min, [a]] - name: "vmaxv{neon_type[0].no}" @@ -6814,11 +6785,7 @@ intrinsics: - float64x1_t - float64x2_t compose: - - LLVMLink: - name: "fminnm.{neon_type}" - links: - - link: "llvm.aarch64.neon.fminnm.{neon_type}" - arch: aarch64,arm64ec + - FnCall: [simd_fmin, [a, b]] - name: "vminnmv{neon_type[0].no}" doc: "Floating-point minimum number across vector" @@ -6832,11 +6799,7 @@ intrinsics: - [float32x2_t, "f32"] - [float64x2_t, "f64"] compose: - - LLVMLink: - name: "vminnmv.{neon_type[0]}" - links: - - link: "llvm.aarch64.neon.fminnmv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_min, [a]] - name: "vminnmv{neon_type[0].no}" doc: "Floating-point minimum number across vector" @@ -6849,11 +6812,7 @@ intrinsics: types: - [float32x4_t, "f32"] compose: - - LLVMLink: - name: "vminnmv.{neon_type[0]}" - links: - - link: "llvm.aarch64.neon.fminnmv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_min, [a]] - name: "vmovl_high{neon_type[0].noq}" doc: Vector move @@ -9950,7 +9909,7 @@ intrinsics: return_type: "{neon_type[0]}" attr: - FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']] - - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [uabal]]}]] + - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [uabal2]]}]] safety: safe types: - [uint16x8_t, uint8x16_t, uint8x8_t, '[8, 9, 10, 11, 12, 13, 14, 15]', '[8, 9, 10, 11, 12, 13, 14, 15]'] @@ -9977,7 +9936,7 @@ intrinsics: return_type: "{neon_type[0]}" attr: - *neon-stable - - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [sabal]]}]] + - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [sabal2]]}]] safety: safe types: - [int16x8_t, int8x16_t, int8x16_t, '[8, 9, 10, 11, 12, 13, 14, 15]', int8x8_t, uint8x8_t] @@ -11386,7 +11345,7 @@ intrinsics: arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"] return_type: "{neon_type[1]}" attr: - - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [uabdl]]}]] + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [uabdl2]]}]] - FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']] safety: safe types: @@ -13023,6 +12982,26 @@ intrinsics: - link: "llvm.aarch64.crc32cx" arch: aarch64,arm64ec + - name: "vabsd_s64" + doc: "Absolute Value (wrapping)." + arguments: ["a: {type[1]}"] + return_type: "{type[1]}" + attr: + - *neon-stable + assert_instr: [abs] + safety: safe + types: + - [i64, i64] + compose: + # This is behaviorally equivalent to `i64::wrapping_abs`, but keeps the value in a SIMD + # register. That can be beneficial when combined with other instructions. This LLVM + # issue provides some extra context https://github.com/llvm/llvm-project/issues/148388. + - LLVMLink: + name: "vabsd_s64" + links: + - link: "llvm.aarch64.neon.abs.i64" + arch: aarch64,arm64ec + - name: "{type[0]}" doc: "Absolute Value (wrapping)." arguments: ["a: {type[1]}"] @@ -13032,15 +13011,18 @@ intrinsics: assert_instr: [abs] safety: safe types: - - ['vabsd_s64', i64, i64] - ['vabs_s64', int64x1_t, v1i64] - ['vabsq_s64', int64x2_t, v2i64] compose: - - LLVMLink: - name: "{type[0]}" - links: - - link: "llvm.aarch64.neon.abs.{type[2]}" - arch: aarch64,arm64ec + - Let: + - neg + - "{type[1]}" + - FnCall: [simd_neg, [a]] + - Let: + - mask + - "{type[1]}" + - FnCall: [simd_ge, [a, neg]] + - FnCall: [simd_select, [mask, a, neg]] - name: "vuqadd{neon_type[0].no}" doc: "Signed saturating Accumulate of Unsigned value." @@ -13142,11 +13124,7 @@ intrinsics: types: - [int64x2_t, i64] compose: - - FnCall: - - transmute - - - FnCall: - - "vaddvq_u64" - - - FnCall: [transmute, [a]] + - FnCall: [simd_reduce_add_unordered, [a]] - name: "vpaddd_u64" doc: "Add pairwise" @@ -13159,7 +13137,7 @@ intrinsics: types: - [uint64x2_t, u64] compose: - - FnCall: [vaddvq_u64, [a]] + - FnCall: [simd_reduce_add_unordered, [a]] - name: "vaddv{neon_type[0].no}" doc: "Add across vector" @@ -13176,11 +13154,7 @@ intrinsics: - [int16x8_t, i16] - [int32x4_t, i32] compose: - - LLVMLink: - name: "vaddv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.saddv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_add_unordered, [a]] - name: "vaddv{neon_type[0].no}" doc: "Add across vector" @@ -13193,11 +13167,7 @@ intrinsics: types: - [int32x2_t, i32] compose: - - LLVMLink: - name: "vaddv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.saddv.i32.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_add_unordered, [a]] - name: "vaddv{neon_type[0].no}" doc: "Add across vector" @@ -13210,11 +13180,7 @@ intrinsics: types: - [int64x2_t, i64] compose: - - LLVMLink: - name: "vaddv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.saddv.i64.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_add_unordered, [a]] - name: "vaddv{neon_type[0].no}" doc: "Add across vector" @@ -13231,11 +13197,7 @@ intrinsics: - [uint16x8_t, u16] - [uint32x4_t, u32] compose: - - LLVMLink: - name: "vaddv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.uaddv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_add_unordered, [a]] - name: "vaddv{neon_type[0].no}" doc: "Add across vector" @@ -13248,11 +13210,7 @@ intrinsics: types: - [uint32x2_t, u32, i32] compose: - - LLVMLink: - name: "vaddv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.uaddv.{type[2]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_add_unordered, [a]] - name: "vaddv{neon_type[0].no}" doc: "Add across vector" @@ -13265,11 +13223,7 @@ intrinsics: types: - [uint64x2_t, u64, i64] compose: - - LLVMLink: - name: "vaddv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.uaddv.{type[2]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_add_unordered, [a]] - name: "vaddlv{neon_type[0].no}" doc: "Signed Add Long across Vector" @@ -13327,11 +13281,7 @@ intrinsics: - [int16x8_t, i16, 'smaxv'] - [int32x4_t, i32, 'smaxv'] compose: - - LLVMLink: - name: "vmaxv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.smaxv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_max, [a]] - name: "vmaxv{neon_type[0].no}" doc: "Horizontal vector max." @@ -13349,11 +13299,7 @@ intrinsics: - [uint16x8_t, u16, 'umaxv'] - [uint32x4_t, u32, 'umaxv'] compose: - - LLVMLink: - name: "vmaxv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.umaxv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_max, [a]] - name: "vmaxv{neon_type[0].no}" doc: "Horizontal vector max." @@ -13390,11 +13336,7 @@ intrinsics: - [int16x8_t, i16, 'sminv'] - [int32x4_t, i32, 'sminv'] compose: - - LLVMLink: - name: "vminv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.sminv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_min, [a]] - name: "vminv{neon_type[0].no}" doc: "Horizontal vector min." @@ -13412,11 +13354,7 @@ intrinsics: - [uint16x8_t, u16, 'uminv'] - [uint32x4_t, u32, 'uminv'] compose: - - LLVMLink: - name: "vminv{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.uminv.{type[1]}.{neon_type[0]}" - arch: aarch64,arm64ec + - FnCall: [simd_reduce_min, [a]] - name: "vminv{neon_type[0].no}" doc: "Horizontal vector min." diff --git a/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml b/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml index 07959cf380e..c96c6e2a0c0 100644 --- a/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml +++ b/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml @@ -7135,13 +7135,8 @@ intrinsics: - int32x2_t - int32x4_t compose: - - LLVMLink: - name: "smax.{neon_type}" - links: - - link: "llvm.arm.neon.vmaxs.{neon_type}" - arch: arm - - link: "llvm.aarch64.neon.smax.{neon_type}" - arch: aarch64,arm64ec + - Let: [mask, "{neon_type}", {FnCall: [simd_ge, [a, b]]}] + - FnCall: [simd_select, [mask, a, b]] - name: "vmax{neon_type.no}" doc: Maximum (vector) @@ -7162,13 +7157,8 @@ intrinsics: - uint32x2_t - uint32x4_t compose: - - LLVMLink: - name: "smax.{neon_type}" - links: - - link: "llvm.arm.neon.vmaxu.{neon_type}" - arch: arm - - link: "llvm.aarch64.neon.umax.{neon_type}" - arch: aarch64,arm64ec + - Let: [mask, "{neon_type}", {FnCall: [simd_ge, [a, b]]}] + - FnCall: [simd_select, [mask, a, b]] - name: "vmax{neon_type.no}" doc: Maximum (vector) @@ -7233,13 +7223,7 @@ intrinsics: - float32x2_t - float32x4_t compose: - - LLVMLink: - name: "fmaxnm.{neon_type}" - links: - - link: "llvm.arm.neon.vmaxnm.{neon_type}" - arch: arm - - link: "llvm.aarch64.neon.fmaxnm.{neon_type}" - arch: aarch64,arm64ec + - FnCall: [simd_fmax, [a, b]] - name: "vmaxnm{neon_type.no}" @@ -7257,13 +7241,7 @@ intrinsics: - float16x4_t - float16x8_t compose: - - LLVMLink: - name: "fmaxnm.{neon_type}" - links: - - link: "llvm.arm.neon.vmaxnm.{neon_type}" - arch: arm - - link: "llvm.aarch64.neon.fmaxnm.{neon_type}" - arch: aarch64,arm64ec + - FnCall: [simd_fmax, [a, b]] - name: "vminnm{neon_type.no}" @@ -7281,13 +7259,7 @@ intrinsics: - float16x4_t - float16x8_t compose: - - LLVMLink: - name: "fminnm.{neon_type}" - links: - - link: "llvm.arm.neon.vminnm.{neon_type}" - arch: arm - - link: "llvm.aarch64.neon.fminnm.{neon_type}" - arch: aarch64,arm64ec + - FnCall: [simd_fmin, [a, b]] - name: "vmin{neon_type.no}" @@ -7309,13 +7281,8 @@ intrinsics: - int32x2_t - int32x4_t compose: - - LLVMLink: - name: "smin.{neon_type}" - links: - - link: "llvm.arm.neon.vmins.{neon_type}" - arch: arm - - link: "llvm.aarch64.neon.smin.{neon_type}" - arch: aarch64,arm64ec + - Let: [mask, "{neon_type}", {FnCall: [simd_le, [a, b]]}] + - FnCall: [simd_select, [mask, a, b]] - name: "vmin{neon_type.no}" doc: "Minimum (vector)" @@ -7336,13 +7303,8 @@ intrinsics: - uint32x2_t - uint32x4_t compose: - - LLVMLink: - name: "umin.{neon_type}" - links: - - link: "llvm.arm.neon.vminu.{neon_type}" - arch: arm - - link: "llvm.aarch64.neon.umin.{neon_type}" - arch: aarch64,arm64ec + - Let: [mask, "{neon_type}", {FnCall: [simd_le, [a, b]]}] + - FnCall: [simd_select, [mask, a, b]] - name: "vmin{neon_type.no}" doc: "Minimum (vector)" @@ -7408,13 +7370,7 @@ intrinsics: - float32x2_t - float32x4_t compose: - - LLVMLink: - name: "fminnm.{neon_type}" - links: - - link: "llvm.arm.neon.vminnm.{neon_type}" - arch: arm - - link: "llvm.aarch64.neon.fminnm.{neon_type}" - arch: aarch64,arm64ec + - FnCall: [simd_fmin, [a, b]] - name: "vpadd{neon_type.no}" doc: Floating-point add pairwise @@ -7874,9 +7830,9 @@ intrinsics: static_defs: ['const N: i32'] safety: safe types: - - [int16x8_t, int8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]) }'] - - [int32x4_t, int16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }'] - - [int64x2_t, int32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64, -N as i64]) }'] + - [int16x8_t, int8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16; 8]) }'] + - [int32x4_t, int16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N; 4]) }'] + - [int64x2_t, int32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64; 2]) }'] compose: - FnCall: [static_assert!, ["{type[2]}"]] - LLVMLink: @@ -7929,9 +7885,9 @@ intrinsics: static_defs: ['const N: i32'] safety: safe types: - - [int16x8_t, uint8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]) }'] - - [int32x4_t, uint16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }'] - - [int64x2_t, uint32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64, -N as i64]) }'] + - [int16x8_t, uint8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16; 8]) }'] + - [int32x4_t, uint16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N; 4]) }'] + - [int64x2_t, uint32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64; 2]) }'] compose: - FnCall: [static_assert!, ["{type[2]}"]] - LLVMLink: @@ -8105,9 +8061,9 @@ intrinsics: static_defs: ['const N: i32'] safety: safe types: - - [int16x8_t, int8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]) }'] - - [int32x4_t, int16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }'] - - [int64x2_t, int32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64, -N as i64]) }'] + - [int16x8_t, int8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16; 8]) }'] + - [int32x4_t, int16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N; 4]) }'] + - [int64x2_t, int32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64; 2]) }'] compose: - FnCall: [static_assert!, ["{type[2]}"]] - LLVMLink: @@ -8215,9 +8171,9 @@ intrinsics: static_defs: ['const N: i32'] safety: safe types: - - [int16x8_t, uint8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]) }'] - - [int32x4_t, uint16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }'] - - [int64x2_t, uint32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64, -N as i64]) }'] + - [int16x8_t, uint8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16; 8]) }'] + - [int32x4_t, uint16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N; 4]) }'] + - [int64x2_t, uint32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64; 2]) }'] compose: - FnCall: [static_assert!, ["{type[2]}"]] - LLVMLink: @@ -8939,9 +8895,9 @@ intrinsics: static_defs: ['const N: i32'] safety: safe types: - - [int16x8_t, int8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]) }'] - - [int32x4_t, int16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]) }'] - - [int64x2_t, int32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64, -N as i64]) }'] + - [int16x8_t, int8x8_t, 'N >= 1 && N <= 8', 'const { int16x8_t([-N as i16; 8]) }'] + - [int32x4_t, int16x4_t, 'N >= 1 && N <= 16', 'const { int32x4_t([-N; 4]) }'] + - [int64x2_t, int32x2_t, 'N >= 1 && N <= 32', 'const { int64x2_t([-N as i64; 2]) }'] compose: - FnCall: [static_assert!, ["{type[2]}"]] - LLVMLink: @@ -9576,7 +9532,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vtrn]]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn2]]}]] - *neon-not-arm-stable - *neon-cfg-arm-unstable safety: safe @@ -9617,7 +9574,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vtrn]]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn2]]}]] - *neon-fp16 - *neon-unstable-f16 safety: safe @@ -9645,7 +9603,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vtrn]]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip2]]}]] - *neon-not-arm-stable - *neon-cfg-arm-unstable safety: safe @@ -9673,7 +9632,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vorr]]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip2]]}]] - *neon-not-arm-stable - *neon-cfg-arm-unstable safety: safe @@ -9707,7 +9667,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vtrn]]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip2]]}]] - *neon-not-arm-stable - *neon-cfg-arm-unstable safety: safe @@ -9735,7 +9696,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vzip]]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip2]]}]] - *neon-not-arm-stable - *neon-cfg-arm-unstable safety: safe @@ -9767,7 +9729,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vzip.16"']]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip2]]}]] - *neon-fp16 - *neon-unstable-f16 safety: safe @@ -9794,7 +9757,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vuzp]]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp2]]}]] - *neon-not-arm-stable - *neon-cfg-arm-unstable safety: safe @@ -9835,7 +9799,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vuzp]]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp2]]}]] - *neon-fp16 - *neon-unstable-f16 safety: safe @@ -9863,7 +9828,8 @@ intrinsics: attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vtrn]]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip1]]}]] + - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip2]]}]] - *neon-not-arm-stable - *neon-cfg-arm-unstable safety: safe @@ -12881,13 +12847,16 @@ intrinsics: - int16x8_t - int32x4_t compose: - - LLVMLink: - name: "vabs{neon_type.no}" - links: - - link: "llvm.aarch64.neon.abs.{neon_type}" - arch: aarch64,arm64ec - - link: "llvm.arm.neon.vabs.{neon_type}" - arch: arm + - Let: + - neg + - "{neon_type}" + - FnCall: [simd_neg, [a]] + - Let: + - mask + - "{neon_type}" + - FnCall: [simd_ge, [a, neg]] + - FnCall: [simd_select, [mask, a, neg]] + - name: "vpmin{neon_type.no}" doc: "Folding minimum of adjacent pairs" @@ -13862,8 +13831,8 @@ intrinsics: - [int8x16_t, '8', '1 <= N && N <= 8', 'v16i8', 'int8x16_t::splat', '-N as i8'] - [int16x4_t, '16', '1 <= N && N <= 16', 'v4i16', 'int16x4_t::splat', '-N as i16'] - [int16x8_t, '16', '1 <= N && N <= 16', 'v8i16', 'int16x8_t::splat', '-N as i16'] - - [int32x2_t, '32', '1 <= N && N <= 32', 'v2i32', 'int32x2_t::splat', '-N as i32'] - - [int32x4_t, '32', '1 <= N && N <= 32', 'v4i32', 'int32x4_t::splat', '-N as i32'] + - [int32x2_t, '32', '1 <= N && N <= 32', 'v2i32', 'int32x2_t::splat', '-N'] + - [int32x4_t, '32', '1 <= N && N <= 32', 'v4i32', 'int32x4_t::splat', '-N'] - [int64x1_t, '64', '1 <= N && N <= 64', 'v1i64', 'int64x1_t::splat', '-N as i64'] - [int64x2_t, '64', '1 <= N && N <= 64', 'v2i64', 'int64x2_t::splat', '-N as i64'] compose: @@ -13891,8 +13860,8 @@ intrinsics: - [uint8x16_t, "neon,v7", '8', 'static_assert_uimm_bits!', 'N, 3', 'v16i8', 'int8x16_t::splat', 'N as i8'] - [uint16x4_t, "neon,v7", '16', 'static_assert_uimm_bits!', 'N, 4', 'v4i16', 'int16x4_t::splat', 'N as i16'] - [uint16x8_t, "neon,v7", '16', 'static_assert_uimm_bits!', 'N, 4', 'v8i16', 'int16x8_t::splat', 'N as i16'] - - [uint32x2_t, "neon,v7", '32', 'static_assert!', 'N >= 0 && N <= 31', 'v2i32', 'int32x2_t::splat', 'N as i32'] - - [uint32x4_t, "neon,v7", '32', 'static_assert!', 'N >= 0 && N <= 31', 'v4i32', 'int32x4_t::splat', 'N as i32'] + - [uint32x2_t, "neon,v7", '32', 'static_assert!', 'N >= 0 && N <= 31', 'v2i32', 'int32x2_t::splat', 'N'] + - [uint32x4_t, "neon,v7", '32', 'static_assert!', 'N >= 0 && N <= 31', 'v4i32', 'int32x4_t::splat', 'N'] - [uint64x1_t, "neon,v7", '64', 'static_assert!', 'N >= 0 && N <= 63', 'v1i64', 'int64x1_t::splat', 'N as i64'] - [uint64x2_t, "neon,v7", '64', 'static_assert!', 'N >= 0 && N <= 63', 'v2i64', 'int64x2_t::splat', 'N as i64'] - [poly8x8_t, "neon,v7", '8', 'static_assert_uimm_bits!', 'N, 3', 'v8i8', 'int8x8_t::splat', 'N as i8'] @@ -14138,6 +14107,7 @@ intrinsics: doc: "Load one single-element structure and Replicate to all lanes (of one register)." arguments: ["ptr: {type[1]}"] return_type: "{neon_type[2]}" + big_endian_inverse: false attr: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, { FnCall: [assert_instr, ['"{type[3]}"']] } ]] @@ -14147,40 +14117,36 @@ intrinsics: safety: unsafe: [neon] types: - - ['vld1_dup_s8', '*const i8', 'int8x8_t', 'vld1.8', 'ld1r', 'vld1_lane_s8::<0>', 'i8x8::splat(0)', '[0, 0, 0, 0, 0, 0, 0, 0]'] - - ['vld1_dup_u8', '*const u8', 'uint8x8_t', 'vld1.8', 'ld1r', 'vld1_lane_u8::<0>', 'u8x8::splat(0)', '[0, 0, 0, 0, 0, 0, 0, 0]'] - - ['vld1_dup_p8', '*const p8', 'poly8x8_t', 'vld1.8', 'ld1r', 'vld1_lane_p8::<0>', 'u8x8::splat(0)', '[0, 0, 0, 0, 0, 0, 0, 0]'] + - ['vld1_dup_s8', '*const i8', 'int8x8_t', 'vld1.8', 'ld1r', 'i8x8::splat'] + - ['vld1_dup_u8', '*const u8', 'uint8x8_t', 'vld1.8', 'ld1r', 'u8x8::splat'] + - ['vld1_dup_p8', '*const p8', 'poly8x8_t', 'vld1.8', 'ld1r', 'u8x8::splat'] - - ['vld1q_dup_s8', '*const i8', 'int8x16_t', 'vld1.8', 'ld1r', 'vld1q_lane_s8::<0>', 'i8x16::splat(0)', '[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]'] - - ['vld1q_dup_u8', '*const u8', 'uint8x16_t', 'vld1.8', 'ld1r', 'vld1q_lane_u8::<0>', 'u8x16::splat(0)', '[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]'] - - ['vld1q_dup_p8', '*const p8', 'poly8x16_t', 'vld1.8', 'ld1r', 'vld1q_lane_p8::<0>', 'u8x16::splat(0)', '[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]'] + - ['vld1q_dup_s8', '*const i8', 'int8x16_t', 'vld1.8', 'ld1r', 'i8x16::splat'] + - ['vld1q_dup_u8', '*const u8', 'uint8x16_t', 'vld1.8', 'ld1r', 'u8x16::splat'] + - ['vld1q_dup_p8', '*const p8', 'poly8x16_t', 'vld1.8', 'ld1r', 'u8x16::splat'] - - ['vld1_dup_s16', '*const i16', 'int16x4_t', 'vld1.16', 'ld1r', 'vld1_lane_s16::<0>', 'i16x4::splat(0)', '[0, 0, 0, 0]'] - - ['vld1_dup_u16', '*const u16', 'uint16x4_t', 'vld1.16', 'ld1r', 'vld1_lane_u16::<0>', 'u16x4::splat(0)', '[0, 0, 0, 0]'] - - ['vld1_dup_p16', '*const p16', 'poly16x4_t', 'vld1.16', 'ld1r', 'vld1_lane_p16::<0>', 'u16x4::splat(0)', '[0, 0, 0, 0]'] + - ['vld1_dup_s16', '*const i16', 'int16x4_t', 'vld1.16', 'ld1r', 'i16x4::splat'] + - ['vld1_dup_u16', '*const u16', 'uint16x4_t', 'vld1.16', 'ld1r', 'u16x4::splat'] + - ['vld1_dup_p16', '*const p16', 'poly16x4_t', 'vld1.16', 'ld1r', 'u16x4::splat'] - - ['vld1q_dup_s16', '*const i16', 'int16x8_t', 'vld1.16', 'ld1r', 'vld1q_lane_s16::<0>', 'i16x8::splat(0)', '[0, 0, 0, 0, 0, 0, 0, 0]'] - - ['vld1q_dup_u16', '*const u16', 'uint16x8_t', 'vld1.16', 'ld1r', 'vld1q_lane_u16::<0>', 'u16x8::splat(0)', '[0, 0, 0, 0, 0, 0, 0, 0]'] - - ['vld1q_dup_p16', '*const p16', 'poly16x8_t', 'vld1.16', 'ld1r', 'vld1q_lane_p16::<0>', 'u16x8::splat(0)', '[0, 0, 0, 0, 0, 0, 0, 0]'] + - ['vld1q_dup_s16', '*const i16', 'int16x8_t', 'vld1.16', 'ld1r', 'i16x8::splat'] + - ['vld1q_dup_u16', '*const u16', 'uint16x8_t', 'vld1.16', 'ld1r', 'u16x8::splat'] + - ['vld1q_dup_p16', '*const p16', 'poly16x8_t', 'vld1.16', 'ld1r', 'u16x8::splat'] - - ['vld1_dup_s32', '*const i32', 'int32x2_t', 'vld1.32', 'ld1r', 'vld1_lane_s32::<0>', 'i32x2::splat(0)', '[0, 0]'] - - ['vld1_dup_u32', '*const u32', 'uint32x2_t', 'vld1.32', 'ld1r', 'vld1_lane_u32::<0>', 'u32x2::splat(0)', '[0, 0]'] - - ['vld1_dup_f32', '*const f32', 'float32x2_t', 'vld1.32', 'ld1r', 'vld1_lane_f32::<0>', 'f32x2::splat(0.0)', '[0, 0]'] + - ['vld1_dup_s32', '*const i32', 'int32x2_t', 'vld1.32', 'ld1r', 'i32x2::splat'] + - ['vld1_dup_u32', '*const u32', 'uint32x2_t', 'vld1.32', 'ld1r', 'u32x2::splat'] + - ['vld1_dup_f32', '*const f32', 'float32x2_t', 'vld1.32', 'ld1r', 'f32x2::splat'] - - ['vld1q_dup_s32', '*const i32', 'int32x4_t', 'vld1.32', 'ld1r', 'vld1q_lane_s32::<0>', 'i32x4::splat(0)', '[0, 0, 0, 0]'] - - ['vld1q_dup_u32', '*const u32', 'uint32x4_t', 'vld1.32', 'ld1r', 'vld1q_lane_u32::<0>', 'u32x4::splat(0)', '[0, 0, 0, 0]'] - - ['vld1q_dup_f32', '*const f32', 'float32x4_t', 'vld1.32', 'ld1r', 'vld1q_lane_f32::<0>', 'f32x4::splat(0.0)', '[0, 0, 0, 0]'] + - ['vld1q_dup_s32', '*const i32', 'int32x4_t', 'vld1.32', 'ld1r', 'i32x4::splat'] + - ['vld1q_dup_u32', '*const u32', 'uint32x4_t', 'vld1.32', 'ld1r', 'u32x4::splat'] + - ['vld1q_dup_f32', '*const f32', 'float32x4_t', 'vld1.32', 'ld1r', 'f32x4::splat'] - - ['vld1q_dup_s64', '*const i64', 'int64x2_t', 'vldr', 'ld1', 'vld1q_lane_s64::<0>', 'i64x2::splat(0)', '[0, 0]'] - - ['vld1q_dup_u64', '*const u64', 'uint64x2_t', 'vldr', 'ld1', 'vld1q_lane_u64::<0>', 'u64x2::splat(0)', '[0, 0]'] + - ['vld1q_dup_s64', '*const i64', 'int64x2_t', 'vldr', 'ld1r', 'i64x2::splat'] + - ['vld1q_dup_u64', '*const u64', 'uint64x2_t', 'vldr', 'ld1r', 'u64x2::splat'] compose: - - Let: - - x - - FnCall: - - '{type[5]}' - - - ptr - - FnCall: [transmute, ['{type[6]}']] - - FnCall: ['simd_shuffle!', [x, x, '{type[7]}']] + - FnCall: + - transmute + - - FnCall: ['{type[5]}', ["*ptr"]] - name: "{type[0]}" doc: "Absolute difference and accumulate (64-bit)" diff --git a/library/stdarch/crates/stdarch-gen-arm/src/expression.rs b/library/stdarch/crates/stdarch-gen-arm/src/expression.rs index 56c94602fff..d5644ef27d4 100644 --- a/library/stdarch/crates/stdarch-gen-arm/src/expression.rs +++ b/library/stdarch/crates/stdarch-gen-arm/src/expression.rs @@ -1,5 +1,4 @@ use itertools::Itertools; -use lazy_static::lazy_static; use proc_macro2::{Literal, Punct, Spacing, TokenStream}; use quote::{ToTokens, TokenStreamExt, format_ident, quote}; use regex::Regex; @@ -7,6 +6,7 @@ use serde::de::{self, MapAccess, Visitor}; use serde::{Deserialize, Deserializer, Serialize}; use std::fmt; use std::str::FromStr; +use std::sync::LazyLock; use crate::intrinsic::Intrinsic; use crate::wildstring::WildStringPart; @@ -374,10 +374,8 @@ impl FromStr for Expression { type Err = String; fn from_str(s: &str) -> Result<Self, Self::Err> { - lazy_static! { - static ref MACRO_RE: Regex = - Regex::new(r"^(?P<name>[\w\d_]+)!\((?P<ex>.*?)\);?$").unwrap(); - } + static MACRO_RE: LazyLock<Regex> = + LazyLock::new(|| Regex::new(r"^(?P<name>[\w\d_]+)!\((?P<ex>.*?)\);?$").unwrap()); if s == "SvUndef" { Ok(Expression::SvUndef) diff --git a/library/stdarch/crates/stdarch-gen-arm/src/load_store_tests.rs b/library/stdarch/crates/stdarch-gen-arm/src/load_store_tests.rs index 5cf39b2e11a..3f3bfed132c 100644 --- a/library/stdarch/crates/stdarch-gen-arm/src/load_store_tests.rs +++ b/library/stdarch/crates/stdarch-gen-arm/src/load_store_tests.rs @@ -2,6 +2,7 @@ use std::fs::File; use std::io::Write; use std::path::PathBuf; use std::str::FromStr; +use std::sync::LazyLock; use crate::format_code; use crate::input::InputType; @@ -10,7 +11,6 @@ use crate::typekinds::BaseType; use crate::typekinds::{ToRepr, TypeKind}; use itertools::Itertools; -use lazy_static::lazy_static; use proc_macro2::TokenStream; use quote::{format_ident, quote}; @@ -639,8 +639,8 @@ impl LdIntrCharacteristics { } } -lazy_static! { - static ref PREAMBLE: String = format!( +static PREAMBLE: LazyLock<String> = LazyLock::new(|| { + format!( r#"#![allow(unused)] use super::*; @@ -801,13 +801,11 @@ fn assert_vector_matches_u64(vector: svuint64_t, expected: svuint64_t) {{ assert!(!svptest_any(defined, cmp)) }} "# - ); -} + ) +}); -lazy_static! { - static ref MANUAL_TESTS: String = format!( - "#[simd_test(enable = \"sve\")] -unsafe fn test_ffr() {{ +const MANUAL_TESTS: &str = "#[simd_test(enable = \"sve\")] +unsafe fn test_ffr() { svsetffr(); let ffr = svrdffr(); assert_vector_matches_u8(svdup_n_u8_z(ffr, 1), svindex_u8(1, 0)); @@ -816,7 +814,5 @@ unsafe fn test_ffr() {{ svwrffr(pred); let ffr = svrdffr_z(svptrue_b8()); assert_vector_matches_u8(svdup_n_u8_z(ffr, 1), svdup_n_u8_z(pred, 1)); -}} -" - ); } +"; diff --git a/library/stdarch/crates/stdarch-gen-arm/src/typekinds.rs b/library/stdarch/crates/stdarch-gen-arm/src/typekinds.rs index 7c697cb7c0c..bd47ff2bd15 100644 --- a/library/stdarch/crates/stdarch-gen-arm/src/typekinds.rs +++ b/library/stdarch/crates/stdarch-gen-arm/src/typekinds.rs @@ -1,10 +1,10 @@ -use lazy_static::lazy_static; use proc_macro2::TokenStream; use quote::{ToTokens, TokenStreamExt, quote}; use regex::Regex; use serde_with::{DeserializeFromStr, SerializeDisplay}; use std::fmt; use std::str::FromStr; +use std::sync::LazyLock; use crate::context; use crate::expression::{Expression, FnCall}; @@ -496,9 +496,9 @@ impl FromStr for VectorType { type Err = String; fn from_str(s: &str) -> Result<Self, Self::Err> { - lazy_static! { - static ref RE: Regex = Regex::new(r"^(?:(?:sv(?P<sv_ty>(?:uint|int|bool|float)(?:\d+)?))|(?:(?P<ty>(?:uint|int|bool|poly|float)(?:\d+)?)x(?P<lanes>(?:\d+)?)))(?:x(?P<tuple_size>2|3|4))?_t$").unwrap(); - } + static RE: LazyLock<Regex> = LazyLock::new(|| { + Regex::new(r"^(?:(?:sv(?P<sv_ty>(?:uint|int|bool|float)(?:\d+)?))|(?:(?P<ty>(?:uint|int|bool|poly|float)(?:\d+)?)x(?P<lanes>(?:\d+)?)))(?:x(?P<tuple_size>2|3|4))?_t$").unwrap() + }); if let Some(c) = RE.captures(s) { let (base_type, lanes) = Self::sanitise_lanes( @@ -698,9 +698,8 @@ impl FromStr for BaseType { type Err = String; fn from_str(s: &str) -> Result<Self, Self::Err> { - lazy_static! { - static ref RE: Regex = Regex::new(r"^(?P<kind>[a-zA-Z]+)(?P<size>\d+)?(_t)?$").unwrap(); - } + static RE: LazyLock<Regex> = + LazyLock::new(|| Regex::new(r"^(?P<kind>[a-zA-Z]+)(?P<size>\d+)?(_t)?$").unwrap()); if let Some(c) = RE.captures(s) { let kind = c["kind"].parse()?; diff --git a/library/stdarch/crates/stdarch-gen-arm/src/wildcards.rs b/library/stdarch/crates/stdarch-gen-arm/src/wildcards.rs index 25aa8034892..6c40d88df45 100644 --- a/library/stdarch/crates/stdarch-gen-arm/src/wildcards.rs +++ b/library/stdarch/crates/stdarch-gen-arm/src/wildcards.rs @@ -1,8 +1,7 @@ -use lazy_static::lazy_static; use regex::Regex; use serde_with::{DeserializeFromStr, SerializeDisplay}; -use std::fmt; use std::str::FromStr; +use std::{fmt, sync::LazyLock}; use crate::{ fn_suffix::SuffixKind, @@ -66,9 +65,9 @@ impl FromStr for Wildcard { type Err = String; fn from_str(s: &str) -> Result<Self, Self::Err> { - lazy_static! { - static ref RE: Regex = Regex::new(r"^(?P<wildcard>\w+?)(?:_x(?P<tuple_size>[2-4]))?(?:\[(?P<index>\d+)\])?(?:\.(?P<modifiers>\w+))?(?:\s+as\s+(?P<scale_to>.*?))?$").unwrap(); - } + static RE: LazyLock<Regex> = LazyLock::new(|| { + Regex::new(r"^(?P<wildcard>\w+?)(?:_x(?P<tuple_size>[2-4]))?(?:\[(?P<index>\d+)\])?(?:\.(?P<modifiers>\w+))?(?:\s+as\s+(?P<scale_to>.*?))?$").unwrap() + }); if let Some(c) = RE.captures(s) { let wildcard_name = &c["wildcard"]; diff --git a/library/stdarch/crates/stdarch-gen-loongarch/README.md b/library/stdarch/crates/stdarch-gen-loongarch/README.md index 1fc81483a12..2b3f00f34af 100644 --- a/library/stdarch/crates/stdarch-gen-loongarch/README.md +++ b/library/stdarch/crates/stdarch-gen-loongarch/README.md @@ -11,7 +11,6 @@ LSX: # Generate bindings OUT_DIR=`pwd`/crates/stdarch-gen-loongarch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lsxintrin.h OUT_DIR=`pwd`/crates/core_arch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lsx.spec -rustfmt crates/core_arch/src/loongarch64/lsx/generated.rs # Generate tests OUT_DIR=`pwd`/crates/stdarch-gen-loongarch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lsx.spec test @@ -25,7 +24,6 @@ LASX: # Generate bindings OUT_DIR=`pwd`/crates/stdarch-gen-loongarch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lasxintrin.h OUT_DIR=`pwd`/crates/core_arch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lasx.spec -rustfmt crates/core_arch/src/loongarch64/lasx/generated.rs # Generate tests OUT_DIR=`pwd`/crates/stdarch-gen-loongarch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lasx.spec test diff --git a/library/stdarch/crates/stdarch-gen-loongarch/src/main.rs b/library/stdarch/crates/stdarch-gen-loongarch/src/main.rs index aa9990b6ccd..40132097f5d 100644 --- a/library/stdarch/crates/stdarch-gen-loongarch/src/main.rs +++ b/library/stdarch/crates/stdarch-gen-loongarch/src/main.rs @@ -274,13 +274,14 @@ fn gen_bind_body( } }; + let is_mem = in_t.iter().any(|s| s.contains("POINTER")); let is_store = current_name.to_string().contains("vst"); let link_function = { let fn_decl = { let fn_output = if out_t.to_lowercase() == "void" { String::new() } else { - format!("-> {}", type_to_rst(out_t, is_store)) + format!(" -> {}", type_to_rst(out_t, is_store)) }; let fn_inputs = match para_num { 1 => format!("(a: {})", type_to_rst(in_t[0], is_store)), @@ -304,7 +305,7 @@ fn gen_bind_body( ), _ => panic!("unsupported parameter number"), }; - format!("fn __{current_name}{fn_inputs} {fn_output};") + format!("fn __{current_name}{fn_inputs}{fn_output};") }; let function = format!( r#" #[link_name = "llvm.loongarch.{}"] @@ -456,31 +457,40 @@ fn gen_bind_body( }; rustc_legacy_const_generics = "rustc_legacy_const_generics(2, 3)"; } - format!("pub unsafe fn {current_name}{fn_inputs} {fn_output}") + format!( + "pub {}fn {current_name}{fn_inputs} {fn_output}", + if is_mem { "unsafe " } else { "" } + ) }; + let unsafe_start = if !is_mem { "unsafe { " } else { "" }; + let unsafe_end = if !is_mem { " }" } else { "" }; let mut call_params = { match para_num { - 1 => format!("__{current_name}(a)"), - 2 => format!("__{current_name}(a, b)"), - 3 => format!("__{current_name}(a, b, c)"), - 4 => format!("__{current_name}(a, b, c, d)"), + 1 => format!("{unsafe_start}__{current_name}(a){unsafe_end}"), + 2 => format!("{unsafe_start}__{current_name}(a, b){unsafe_end}"), + 3 => format!("{unsafe_start}__{current_name}(a, b, c){unsafe_end}"), + 4 => format!("{unsafe_start}__{current_name}(a, b, c, d){unsafe_end}"), _ => panic!("unsupported parameter number"), } }; if para_num == 1 && in_t[0] == "HI" { call_params = match asm_fmts[1].as_str() { "si10" => { - format!("static_assert_simm_bits!(IMM_S10, 10);\n __{current_name}(IMM_S10)") + format!( + "static_assert_simm_bits!(IMM_S10, 10);\n {unsafe_start}__{current_name}(IMM_S10){unsafe_end}" + ) } "i13" => { - format!("static_assert_simm_bits!(IMM_S13, 13);\n __{current_name}(IMM_S13)") + format!( + "static_assert_simm_bits!(IMM_S13, 13);\n {unsafe_start}__{current_name}(IMM_S13){unsafe_end}" + ) } _ => panic!("unsupported assembly format: {}", asm_fmts[2]), } } else if para_num == 2 && (in_t[1] == "UQI" || in_t[1] == "USI") { call_params = if asm_fmts[2].starts_with("ui") { format!( - "static_assert_uimm_bits!(IMM{0}, {0});\n __{current_name}(a, IMM{0})", + "static_assert_uimm_bits!(IMM{0}, {0});\n {unsafe_start}__{current_name}(a, IMM{0}){unsafe_end}", asm_fmts[2].get(2..).unwrap() ) } else { @@ -489,14 +499,16 @@ fn gen_bind_body( } else if para_num == 2 && in_t[1] == "QI" { call_params = match asm_fmts[2].as_str() { "si5" => { - format!("static_assert_simm_bits!(IMM_S5, 5);\n __{current_name}(a, IMM_S5)") + format!( + "static_assert_simm_bits!(IMM_S5, 5);\n {unsafe_start}__{current_name}(a, IMM_S5){unsafe_end}" + ) } _ => panic!("unsupported assembly format: {}", asm_fmts[2]), }; } else if para_num == 2 && in_t[0] == "CVPOINTER" && in_t[1] == "SI" { call_params = if asm_fmts[2].starts_with("si") { format!( - "static_assert_simm_bits!(IMM_S{0}, {0});\n __{current_name}(mem_addr, IMM_S{0})", + "static_assert_simm_bits!(IMM_S{0}, {0});\n {unsafe_start}__{current_name}(mem_addr, IMM_S{0}){unsafe_end}", asm_fmts[2].get(2..).unwrap() ) } else { @@ -504,13 +516,13 @@ fn gen_bind_body( } } else if para_num == 2 && in_t[0] == "CVPOINTER" && in_t[1] == "DI" { call_params = match asm_fmts[2].as_str() { - "rk" => format!("__{current_name}(mem_addr, b)"), + "rk" => format!("{unsafe_start}__{current_name}(mem_addr, b){unsafe_end}"), _ => panic!("unsupported assembly format: {}", asm_fmts[2]), }; } else if para_num == 3 && (in_t[2] == "USI" || in_t[2] == "UQI") { call_params = if asm_fmts[2].starts_with("ui") { format!( - "static_assert_uimm_bits!(IMM{0}, {0});\n __{current_name}(a, b, IMM{0})", + "static_assert_uimm_bits!(IMM{0}, {0});\n {unsafe_start}__{current_name}(a, b, IMM{0}){unsafe_end}", asm_fmts[2].get(2..).unwrap() ) } else { @@ -519,19 +531,19 @@ fn gen_bind_body( } else if para_num == 3 && in_t[1] == "CVPOINTER" && in_t[2] == "SI" { call_params = match asm_fmts[2].as_str() { "si12" => format!( - "static_assert_simm_bits!(IMM_S12, 12);\n __{current_name}(a, mem_addr, IMM_S12)" + "static_assert_simm_bits!(IMM_S12, 12);\n {unsafe_start}__{current_name}(a, mem_addr, IMM_S12){unsafe_end}" ), _ => panic!("unsupported assembly format: {}", asm_fmts[2]), }; } else if para_num == 3 && in_t[1] == "CVPOINTER" && in_t[2] == "DI" { call_params = match asm_fmts[2].as_str() { - "rk" => format!("__{current_name}(a, mem_addr, b)"), + "rk" => format!("{unsafe_start}__{current_name}(a, mem_addr, b){unsafe_end}"), _ => panic!("unsupported assembly format: {}", asm_fmts[2]), }; } else if para_num == 4 { call_params = match (asm_fmts[2].as_str(), current_name.chars().last().unwrap()) { ("si8", t) => format!( - "static_assert_simm_bits!(IMM_S8, 8);\n static_assert_uimm_bits!(IMM{0}, {0});\n __{current_name}(a, mem_addr, IMM_S8, IMM{0})", + "static_assert_simm_bits!(IMM_S8, 8);\n static_assert_uimm_bits!(IMM{0}, {0});\n {unsafe_start}__{current_name}(a, mem_addr, IMM_S8, IMM{0}){unsafe_end}", type_to_imm(t) ), (_, _) => panic!( diff --git a/library/stdarch/crates/stdarch-test/Cargo.toml b/library/stdarch/crates/stdarch-test/Cargo.toml index e4791e4ec52..e88258bfd30 100644 --- a/library/stdarch/crates/stdarch-test/Cargo.toml +++ b/library/stdarch/crates/stdarch-test/Cargo.toml @@ -7,7 +7,6 @@ edition = "2024" [dependencies] assert-instr-macro = { path = "../assert-instr-macro" } simd-test-macro = { path = "../simd-test-macro" } -lazy_static = "1.0" rustc-demangle = "0.1.8" cfg-if = "1.0" @@ -20,7 +19,7 @@ cc = "1.0" # time, and we want to make updates to this explicit rather than automatically # picking up updates which might break CI with new instruction names. [target.'cfg(target_arch = "wasm32")'.dependencies] -wasmprinter = "=0.2.67" +wasmprinter = "=0.235" [features] default = [] diff --git a/library/stdarch/crates/stdarch-test/src/lib.rs b/library/stdarch/crates/stdarch-test/src/lib.rs index f6614f6d51c..ecaf95f6176 100644 --- a/library/stdarch/crates/stdarch-test/src/lib.rs +++ b/library/stdarch/crates/stdarch-test/src/lib.rs @@ -7,13 +7,11 @@ #![allow(clippy::missing_docs_in_private_items, clippy::print_stdout)] #[macro_use] -extern crate lazy_static; -#[macro_use] extern crate cfg_if; pub use assert_instr_macro::*; pub use simd_test_macro::*; -use std::{cmp, collections::HashSet, env, hash, hint::black_box, str}; +use std::{cmp, collections::HashSet, env, hash, hint::black_box, str, sync::LazyLock}; cfg_if! { if #[cfg(target_arch = "wasm32")] { @@ -25,9 +23,7 @@ cfg_if! { } } -lazy_static! { - static ref DISASSEMBLY: HashSet<Function> = disassemble_myself(); -} +static DISASSEMBLY: LazyLock<HashSet<Function>> = LazyLock::new(disassemble_myself); #[derive(Debug)] struct Function { @@ -65,11 +61,12 @@ pub fn assert(shim_addr: usize, fnname: &str, expected: &str) { black_box(shim_addr); //eprintln!("shim name: {fnname}"); - let function = &DISASSEMBLY - .get(&Function::new(fnname)) - .unwrap_or_else(|| panic!("function \"{fnname}\" not found in the disassembly")); + let Some(function) = &DISASSEMBLY.get(&Function::new(fnname)) else { + panic!("function `{fnname}` not found in the disassembly") + }; //eprintln!(" function: {:?}", function); + // Trim any filler instructions. let mut instrs = &function.instrs[..]; while instrs.last().is_some_and(|s| s == "nop" || s == "int3") { instrs = &instrs[..instrs.len() - 1]; @@ -84,12 +81,26 @@ pub fn assert(shim_addr: usize, fnname: &str, expected: &str) { // 2. It is a mark, indicating that the instruction will be // compiled into other instructions - mainly because of llvm // optimization. - let expected = if expected == "unknown" { - "<unknown>" // Workaround for rust-lang/stdarch#1674, todo: remove when the issue is fixed - } else { - expected + let expected = match expected { + // `<unknown>` is what LLVM will generate for unknown instructions. We use this to fail + // loudly when LLVM does start supporting these instructions. + // + // This was introduced in https://github.com/rust-lang/stdarch/pull/1674 to work around the + // RISC-V P extension not yet being supported. + "unknown" => "<unknown>", + _ => expected, }; - let found = expected == "nop" || instrs.iter().any(|s| s.starts_with(expected)); + + // Check whether the given instruction is part of the disassemblied body. + let found = expected == "nop" + || instrs.iter().any(|instruction| { + instruction.starts_with(expected) + // Check that the next character is non-alphanumeric. This prevents false negatives + // when e.g. `fminnm` was used but `fmin` was expected. + // + // TODO: resolve the conflicts (x86_64 and aarch64 have a bunch, probably others) + // && !instruction[expected.len()..].starts_with(|c: char| c.is_ascii_alphanumeric()) + }); // Look for subroutine call instructions in the disassembly to detect whether // inlining failed: all intrinsics are `#[inline(always)]`, so calling one |