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-rw-r--r--tests/codegen/const-vector.rs38
1 files changed, 18 insertions, 20 deletions
diff --git a/tests/codegen/const-vector.rs b/tests/codegen/const-vector.rs
index 42921442e03..a2249f4fff7 100644
--- a/tests/codegen/const-vector.rs
+++ b/tests/codegen/const-vector.rs
@@ -16,18 +16,9 @@
 #![feature(mips_target_feature)]
 #![allow(non_camel_case_types)]
 
-// Setting up structs that can be used as const vectors
-#[repr(simd)]
-#[derive(Clone)]
-pub struct i8x2([i8; 2]);
-
-#[repr(simd)]
-#[derive(Clone)]
-pub struct f32x2([f32; 2]);
-
-#[repr(simd, packed)]
-#[derive(Copy, Clone)]
-pub struct Simd<T, const N: usize>([T; N]);
+#[path = "../auxiliary/minisimd.rs"]
+mod minisimd;
+use minisimd::{PackedSimd as Simd, f32x2, i8x2};
 
 // The following functions are required for the tests to ensure
 // that they are called with a const vector
@@ -45,7 +36,7 @@ extern "unadjusted" {
 
 // Ensure the packed variant of the simd struct does not become a const vector
 // if the size is not a power of 2
-// CHECK: %"Simd<i32, 3>" = type { [3 x i32] }
+// CHECK: %"minisimd::PackedSimd<i32, 3>" = type { [3 x i32] }
 
 #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
@@ -54,27 +45,34 @@ extern "unadjusted" {
 pub fn do_call() {
     unsafe {
         // CHECK: call void @test_i8x2(<2 x i8> <i8 32, i8 64>
-        test_i8x2(const { i8x2([32, 64]) });
+        test_i8x2(const { i8x2::from_array([32, 64]) });
 
         // CHECK: call void @test_i8x2_two_args(<2 x i8> <i8 32, i8 64>, <2 x i8> <i8 8, i8 16>
-        test_i8x2_two_args(const { i8x2([32, 64]) }, const { i8x2([8, 16]) });
+        test_i8x2_two_args(
+            const { i8x2::from_array([32, 64]) },
+            const { i8x2::from_array([8, 16]) },
+        );
 
         // CHECK: call void @test_i8x2_mixed_args(<2 x i8> <i8 32, i8 64>, i32 43, <2 x i8> <i8 8, i8 16>
-        test_i8x2_mixed_args(const { i8x2([32, 64]) }, 43, const { i8x2([8, 16]) });
+        test_i8x2_mixed_args(
+            const { i8x2::from_array([32, 64]) },
+            43,
+            const { i8x2::from_array([8, 16]) },
+        );
 
         // CHECK: call void @test_i8x2_arr(<2 x i8> <i8 32, i8 64>
-        test_i8x2_arr(const { i8x2([32, 64]) });
+        test_i8x2_arr(const { i8x2::from_array([32, 64]) });
 
         // CHECK: call void @test_f32x2(<2 x float> <float 0x3FD47AE140000000, float 0x3FE47AE140000000>
-        test_f32x2(const { f32x2([0.32, 0.64]) });
+        test_f32x2(const { f32x2::from_array([0.32, 0.64]) });
 
         // CHECK: void @test_f32x2_arr(<2 x float> <float 0x3FD47AE140000000, float 0x3FE47AE140000000>
-        test_f32x2_arr(const { f32x2([0.32, 0.64]) });
+        test_f32x2_arr(const { f32x2::from_array([0.32, 0.64]) });
 
         // CHECK: call void @test_simd(<4 x i32> <i32 2, i32 4, i32 6, i32 8>
         test_simd(const { Simd::<i32, 4>([2, 4, 6, 8]) });
 
-        // CHECK: call void @test_simd_unaligned(%"Simd<i32, 3>" %1
+        // CHECK: call void @test_simd_unaligned(%"minisimd::PackedSimd<i32, 3>" %1
         test_simd_unaligned(const { Simd::<i32, 3>([2, 4, 6]) });
     }
 }