diff options
Diffstat (limited to 'tests/codegen')
29 files changed, 404 insertions, 138 deletions
diff --git a/tests/codegen/asm/aarch64-clobbers.rs b/tests/codegen/asm/aarch64-clobbers.rs index 900e6629fd2..dd3ba1510b5 100644 --- a/tests/codegen/asm/aarch64-clobbers.rs +++ b/tests/codegen/asm/aarch64-clobbers.rs @@ -1,3 +1,4 @@ +//@ add-core-stubs //@ revisions: aarch64 aarch64_fixed_x18 aarch64_no_x18 aarch64_reserve_x18 arm64ec //@[aarch64] compile-flags: --target aarch64-unknown-linux-gnu //@[aarch64] needs-llvm-components: aarch64 @@ -14,16 +15,11 @@ // ignore-tidy-linelength #![crate_type = "rlib"] -#![feature(no_core, rustc_attrs, lang_items)] +#![feature(no_core)] #![no_core] -#[lang = "sized"] -trait Sized {} - -#[rustc_builtin_macro] -macro_rules! asm { - () => {}; -} +extern crate minicore; +use minicore::*; // CHECK-LABEL: @cc_clobber // CHECK: call void asm sideeffect "", "~{cc}"() diff --git a/tests/codegen/asm/avr-clobbers.rs b/tests/codegen/asm/avr-clobbers.rs index 6e0c75368e2..56218cd7bcf 100644 --- a/tests/codegen/asm/avr-clobbers.rs +++ b/tests/codegen/asm/avr-clobbers.rs @@ -1,18 +1,14 @@ +//@ add-core-stubs //@ assembly-output: emit-asm //@ compile-flags: --target avr-unknown-gnu-atmega328 //@ needs-llvm-components: avr #![crate_type = "rlib"] -#![feature(no_core, rustc_attrs, lang_items, asm_experimental_arch)] +#![feature(no_core, asm_experimental_arch)] #![no_core] -#[lang = "sized"] -trait Sized {} - -#[rustc_builtin_macro] -macro_rules! asm { - () => {}; -} +extern crate minicore; +use minicore::*; // CHECK-LABEL: @sreg_is_clobbered // CHECK: void asm sideeffect "", "~{sreg}"() diff --git a/tests/codegen/asm/hexagon-clobbers.rs b/tests/codegen/asm/hexagon-clobbers.rs index 6bb662ead99..800b8964669 100644 --- a/tests/codegen/asm/hexagon-clobbers.rs +++ b/tests/codegen/asm/hexagon-clobbers.rs @@ -1,19 +1,15 @@ +//@ add-core-stubs //@ revisions: hexagon //@[hexagon] compile-flags: --target hexagon-unknown-linux-musl //@[hexagon] needs-llvm-components: hexagon //@ compile-flags: -Zmerge-functions=disabled #![crate_type = "rlib"] -#![feature(no_core, rustc_attrs, lang_items, asm_experimental_arch)] +#![feature(no_core, asm_experimental_arch)] #![no_core] -#[lang = "sized"] -trait Sized {} - -#[rustc_builtin_macro] -macro_rules! asm { - () => {}; -} +extern crate minicore; +use minicore::*; // CHECK-LABEL: @flags_clobber // CHECK: call void asm sideeffect "", ""() diff --git a/tests/codegen/asm/msp430-clobbers.rs b/tests/codegen/asm/msp430-clobbers.rs index c00c04f3088..2c8d29cffc4 100644 --- a/tests/codegen/asm/msp430-clobbers.rs +++ b/tests/codegen/asm/msp430-clobbers.rs @@ -1,18 +1,14 @@ +//@ add-core-stubs //@ assembly-output: emit-asm //@ compile-flags: --target msp430-none-elf //@ needs-llvm-components: msp430 #![crate_type = "rlib"] -#![feature(no_core, rustc_attrs, lang_items, asm_experimental_arch)] +#![feature(no_core, asm_experimental_arch)] #![no_core] -#[lang = "sized"] -trait Sized {} - -#[rustc_builtin_macro] -macro_rules! asm { - () => {}; -} +extern crate minicore; +use minicore::*; // CHECK-LABEL: @sr_clobber // CHECK: call void asm sideeffect "", "~{sr}"() diff --git a/tests/codegen/asm/powerpc-clobbers.rs b/tests/codegen/asm/powerpc-clobbers.rs index 2832377cef0..f7fc7eea5d5 100644 --- a/tests/codegen/asm/powerpc-clobbers.rs +++ b/tests/codegen/asm/powerpc-clobbers.rs @@ -1,3 +1,4 @@ +//@ add-core-stubs //@ revisions: powerpc powerpc64 powerpc64le aix64 //@[powerpc] compile-flags: --target powerpc-unknown-linux-gnu //@[powerpc] needs-llvm-components: powerpc @@ -10,16 +11,11 @@ // ignore-tidy-linelength #![crate_type = "rlib"] -#![feature(no_core, rustc_attrs, lang_items, asm_experimental_arch)] +#![feature(no_core, asm_experimental_arch)] #![no_core] -#[lang = "sized"] -trait Sized {} - -#[rustc_builtin_macro] -macro_rules! asm { - () => {}; -} +extern crate minicore; +use minicore::*; // CHECK-LABEL: @cr_clobber // CHECK: call void asm sideeffect "", "~{cr}"() diff --git a/tests/codegen/asm/riscv-clobbers.rs b/tests/codegen/asm/riscv-clobbers.rs index 59b2705a449..e55b6731098 100644 --- a/tests/codegen/asm/riscv-clobbers.rs +++ b/tests/codegen/asm/riscv-clobbers.rs @@ -1,3 +1,4 @@ +//@ add-core-stubs //@ assembly-output: emit-asm //@ revisions: rv32i rv64i rv32e //@[rv32i] compile-flags: --target riscv32i-unknown-none-elf @@ -9,16 +10,11 @@ // ignore-tidy-linelength #![crate_type = "rlib"] -#![feature(no_core, rustc_attrs, lang_items)] +#![feature(no_core)] #![no_core] -#[lang = "sized"] -trait Sized {} - -#[rustc_builtin_macro] -macro_rules! asm { - () => {}; -} +extern crate minicore; +use minicore::*; // CHECK-LABEL: @flags_clobber // CHECK: call void asm sideeffect "", "~{vtype},~{vl},~{vxsat},~{vxrm}"() diff --git a/tests/codegen/asm/s390x-clobbers.rs b/tests/codegen/asm/s390x-clobbers.rs index 56d82b4b044..cbb6630553c 100644 --- a/tests/codegen/asm/s390x-clobbers.rs +++ b/tests/codegen/asm/s390x-clobbers.rs @@ -1,18 +1,14 @@ +//@ add-core-stubs //@ revisions: s390x //@[s390x] compile-flags: --target s390x-unknown-linux-gnu //@[s390x] needs-llvm-components: systemz #![crate_type = "rlib"] -#![feature(no_core, rustc_attrs, lang_items)] +#![feature(no_core)] #![no_core] -#[lang = "sized"] -trait Sized {} - -#[rustc_builtin_macro] -macro_rules! asm { - () => {}; -} +extern crate minicore; +use minicore::*; // CHECK-LABEL: @cc_clobber // CHECK: call void asm sideeffect "", "~{cc}"() diff --git a/tests/codegen/asm/sanitize-llvm.rs b/tests/codegen/asm/sanitize-llvm.rs index fb332f9a0f3..97a77033284 100644 --- a/tests/codegen/asm/sanitize-llvm.rs +++ b/tests/codegen/asm/sanitize-llvm.rs @@ -1,3 +1,4 @@ +//@ add-core-stubs // FIXME(nagisa): remove the flags below once all targets support `asm!`. //@ compile-flags: --target x86_64-unknown-linux-gnu -Copt-level=0 //@ needs-llvm-components: x86 @@ -5,19 +6,12 @@ // Verify we sanitize the special tokens for the LLVM inline-assembly, ensuring people won't // inadvertently rely on the LLVM-specific syntax and features. #![no_core] -#![feature(no_core, lang_items, rustc_attrs)] +#![feature(no_core)] #![crate_type = "rlib"] #![allow(named_asm_labels)] -#[rustc_builtin_macro] -macro_rules! asm { - () => {}; -} - -#[lang = "sized"] -trait Sized {} -#[lang = "copy"] -trait Copy {} +extern crate minicore; +use minicore::*; pub unsafe fn we_escape_dollar_signs() { // CHECK: call void asm sideeffect alignstack inteldialect "banana$$:" diff --git a/tests/codegen/asm/sparc-clobbers.rs b/tests/codegen/asm/sparc-clobbers.rs index 843abd55352..a71715ed94d 100644 --- a/tests/codegen/asm/sparc-clobbers.rs +++ b/tests/codegen/asm/sparc-clobbers.rs @@ -1,3 +1,4 @@ +//@ add-core-stubs //@ revisions: sparc sparcv8plus sparc64 //@[sparc] compile-flags: --target sparc-unknown-none-elf //@[sparc] needs-llvm-components: sparc @@ -7,16 +8,11 @@ //@[sparc64] needs-llvm-components: sparc #![crate_type = "rlib"] -#![feature(no_core, rustc_attrs, lang_items, asm_experimental_arch)] +#![feature(no_core, asm_experimental_arch)] #![no_core] -#[lang = "sized"] -trait Sized {} - -#[rustc_builtin_macro] -macro_rules! asm { - () => {}; -} +extern crate minicore; +use minicore::*; // CHECK-LABEL: @cc_clobber // CHECK: call void asm sideeffect "", "~{icc},~{fcc0},~{fcc1},~{fcc2},~{fcc3}"() diff --git a/tests/codegen/async-fn-debug-awaitee-field.rs b/tests/codegen/async-fn-debug-awaitee-field.rs index d1a7d738e9e..ab13d4509e2 100644 --- a/tests/codegen/async-fn-debug-awaitee-field.rs +++ b/tests/codegen/async-fn-debug-awaitee-field.rs @@ -1,8 +1,12 @@ -// This test makes sure that the coroutine field capturing the awaitee in a `.await` expression -// is called "__awaitee" in debuginfo. This name must not be changed since debuggers and debugger -// extensions rely on the field having this name. - // ignore-tidy-linelength +//! This test makes sure that the coroutine field capturing the awaitee in a `.await` expression +//! is called `__awaitee` in debuginfo. This name must not be changed since debuggers and debugger +//! extensions rely on the field having this name. + +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc + //@ compile-flags: -C debuginfo=2 --edition=2018 -Copt-level=0 #![crate_type = "lib"] diff --git a/tests/codegen/const-array.rs b/tests/codegen/const-array.rs new file mode 100644 index 00000000000..f2b331c315d --- /dev/null +++ b/tests/codegen/const-array.rs @@ -0,0 +1,15 @@ +//@ compile-flags: -O + +#![crate_type = "lib"] + +const LUT: [u8; 2] = [1, 1]; + +// CHECK-LABEL: @decode +#[no_mangle] +pub fn decode(i: u8) -> u8 { + // CHECK: start: + // CHECK-NEXT: icmp + // CHECK-NEXT: select + // CHECK-NEXT: ret + if i < 2 { LUT[i as usize] } else { 2 } +} diff --git a/tests/codegen/debug-accessibility/crate-enum.rs b/tests/codegen/debug-accessibility/crate-enum.rs index c80700d7b28..9ad5a6fd0ff 100644 --- a/tests/codegen/debug-accessibility/crate-enum.rs +++ b/tests/codegen/debug-accessibility/crate-enum.rs @@ -1,9 +1,11 @@ -//@ compile-flags: -C debuginfo=2 // ignore-tidy-linelength +//! Checks that visibility information is present in the debuginfo for crate-visibility enums. -#![allow(dead_code)] +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc -// Checks that visibility information is present in the debuginfo for crate-visibility enums. +//@ compile-flags: -C debuginfo=2 mod module { use std::hint::black_box; diff --git a/tests/codegen/debug-accessibility/private-enum.rs b/tests/codegen/debug-accessibility/private-enum.rs index 22d49a40eff..002336c03b3 100644 --- a/tests/codegen/debug-accessibility/private-enum.rs +++ b/tests/codegen/debug-accessibility/private-enum.rs @@ -1,9 +1,10 @@ -//@ compile-flags: -C debuginfo=2 // ignore-tidy-linelength +//! Checks that visibility information is present in the debuginfo for private enums. -#![allow(dead_code)] - -// Checks that visibility information is present in the debuginfo for private enums. +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc +//@ compile-flags: -C debuginfo=2 use std::hint::black_box; diff --git a/tests/codegen/debug-accessibility/public-enum.rs b/tests/codegen/debug-accessibility/public-enum.rs index f16ccf1a3c9..e5cd1ab7350 100644 --- a/tests/codegen/debug-accessibility/public-enum.rs +++ b/tests/codegen/debug-accessibility/public-enum.rs @@ -1,9 +1,11 @@ -//@ compile-flags: -C debuginfo=2 // ignore-tidy-linelength +//! Checks that visibility information is present in the debuginfo for types and their fields. -#![allow(dead_code)] +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc -// Checks that visibility information is present in the debuginfo for types and their fields. +//@ compile-flags: -C debuginfo=2 use std::hint::black_box; diff --git a/tests/codegen/debug-accessibility/super-enum.rs b/tests/codegen/debug-accessibility/super-enum.rs index 1b6d7d793ed..8e34d8be01f 100644 --- a/tests/codegen/debug-accessibility/super-enum.rs +++ b/tests/codegen/debug-accessibility/super-enum.rs @@ -1,9 +1,10 @@ -//@ compile-flags: -C debuginfo=2 // ignore-tidy-linelength +//! Checks that visibility information is present in the debuginfo for super-visibility enums. -#![allow(dead_code)] - -// Checks that visibility information is present in the debuginfo for super-visibility enums. +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc +//@ compile-flags: -C debuginfo=2 mod module { use std::hint::black_box; diff --git a/tests/codegen/debug-vtable.rs b/tests/codegen/debug-vtable.rs index 036fff6cd23..b9808e4079b 100644 --- a/tests/codegen/debug-vtable.rs +++ b/tests/codegen/debug-vtable.rs @@ -1,5 +1,10 @@ -// This test checks the debuginfo for the expected 3 vtables is generated for correct names and number -// of entries. +// ignore-tidy-linelength +//! This test checks the debuginfo for the expected 3 vtables is generated for correct names and +//! number of entries. + +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc // Use the v0 symbol mangling scheme to codegen order independent of rustc version. // Unnamed items like shims are generated in lexicographical order of their symbol name and in the @@ -7,7 +12,6 @@ // of the name, thus randomizing item order with respect to rustc version. //@ compile-flags: -Cdebuginfo=2 -Copt-level=0 -Csymbol-mangling-version=v0 -// ignore-tidy-linelength // Make sure that vtables don't have the unnamed_addr attribute when debuginfo is enabled. // This helps debuggers more reliably map from dyn pointer to concrete type. diff --git a/tests/codegen/debuginfo-generic-closure-env-names.rs b/tests/codegen/debuginfo-generic-closure-env-names.rs index 6d56fbc40ab..6b314c9abae 100644 --- a/tests/codegen/debuginfo-generic-closure-env-names.rs +++ b/tests/codegen/debuginfo-generic-closure-env-names.rs @@ -1,14 +1,17 @@ -// This test checks that we get proper type names for closure environments and -// async-fn environments in debuginfo, especially making sure that generic arguments -// of the enclosing functions don't get lost. -// -// Unfortunately, the order that debuginfo gets emitted into LLVM IR becomes a bit hard -// to predict once async fns are involved, so DAG allows any order. -// -// Note that the test does not check async-fns when targeting MSVC because debuginfo for -// those does not follow the enum-fallback encoding yet and thus is incomplete. - // ignore-tidy-linelength +//! This test checks that we get proper type names for closure environments and +//! async-fn environments in debuginfo, especially making sure that generic arguments +//! of the enclosing functions don't get lost. +//! +//! Unfortunately, the order that debuginfo gets emitted into LLVM IR becomes a bit hard +//! to predict once async fns are involved, so DAG allows any order. +//! +//! Note that the test does not check async-fns when targeting MSVC because debuginfo for +//! those does not follow the enum-fallback encoding yet and thus is incomplete. + +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc // Use the v0 symbol mangling scheme to codegen order independent of rustc version. // Unnamed items like shims are generated in lexicographical order of their symbol name and in the diff --git a/tests/codegen/intrinsics/carrying_mul_add.rs b/tests/codegen/intrinsics/carrying_mul_add.rs new file mode 100644 index 00000000000..174c4077f09 --- /dev/null +++ b/tests/codegen/intrinsics/carrying_mul_add.rs @@ -0,0 +1,137 @@ +//@ revisions: RAW OPT +//@ compile-flags: -C opt-level=1 +//@[RAW] compile-flags: -C no-prepopulate-passes +//@[OPT] min-llvm-version: 19 + +#![crate_type = "lib"] +#![feature(core_intrinsics)] +#![feature(core_intrinsics_fallbacks)] + +// Note that LLVM seems to sometimes permute the order of arguments to mul and add, +// so these tests don't check the arguments in the optimized revision. + +use std::intrinsics::{carrying_mul_add, fallback}; + +// The fallbacks are emitted even when they're never used, but optimize out. + +// RAW: wide_mul_u128 +// OPT-NOT: wide_mul_u128 + +// CHECK-LABEL: @cma_u8 +#[no_mangle] +pub unsafe fn cma_u8(a: u8, b: u8, c: u8, d: u8) -> (u8, u8) { + // CHECK: [[A:%.+]] = zext i8 %a to i16 + // CHECK: [[B:%.+]] = zext i8 %b to i16 + // CHECK: [[C:%.+]] = zext i8 %c to i16 + // CHECK: [[D:%.+]] = zext i8 %d to i16 + // CHECK: [[AB:%.+]] = mul nuw i16 + // RAW-SAME: [[A]], [[B]] + // CHECK: [[ABC:%.+]] = add nuw i16 + // RAW-SAME: [[AB]], [[C]] + // CHECK: [[ABCD:%.+]] = add nuw i16 + // RAW-SAME: [[ABC]], [[D]] + // CHECK: [[LOW:%.+]] = trunc i16 [[ABCD]] to i8 + // CHECK: [[HIGHW:%.+]] = lshr i16 [[ABCD]], 8 + // RAW: [[HIGH:%.+]] = trunc i16 [[HIGHW]] to i8 + // OPT: [[HIGH:%.+]] = trunc nuw i16 [[HIGHW]] to i8 + // CHECK: [[PAIR0:%.+]] = insertvalue { i8, i8 } poison, i8 [[LOW]], 0 + // CHECK: [[PAIR1:%.+]] = insertvalue { i8, i8 } [[PAIR0]], i8 [[HIGH]], 1 + // OPT: ret { i8, i8 } [[PAIR1]] + carrying_mul_add(a, b, c, d) +} + +// CHECK-LABEL: @cma_u32 +#[no_mangle] +pub unsafe fn cma_u32(a: u32, b: u32, c: u32, d: u32) -> (u32, u32) { + // CHECK: [[A:%.+]] = zext i32 %a to i64 + // CHECK: [[B:%.+]] = zext i32 %b to i64 + // CHECK: [[C:%.+]] = zext i32 %c to i64 + // CHECK: [[D:%.+]] = zext i32 %d to i64 + // CHECK: [[AB:%.+]] = mul nuw i64 + // RAW-SAME: [[A]], [[B]] + // CHECK: [[ABC:%.+]] = add nuw i64 + // RAW-SAME: [[AB]], [[C]] + // CHECK: [[ABCD:%.+]] = add nuw i64 + // RAW-SAME: [[ABC]], [[D]] + // CHECK: [[LOW:%.+]] = trunc i64 [[ABCD]] to i32 + // CHECK: [[HIGHW:%.+]] = lshr i64 [[ABCD]], 32 + // RAW: [[HIGH:%.+]] = trunc i64 [[HIGHW]] to i32 + // OPT: [[HIGH:%.+]] = trunc nuw i64 [[HIGHW]] to i32 + // CHECK: [[PAIR0:%.+]] = insertvalue { i32, i32 } poison, i32 [[LOW]], 0 + // CHECK: [[PAIR1:%.+]] = insertvalue { i32, i32 } [[PAIR0]], i32 [[HIGH]], 1 + // OPT: ret { i32, i32 } [[PAIR1]] + carrying_mul_add(a, b, c, d) +} + +// CHECK-LABEL: @cma_u128 +// CHECK-SAME: sret{{.+}}dereferenceable(32){{.+}}%_0,{{.+}}%a,{{.+}}%b,{{.+}}%c,{{.+}}%d +#[no_mangle] +pub unsafe fn cma_u128(a: u128, b: u128, c: u128, d: u128) -> (u128, u128) { + // CHECK: [[A:%.+]] = zext i128 %a to i256 + // CHECK: [[B:%.+]] = zext i128 %b to i256 + // CHECK: [[C:%.+]] = zext i128 %c to i256 + // CHECK: [[D:%.+]] = zext i128 %d to i256 + // CHECK: [[AB:%.+]] = mul nuw i256 + // RAW-SAME: [[A]], [[B]] + // CHECK: [[ABC:%.+]] = add nuw i256 + // RAW-SAME: [[AB]], [[C]] + // CHECK: [[ABCD:%.+]] = add nuw i256 + // RAW-SAME: [[ABC]], [[D]] + // CHECK: [[LOW:%.+]] = trunc i256 [[ABCD]] to i128 + // CHECK: [[HIGHW:%.+]] = lshr i256 [[ABCD]], 128 + // RAW: [[HIGH:%.+]] = trunc i256 [[HIGHW]] to i128 + // OPT: [[HIGH:%.+]] = trunc nuw i256 [[HIGHW]] to i128 + // RAW: [[PAIR0:%.+]] = insertvalue { i128, i128 } poison, i128 [[LOW]], 0 + // RAW: [[PAIR1:%.+]] = insertvalue { i128, i128 } [[PAIR0]], i128 [[HIGH]], 1 + // OPT: store i128 [[LOW]], ptr %_0 + // OPT: [[P1:%.+]] = getelementptr inbounds i8, ptr %_0, {{i32|i64}} 16 + // OPT: store i128 [[HIGH]], ptr [[P1]] + // CHECK: ret void + carrying_mul_add(a, b, c, d) +} + +// CHECK-LABEL: @cma_i128 +// CHECK-SAME: sret{{.+}}dereferenceable(32){{.+}}%_0,{{.+}}%a,{{.+}}%b,{{.+}}%c,{{.+}}%d +#[no_mangle] +pub unsafe fn cma_i128(a: i128, b: i128, c: i128, d: i128) -> (u128, i128) { + // CHECK: [[A:%.+]] = sext i128 %a to i256 + // CHECK: [[B:%.+]] = sext i128 %b to i256 + // CHECK: [[C:%.+]] = sext i128 %c to i256 + // CHECK: [[D:%.+]] = sext i128 %d to i256 + // CHECK: [[AB:%.+]] = mul nsw i256 + // RAW-SAME: [[A]], [[B]] + // CHECK: [[ABC:%.+]] = add nsw i256 + // RAW-SAME: [[AB]], [[C]] + // CHECK: [[ABCD:%.+]] = add nsw i256 + // RAW-SAME: [[ABC]], [[D]] + // CHECK: [[LOW:%.+]] = trunc i256 [[ABCD]] to i128 + // CHECK: [[HIGHW:%.+]] = lshr i256 [[ABCD]], 128 + // RAW: [[HIGH:%.+]] = trunc i256 [[HIGHW]] to i128 + // OPT: [[HIGH:%.+]] = trunc nuw i256 [[HIGHW]] to i128 + // RAW: [[PAIR0:%.+]] = insertvalue { i128, i128 } poison, i128 [[LOW]], 0 + // RAW: [[PAIR1:%.+]] = insertvalue { i128, i128 } [[PAIR0]], i128 [[HIGH]], 1 + // OPT: store i128 [[LOW]], ptr %_0 + // OPT: [[P1:%.+]] = getelementptr inbounds i8, ptr %_0, {{i32|i64}} 16 + // OPT: store i128 [[HIGH]], ptr [[P1]] + // CHECK: ret void + carrying_mul_add(a, b, c, d) +} + +// CHECK-LABEL: @fallback_cma_u32 +#[no_mangle] +pub unsafe fn fallback_cma_u32(a: u32, b: u32, c: u32, d: u32) -> (u32, u32) { + // OPT-DAG: [[A:%.+]] = zext i32 %a to i64 + // OPT-DAG: [[B:%.+]] = zext i32 %b to i64 + // OPT-DAG: [[AB:%.+]] = mul nuw i64 + // OPT-DAG: [[C:%.+]] = zext i32 %c to i64 + // OPT-DAG: [[ABC:%.+]] = add nuw i64{{.+}}[[C]] + // OPT-DAG: [[D:%.+]] = zext i32 %d to i64 + // OPT-DAG: [[ABCD:%.+]] = add nuw i64{{.+}}[[D]] + // OPT-DAG: [[LOW:%.+]] = trunc i64 [[ABCD]] to i32 + // OPT-DAG: [[HIGHW:%.+]] = lshr i64 [[ABCD]], 32 + // OPT-DAG: [[HIGH:%.+]] = trunc nuw i64 [[HIGHW]] to i32 + // OPT-DAG: [[PAIR0:%.+]] = insertvalue { i32, i32 } poison, i32 [[LOW]], 0 + // OPT-DAG: [[PAIR1:%.+]] = insertvalue { i32, i32 } [[PAIR0]], i32 [[HIGH]], 1 + // OPT-DAG: ret { i32, i32 } [[PAIR1]] + fallback::CarryingMulAdd::carrying_mul_add(a, b, c, d) +} diff --git a/tests/codegen/intrinsics/typed_swap.rs b/tests/codegen/intrinsics/typed_swap.rs index e73931d1d54..6b55078407a 100644 --- a/tests/codegen/intrinsics/typed_swap.rs +++ b/tests/codegen/intrinsics/typed_swap.rs @@ -8,14 +8,14 @@ #![crate_type = "lib"] #![feature(core_intrinsics)] -use std::intrinsics::typed_swap; +use std::intrinsics::typed_swap_nonoverlapping; // CHECK-LABEL: @swap_unit( #[no_mangle] pub unsafe fn swap_unit(x: &mut (), y: &mut ()) { // CHECK: start // CHECK-NEXT: ret void - typed_swap(x, y) + typed_swap_nonoverlapping(x, y) } // CHECK-LABEL: @swap_i32( @@ -32,7 +32,7 @@ pub unsafe fn swap_i32(x: &mut i32, y: &mut i32) { // OPT3: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %x, ptr align 4 %y, i64 4, i1 false) // CHECK: store i32 %[[TEMP]], ptr %y, align 4 // CHECK: ret void - typed_swap(x, y) + typed_swap_nonoverlapping(x, y) } // CHECK-LABEL: @swap_pair( @@ -47,7 +47,7 @@ pub unsafe fn swap_pair(x: &mut (i32, u32), y: &mut (i32, u32)) { // CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %x, ptr align 4 %y, i64 8, i1 false) // CHECK: store i32 // CHECK: store i32 - typed_swap(x, y) + typed_swap_nonoverlapping(x, y) } // CHECK-LABEL: @swap_str( @@ -63,7 +63,7 @@ pub unsafe fn swap_str<'a>(x: &mut &'a str, y: &mut &'a str) { // CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %x, ptr align 8 %y, i64 16, i1 false) // CHECK: store ptr // CHECK: store i64 - typed_swap(x, y) + typed_swap_nonoverlapping(x, y) } // OPT0-LABEL: @swap_string( @@ -73,5 +73,5 @@ pub unsafe fn swap_string(x: &mut String, y: &mut String) { // OPT0: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %[[TEMP]], ptr align 8 %x, i64 24, i1 false) // OPT0: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %x, ptr align 8 %y, i64 24, i1 false) // OPT0: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %y, ptr align 8 %[[TEMP]], i64 24, i1 false) - typed_swap(x, y) + typed_swap_nonoverlapping(x, y) } diff --git a/tests/codegen/issues/issue-98678-async.rs b/tests/codegen/issues/issue-98678-async.rs index 75f5d82eee5..3dd06bb5194 100644 --- a/tests/codegen/issues/issue-98678-async.rs +++ b/tests/codegen/issues/issue-98678-async.rs @@ -1,11 +1,13 @@ -// This test verifies the accuracy of emitted file and line debuginfo metadata for async blocks and -// async functions. -// +// ignore-tidy-linelength +//! This test verifies the accuracy of emitted file and line debuginfo metadata for async blocks and +//! async functions. + +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc //@ edition:2021 //@ compile-flags: --crate-type=lib -Copt-level=0 -Cdebuginfo=2 -Zdebug-info-type-line-numbers=true -// ignore-tidy-linelength - // NONMSVC-DAG: ![[#FILE:]] = !DIFile({{.*}}filename:{{.*[/\\]}}issue-98678-async.rs{{".*}}) // MSVC: ![[#FILE:]] = !DIFile({{.*}}filename:{{.*}}\\issue-98678-async.rs{{".*}}) diff --git a/tests/codegen/issues/issue-98678-closure-coroutine.rs b/tests/codegen/issues/issue-98678-closure-coroutine.rs index 0730e56bf31..8763bcb799d 100644 --- a/tests/codegen/issues/issue-98678-closure-coroutine.rs +++ b/tests/codegen/issues/issue-98678-closure-coroutine.rs @@ -1,10 +1,13 @@ -// This test verifies the accuracy of emitted file and line debuginfo metadata for closures and -// coroutines. -// -//@ compile-flags: --crate-type=lib -Copt-level=0 -Cdebuginfo=2 -Zdebug-info-type-line-numbers=true +// ignore-tidy-linelength +//! This test verifies the accuracy of emitted file and line debuginfo metadata for closures and +//! coroutines. + #![feature(coroutines, stmt_expr_attributes)] -// ignore-tidy-linelength +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc +//@ compile-flags: --crate-type=lib -Copt-level=0 -Cdebuginfo=2 -Zdebug-info-type-line-numbers=true // NONMSVC-DAG: ![[#FILE:]] = !DIFile({{.*}}filename:{{.*[/\\]}}issue-98678-closure-coroutine.rs{{".*}}) // MSVC-DAG: ![[#FILE:]] = !DIFile({{.*}}filename:{{.*}}\\issue-98678-closure-coroutine.rs{{".*}}) diff --git a/tests/codegen/issues/issue-98678-enum.rs b/tests/codegen/issues/issue-98678-enum.rs index 62c6cded866..87bf8797293 100644 --- a/tests/codegen/issues/issue-98678-enum.rs +++ b/tests/codegen/issues/issue-98678-enum.rs @@ -1,8 +1,10 @@ -// This test verifies the accuracy of emitted file and line debuginfo metadata enums. -// -//@ compile-flags: --crate-type=lib -Copt-level=0 -Cdebuginfo=2 -Zdebug-info-type-line-numbers=true - // ignore-tidy-linelength +//! This test verifies the accuracy of emitted file and line debuginfo metadata enums. + +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc +//@ compile-flags: --crate-type=lib -Copt-level=0 -Cdebuginfo=2 -Zdebug-info-type-line-numbers=true // NONMSVC: ![[#FILE:]] = !DIFile({{.*}}filename:{{.*[/\\]}}issue-98678-enum.rs{{".*}}) // MSVC: ![[#FILE:]] = !DIFile({{.*}}filename:{{.*}}\\issue-98678-enum.rs{{".*}}) diff --git a/tests/codegen/issues/issue-98678-struct-union.rs b/tests/codegen/issues/issue-98678-struct-union.rs index bf2d6e731aa..a83a585a433 100644 --- a/tests/codegen/issues/issue-98678-struct-union.rs +++ b/tests/codegen/issues/issue-98678-struct-union.rs @@ -1,9 +1,11 @@ -// This test verifies the accuracy of emitted file and line debuginfo metadata for structs and -// unions. -// -//@ compile-flags: --crate-type=lib -Copt-level=0 -Cdebuginfo=2 -Zdebug-info-type-line-numbers=true - // ignore-tidy-linelength +//! This test verifies the accuracy of emitted file and line debuginfo metadata for structs and +//! unions. + +//@ revisions: MSVC NONMSVC +//@[MSVC] only-msvc +//@[NONMSVC] ignore-msvc +//@ compile-flags: --crate-type=lib -Copt-level=0 -Cdebuginfo=2 -Zdebug-info-type-line-numbers=true // NONMSVC: ![[#FILE:]] = !DIFile({{.*}}filename:{{.*[/\\]}}issue-98678-struct-union.rs{{".*}}) // MSVC: ![[#FILE:]] = !DIFile({{.*}}filename:{{.*}}\\issue-98678-struct-union.rs{{".*}}) diff --git a/tests/codegen/meta-filecheck/msvc-prefix-good.rs b/tests/codegen/meta-filecheck/msvc-prefix-good.rs deleted file mode 100644 index 580d20d5438..00000000000 --- a/tests/codegen/meta-filecheck/msvc-prefix-good.rs +++ /dev/null @@ -1,7 +0,0 @@ -// One of MSVC or NONMSVC should always be defined, so this test should pass. - -// (one of these should always be present) - -// MSVC: main -// NONMSVC: main -fn main() {} diff --git a/tests/codegen/range_to_inclusive.rs b/tests/codegen/range_to_inclusive.rs new file mode 100644 index 00000000000..f3001897f88 --- /dev/null +++ b/tests/codegen/range_to_inclusive.rs @@ -0,0 +1,28 @@ +//! Test that `RangeTo` and `RangeToInclusive` generate identical +//! (and optimal) code; #63646 +//@ compile-flags: -O -Zmerge-functions=disabled +#![crate_type = "lib"] + +#[no_mangle] +// CHECK-LABEL: range_to( +pub fn range_to(a: i32, mut b: i32) -> i32 { + // CHECK: %1 = and i32 %0, %a + // CHECK-NEXT: ret i32 %1 + for _ in 0..65 { + b &= a; + } + + b +} + +#[no_mangle] +// CHECK-LABEL: range_to_inclusive( +pub fn range_to_inclusive(a: i32, mut b: i32) -> i32 { + // CHECK: %1 = and i32 %0, %a + // CHECK-NEXT: ret i32 %1 + for _ in 0..=64 { + b &= a; + } + + b +} diff --git a/tests/codegen/slice-indexing.rs b/tests/codegen/slice-indexing.rs index 3d284148db2..75112bb0c24 100644 --- a/tests/codegen/slice-indexing.rs +++ b/tests/codegen/slice-indexing.rs @@ -60,3 +60,40 @@ pub unsafe fn str_get_unchecked_mut_by_range(x: &mut str, r: Range<usize>) -> &m // CHECK: sub nuw i64 x.get_unchecked_mut(r) } + +// CHECK-LABEL: @slice_repeated_indexing( +#[no_mangle] +pub fn slice_repeated_indexing(dst: &mut [u8], offset: usize) { + let mut i = offset; + // CHECK: panic_bounds_check + dst[i] = 1; + i += 1; + // CHECK: panic_bounds_check + dst[i] = 2; + i += 1; + // CHECK: panic_bounds_check + dst[i] = 3; + i += 1; + // CHECK: panic_bounds_check + dst[i] = 4; +} + +// CHECK-LABEL: @slice_repeated_indexing_coalesced( +#[no_mangle] +pub fn slice_repeated_indexing_coalesced(dst: &mut [u8], offset: usize) { + let mut i = offset; + if i.checked_add(4).unwrap() <= dst.len() { + // CHECK-NOT: panic_bounds_check + dst[i] = 1; + i += 1; + // CHECK-NOT: panic_bounds_check + dst[i] = 2; + i += 1; + // CHECK-NOT: panic_bounds_check + dst[i] = 3; + i += 1; + // CHECK-NOT: panic_bounds_check + dst[i] = 4; + } + // CHECK: ret +} diff --git a/tests/codegen/slice-is-ascii.rs b/tests/codegen/slice-is-ascii.rs new file mode 100644 index 00000000000..b1e97154609 --- /dev/null +++ b/tests/codegen/slice-is-ascii.rs @@ -0,0 +1,16 @@ +//@ only-x86_64 +//@ compile-flags: -C opt-level=3 +#![crate_type = "lib"] + +/// Check that the fast-path of `is_ascii` uses a `pmovmskb` instruction. +/// Platforms lacking an equivalent instruction use other techniques for +/// optimizing `is_ascii`. +// CHECK-LABEL: @is_ascii_autovectorized +#[no_mangle] +pub fn is_ascii_autovectorized(s: &[u8]) -> bool { + // CHECK: load <32 x i8> + // CHECK-NEXT: icmp slt <32 x i8> + // CHECK-NEXT: bitcast <32 x i1> + // CHECK-NEXT: icmp eq i32 + s.is_ascii() +} diff --git a/tests/codegen/vec-in-place.rs b/tests/codegen/vec-in-place.rs index 5d05f242617..33de0913f77 100644 --- a/tests/codegen/vec-in-place.rs +++ b/tests/codegen/vec-in-place.rs @@ -37,6 +37,9 @@ pub struct Baz { #[no_mangle] pub fn vec_iterator_cast_primitive(vec: Vec<i8>) -> Vec<u8> { // CHECK-NOT: loop + // CHECK: call + // CHECK-SAME: void @llvm.assume(i1 %{{.+}}) + // CHECK-NOT: loop // CHECK-NOT: call vec.into_iter().map(|e| e as u8).collect() } @@ -45,14 +48,37 @@ pub fn vec_iterator_cast_primitive(vec: Vec<i8>) -> Vec<u8> { #[no_mangle] pub fn vec_iterator_cast_wrapper(vec: Vec<u8>) -> Vec<Wrapper<u8>> { // CHECK-NOT: loop + // CHECK: call + // CHECK-SAME: void @llvm.assume(i1 %{{.+}}) + // CHECK-NOT: loop // CHECK-NOT: call vec.into_iter().map(|e| Wrapper(e)).collect() } +// CHECK-LABEL: @vec_iterator_cast_signed +#[no_mangle] +pub fn vec_iterator_cast_signed(vec: Vec<i32>) -> Vec<u32> { + // CHECK-NOT: and i{{[0-9]+}} %{{.*}}, {{[0-9]+}} + vec.into_iter().map(|e| u32::from_ne_bytes(e.to_ne_bytes())).collect() +} + +// CHECK-LABEL: @vec_iterator_cast_signed_nested +#[no_mangle] +pub fn vec_iterator_cast_signed_nested(vec: Vec<Vec<i32>>) -> Vec<Vec<u32>> { + // CHECK-NOT: br i1 %{{.*}}, label %{{.*}}, label %{{.*}} + // CHECK-NOT: %{{.*}} = udiv + vec.into_iter() + .map(|e| e.into_iter().map(|e| u32::from_ne_bytes(e.to_ne_bytes())).collect()) + .collect() +} + // CHECK-LABEL: @vec_iterator_cast_unwrap #[no_mangle] pub fn vec_iterator_cast_unwrap(vec: Vec<Wrapper<u8>>) -> Vec<u8> { // CHECK-NOT: loop + // CHECK: call + // CHECK-SAME: void @llvm.assume(i1 %{{.+}}) + // CHECK-NOT: loop // CHECK-NOT: call vec.into_iter().map(|e| e.0).collect() } @@ -61,6 +87,9 @@ pub fn vec_iterator_cast_unwrap(vec: Vec<Wrapper<u8>>) -> Vec<u8> { #[no_mangle] pub fn vec_iterator_cast_aggregate(vec: Vec<[u64; 4]>) -> Vec<Foo> { // CHECK-NOT: loop + // CHECK: call + // CHECK-SAME: void @llvm.assume(i1 %{{.+}}) + // CHECK-NOT: loop // CHECK-NOT: call vec.into_iter().map(|e| unsafe { std::mem::transmute(e) }).collect() } @@ -69,6 +98,9 @@ pub fn vec_iterator_cast_aggregate(vec: Vec<[u64; 4]>) -> Vec<Foo> { #[no_mangle] pub fn vec_iterator_cast_deaggregate_tra(vec: Vec<Bar>) -> Vec<[u64; 4]> { // CHECK-NOT: loop + // CHECK: call + // CHECK-SAME: void @llvm.assume(i1 %{{.+}}) + // CHECK-NOT: loop // CHECK-NOT: call // Safety: For the purpose of this test we assume that Bar layout matches [u64; 4]. @@ -82,6 +114,9 @@ pub fn vec_iterator_cast_deaggregate_tra(vec: Vec<Bar>) -> Vec<[u64; 4]> { #[no_mangle] pub fn vec_iterator_cast_deaggregate_fold(vec: Vec<Baz>) -> Vec<[u64; 4]> { // CHECK-NOT: loop + // CHECK: call + // CHECK-SAME: void @llvm.assume(i1 %{{.+}}) + // CHECK-NOT: loop // CHECK-NOT: call // Safety: For the purpose of this test we assume that Bar layout matches [u64; 4]. @@ -95,6 +130,11 @@ pub fn vec_iterator_cast_deaggregate_fold(vec: Vec<Baz>) -> Vec<[u64; 4]> { #[no_mangle] pub fn vec_iterator_cast_unwrap_drop(vec: Vec<Wrapper<String>>) -> Vec<String> { // CHECK-NOT: br i1 %{{.*}}, label %{{.*}}, label %{{.*}} + // CHECK-NOT: %{{.*}} = mul + // CHECK-NOT: %{{.*}} = udiv + // CHECK: call + // CHECK-SAME: void @llvm.assume(i1 %{{.+}}) + // CHECK-NOT: br i1 %{{.*}}, label %{{.*}}, label %{{.*}} // CHECK-NOT: call // CHECK-NOT: %{{.*}} = mul // CHECK-NOT: %{{.*}} = udiv @@ -106,9 +146,15 @@ pub fn vec_iterator_cast_unwrap_drop(vec: Vec<Wrapper<String>>) -> Vec<String> { #[no_mangle] pub fn vec_iterator_cast_wrap_drop(vec: Vec<String>) -> Vec<Wrapper<String>> { // CHECK-NOT: br i1 %{{.*}}, label %{{.*}}, label %{{.*}} + // CHECK-NOT: %{{.*}} = mul + // CHECK-NOT: %{{.*}} = udiv + // CHECK: call + // CHECK-SAME: void @llvm.assume(i1 %{{.+}}) + // CHECK-NOT: br i1 %{{.*}}, label %{{.*}}, label %{{.*}} // CHECK-NOT: call // CHECK-NOT: %{{.*}} = mul // CHECK-NOT: %{{.*}} = udiv + // CHECK: ret void vec.into_iter().map(Wrapper).collect() } diff --git a/tests/codegen/vec_pop_push_noop.rs b/tests/codegen/vec_pop_push_noop.rs index 4d76c24a9d9..a8ad5b6f1a3 100644 --- a/tests/codegen/vec_pop_push_noop.rs +++ b/tests/codegen/vec_pop_push_noop.rs @@ -1,3 +1,6 @@ +//@ revisions: llvm-pre-19 llvm-19 +//@ [llvm-19] min-llvm-version: 19 +//@ [llvm-pre-19] max-llvm-major-version: 18 //@ compile-flags: -O #![crate_type = "lib"] @@ -9,8 +12,11 @@ pub fn noop(v: &mut Vec<u8>) { // CHECK-NOT: call // CHECK: tail call void @llvm.assume // CHECK-NOT: grow_one + // llvm-pre-19: call + // llvm-pre-19-same: void @llvm.assume + // llvm-pre-19-NOT: grow_one // CHECK-NOT: call - // CHECK: ret + // CHECK: {{ret|[}]}} if let Some(x) = v.pop() { v.push(x) } |