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-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-abort.diff8
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-unwind.diff8
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-abort.mir5
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-unwind.mir5
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff8
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff8
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-abort.mir5
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-unwind.mir5
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff8
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff8
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-abort.mir5
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-unwind.mir5
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff8
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-unwind.diff8
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-abort.mir5
-rw-r--r--tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir5
-rw-r--r--tests/mir-opt/lower_intrinsics.rs5
-rw-r--r--tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-abort.diff112
-rw-r--r--tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-unwind.diff112
-rw-r--r--tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir35
-rw-r--r--tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-abort.mir63
-rw-r--r--tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-unwind.mir63
22 files changed, 327 insertions, 167 deletions
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-abort.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-abort.diff
index 1ed65b310ac..1ab1d01e5fa 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-abort.diff
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-abort.diff
@@ -21,12 +21,12 @@
           StorageLive(_4);
           _4 = _2;
 -         _0 = core::num::<impl u64>::unchecked_shl(move _3, move _4) -> [return: bb1, unwind unreachable];
+-     }
+- 
+-     bb1: {
 +         StorageLive(_5);
 +         _5 = _4 as u64 (IntToInt);
-+         _0 = unchecked_shl::<u64>(_3, move _5) -> [return: bb1, unwind unreachable];
-      }
-  
-      bb1: {
++         _0 = ShlUnchecked(_3, move _5);
 +         StorageDead(_5);
           StorageDead(_4);
           StorageDead(_3);
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-unwind.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-unwind.diff
index 7a27675638b..577fc8bee66 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-unwind.diff
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-unwind.diff
@@ -21,12 +21,12 @@
           StorageLive(_4);
           _4 = _2;
 -         _0 = core::num::<impl u64>::unchecked_shl(move _3, move _4) -> bb1;
+-     }
+- 
+-     bb1: {
 +         StorageLive(_5);
 +         _5 = _4 as u64 (IntToInt);
-+         _0 = unchecked_shl::<u64>(_3, move _5) -> [return: bb1, unwind unreachable];
-      }
-  
-      bb1: {
++         _0 = ShlUnchecked(_3, move _5);
 +         StorageDead(_5);
           StorageDead(_4);
           StorageDead(_3);
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-abort.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-abort.mir
index eee56b9560d..65b832497f9 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-abort.mir
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-abort.mir
@@ -15,10 +15,7 @@ fn unchecked_shl_unsigned_bigger(_1: u64, _2: u32) -> u64 {
     bb0: {
         StorageLive(_3);
         _3 = _2 as u64 (IntToInt);
-        _0 = unchecked_shl::<u64>(_1, move _3) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _0 = ShlUnchecked(_1, move _3);
         StorageDead(_3);
         return;
     }
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-unwind.mir
index eee56b9560d..65b832497f9 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-unwind.mir
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-unwind.mir
@@ -15,10 +15,7 @@ fn unchecked_shl_unsigned_bigger(_1: u64, _2: u32) -> u64 {
     bb0: {
         StorageLive(_3);
         _3 = _2 as u64 (IntToInt);
-        _0 = unchecked_shl::<u64>(_1, move _3) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _0 = ShlUnchecked(_1, move _3);
         StorageDead(_3);
         return;
     }
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff
index 6c809f0b533..90b32247c95 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff
@@ -23,6 +23,9 @@
           StorageLive(_4);
           _4 = _2;
 -         _0 = core::num::<impl u16>::unchecked_shl(move _3, move _4) -> [return: bb1, unwind unreachable];
+-     }
+- 
+-     bb1: {
 +         StorageLive(_5);
 +         StorageLive(_6);
 +         StorageLive(_7);
@@ -32,10 +35,7 @@
 +         assume(move _6);
 +         StorageDead(_6);
 +         _5 = _4 as u16 (IntToInt);
-+         _0 = unchecked_shl::<u16>(_3, move _5) -> [return: bb1, unwind unreachable];
-      }
-  
-      bb1: {
++         _0 = ShlUnchecked(_3, move _5);
 +         StorageDead(_5);
           StorageDead(_4);
           StorageDead(_3);
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff
index 0753c1b05df..ba159c063b3 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff
@@ -23,6 +23,9 @@
           StorageLive(_4);
           _4 = _2;
 -         _0 = core::num::<impl u16>::unchecked_shl(move _3, move _4) -> bb1;
+-     }
+- 
+-     bb1: {
 +         StorageLive(_5);
 +         StorageLive(_6);
 +         StorageLive(_7);
@@ -32,10 +35,7 @@
 +         assume(move _6);
 +         StorageDead(_6);
 +         _5 = _4 as u16 (IntToInt);
-+         _0 = unchecked_shl::<u16>(_3, move _5) -> [return: bb1, unwind unreachable];
-      }
-  
-      bb1: {
++         _0 = ShlUnchecked(_3, move _5);
 +         StorageDead(_5);
           StorageDead(_4);
           StorageDead(_3);
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-abort.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-abort.mir
index 7bf10b365a6..3f388a69d7e 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-abort.mir
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-abort.mir
@@ -24,10 +24,7 @@ fn unchecked_shl_unsigned_smaller(_1: u16, _2: u32) -> u16 {
         assume(move _4);
         StorageDead(_4);
         _5 = _2 as u16 (IntToInt);
-        _0 = unchecked_shl::<u16>(_1, move _5) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _0 = ShlUnchecked(_1, move _5);
         StorageDead(_5);
         return;
     }
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-unwind.mir
index 7bf10b365a6..3f388a69d7e 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-unwind.mir
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-unwind.mir
@@ -24,10 +24,7 @@ fn unchecked_shl_unsigned_smaller(_1: u16, _2: u32) -> u16 {
         assume(move _4);
         StorageDead(_4);
         _5 = _2 as u16 (IntToInt);
-        _0 = unchecked_shl::<u16>(_1, move _5) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _0 = ShlUnchecked(_1, move _5);
         StorageDead(_5);
         return;
     }
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff
index 04ddb4e80ff..1e83fec4f3d 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff
@@ -21,12 +21,12 @@
           StorageLive(_4);
           _4 = _2;
 -         _0 = core::num::<impl i64>::unchecked_shr(move _3, move _4) -> [return: bb1, unwind unreachable];
+-     }
+- 
+-     bb1: {
 +         StorageLive(_5);
 +         _5 = _4 as i64 (IntToInt);
-+         _0 = unchecked_shr::<i64>(_3, move _5) -> [return: bb1, unwind unreachable];
-      }
-  
-      bb1: {
++         _0 = ShrUnchecked(_3, move _5);
 +         StorageDead(_5);
           StorageDead(_4);
           StorageDead(_3);
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff
index 762aa1564b5..d7ff104b92e 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff
@@ -21,12 +21,12 @@
           StorageLive(_4);
           _4 = _2;
 -         _0 = core::num::<impl i64>::unchecked_shr(move _3, move _4) -> bb1;
+-     }
+- 
+-     bb1: {
 +         StorageLive(_5);
 +         _5 = _4 as i64 (IntToInt);
-+         _0 = unchecked_shr::<i64>(_3, move _5) -> [return: bb1, unwind unreachable];
-      }
-  
-      bb1: {
++         _0 = ShrUnchecked(_3, move _5);
 +         StorageDead(_5);
           StorageDead(_4);
           StorageDead(_3);
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-abort.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-abort.mir
index 858760d065c..7524ec4970e 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-abort.mir
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-abort.mir
@@ -15,10 +15,7 @@ fn unchecked_shr_signed_bigger(_1: i64, _2: u32) -> i64 {
     bb0: {
         StorageLive(_3);
         _3 = _2 as i64 (IntToInt);
-        _0 = unchecked_shr::<i64>(_1, move _3) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _0 = ShrUnchecked(_1, move _3);
         StorageDead(_3);
         return;
     }
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-unwind.mir
index 858760d065c..7524ec4970e 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-unwind.mir
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-unwind.mir
@@ -15,10 +15,7 @@ fn unchecked_shr_signed_bigger(_1: i64, _2: u32) -> i64 {
     bb0: {
         StorageLive(_3);
         _3 = _2 as i64 (IntToInt);
-        _0 = unchecked_shr::<i64>(_1, move _3) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _0 = ShrUnchecked(_1, move _3);
         StorageDead(_3);
         return;
     }
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff
index 5739336cb4f..fa7e5d16e39 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff
@@ -23,6 +23,9 @@
           StorageLive(_4);
           _4 = _2;
 -         _0 = core::num::<impl i16>::unchecked_shr(move _3, move _4) -> [return: bb1, unwind unreachable];
+-     }
+- 
+-     bb1: {
 +         StorageLive(_5);
 +         StorageLive(_6);
 +         StorageLive(_7);
@@ -32,10 +35,7 @@
 +         assume(move _6);
 +         StorageDead(_6);
 +         _5 = _4 as i16 (IntToInt);
-+         _0 = unchecked_shr::<i16>(_3, move _5) -> [return: bb1, unwind unreachable];
-      }
-  
-      bb1: {
++         _0 = ShrUnchecked(_3, move _5);
 +         StorageDead(_5);
           StorageDead(_4);
           StorageDead(_3);
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-unwind.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-unwind.diff
index e04912e1d1c..3d398e00fc8 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-unwind.diff
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-unwind.diff
@@ -23,6 +23,9 @@
           StorageLive(_4);
           _4 = _2;
 -         _0 = core::num::<impl i16>::unchecked_shr(move _3, move _4) -> bb1;
+-     }
+- 
+-     bb1: {
 +         StorageLive(_5);
 +         StorageLive(_6);
 +         StorageLive(_7);
@@ -32,10 +35,7 @@
 +         assume(move _6);
 +         StorageDead(_6);
 +         _5 = _4 as i16 (IntToInt);
-+         _0 = unchecked_shr::<i16>(_3, move _5) -> [return: bb1, unwind unreachable];
-      }
-  
-      bb1: {
++         _0 = ShrUnchecked(_3, move _5);
 +         StorageDead(_5);
           StorageDead(_4);
           StorageDead(_3);
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-abort.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-abort.mir
index 08b044f4f9e..64ea25349ac 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-abort.mir
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-abort.mir
@@ -24,10 +24,7 @@ fn unchecked_shr_signed_smaller(_1: i16, _2: u32) -> i16 {
         assume(move _4);
         StorageDead(_4);
         _5 = _2 as i16 (IntToInt);
-        _0 = unchecked_shr::<i16>(_1, move _5) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _0 = ShrUnchecked(_1, move _5);
         StorageDead(_5);
         return;
     }
diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir
index 08b044f4f9e..64ea25349ac 100644
--- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir
+++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir
@@ -24,10 +24,7 @@ fn unchecked_shr_signed_smaller(_1: i16, _2: u32) -> i16 {
         assume(move _4);
         StorageDead(_4);
         _5 = _2 as i16 (IntToInt);
-        _0 = unchecked_shr::<i16>(_1, move _5) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _0 = ShrUnchecked(_1, move _5);
         StorageDead(_5);
         return;
     }
diff --git a/tests/mir-opt/lower_intrinsics.rs b/tests/mir-opt/lower_intrinsics.rs
index 876b4497034..0758e9b775b 100644
--- a/tests/mir-opt/lower_intrinsics.rs
+++ b/tests/mir-opt/lower_intrinsics.rs
@@ -13,8 +13,13 @@ pub fn wrapping(a: i32, b: i32) {
 
 // EMIT_MIR lower_intrinsics.unchecked.LowerIntrinsics.diff
 pub unsafe fn unchecked(a: i32, b: i32) {
+    let _a = core::intrinsics::unchecked_add(a, b);
+    let _b = core::intrinsics::unchecked_sub(a, b);
+    let _c = core::intrinsics::unchecked_mul(a, b);
     let _x = core::intrinsics::unchecked_div(a, b);
     let _y = core::intrinsics::unchecked_rem(a, b);
+    let _i = core::intrinsics::unchecked_shl(a, b);
+    let _j = core::intrinsics::unchecked_shr(a, b);
 }
 
 // EMIT_MIR lower_intrinsics.size_of.LowerIntrinsics.diff
diff --git a/tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-abort.diff b/tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-abort.diff
index c532d74ced0..dd92b8d6d2c 100644
--- a/tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-abort.diff
+++ b/tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-abort.diff
@@ -10,11 +10,41 @@
       let mut _5: i32;
       let mut _7: i32;
       let mut _8: i32;
+      let mut _10: i32;
+      let mut _11: i32;
+      let mut _13: i32;
+      let mut _14: i32;
+      let mut _16: i32;
+      let mut _17: i32;
+      let mut _19: i32;
+      let mut _20: i32;
+      let mut _22: i32;
+      let mut _23: i32;
       scope 1 {
-          debug _x => _3;
+          debug _a => _3;
           let _6: i32;
           scope 2 {
-              debug _y => _6;
+              debug _b => _6;
+              let _9: i32;
+              scope 3 {
+                  debug _c => _9;
+                  let _12: i32;
+                  scope 4 {
+                      debug _x => _12;
+                      let _15: i32;
+                      scope 5 {
+                          debug _y => _15;
+                          let _18: i32;
+                          scope 6 {
+                              debug _i => _18;
+                              let _21: i32;
+                              scope 7 {
+                                  debug _j => _21;
+                              }
+                          }
+                      }
+                  }
+              }
           }
       }
   
@@ -24,8 +54,8 @@
           _4 = _1;
           StorageLive(_5);
           _5 = _2;
--         _3 = unchecked_div::<i32>(move _4, move _5) -> [return: bb1, unwind unreachable];
-+         _3 = Div(move _4, move _5);
+-         _3 = unchecked_add::<i32>(move _4, move _5) -> [return: bb1, unwind unreachable];
++         _3 = AddUnchecked(move _4, move _5);
 +         goto -> bb1;
       }
   
@@ -37,15 +67,85 @@
           _7 = _1;
           StorageLive(_8);
           _8 = _2;
--         _6 = unchecked_rem::<i32>(move _7, move _8) -> [return: bb2, unwind unreachable];
-+         _6 = Rem(move _7, move _8);
+-         _6 = unchecked_sub::<i32>(move _7, move _8) -> [return: bb2, unwind unreachable];
++         _6 = SubUnchecked(move _7, move _8);
 +         goto -> bb2;
       }
   
       bb2: {
           StorageDead(_8);
           StorageDead(_7);
+          StorageLive(_9);
+          StorageLive(_10);
+          _10 = _1;
+          StorageLive(_11);
+          _11 = _2;
+-         _9 = unchecked_mul::<i32>(move _10, move _11) -> [return: bb3, unwind unreachable];
++         _9 = MulUnchecked(move _10, move _11);
++         goto -> bb3;
+      }
+  
+      bb3: {
+          StorageDead(_11);
+          StorageDead(_10);
+          StorageLive(_12);
+          StorageLive(_13);
+          _13 = _1;
+          StorageLive(_14);
+          _14 = _2;
+-         _12 = unchecked_div::<i32>(move _13, move _14) -> [return: bb4, unwind unreachable];
++         _12 = Div(move _13, move _14);
++         goto -> bb4;
+      }
+  
+      bb4: {
+          StorageDead(_14);
+          StorageDead(_13);
+          StorageLive(_15);
+          StorageLive(_16);
+          _16 = _1;
+          StorageLive(_17);
+          _17 = _2;
+-         _15 = unchecked_rem::<i32>(move _16, move _17) -> [return: bb5, unwind unreachable];
++         _15 = Rem(move _16, move _17);
++         goto -> bb5;
+      }
+  
+      bb5: {
+          StorageDead(_17);
+          StorageDead(_16);
+          StorageLive(_18);
+          StorageLive(_19);
+          _19 = _1;
+          StorageLive(_20);
+          _20 = _2;
+-         _18 = unchecked_shl::<i32>(move _19, move _20) -> [return: bb6, unwind unreachable];
++         _18 = ShlUnchecked(move _19, move _20);
++         goto -> bb6;
+      }
+  
+      bb6: {
+          StorageDead(_20);
+          StorageDead(_19);
+          StorageLive(_21);
+          StorageLive(_22);
+          _22 = _1;
+          StorageLive(_23);
+          _23 = _2;
+-         _21 = unchecked_shr::<i32>(move _22, move _23) -> [return: bb7, unwind unreachable];
++         _21 = ShrUnchecked(move _22, move _23);
++         goto -> bb7;
+      }
+  
+      bb7: {
+          StorageDead(_23);
+          StorageDead(_22);
           _0 = const ();
+          StorageDead(_21);
+          StorageDead(_18);
+          StorageDead(_15);
+          StorageDead(_12);
+          StorageDead(_9);
           StorageDead(_6);
           StorageDead(_3);
           return;
diff --git a/tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-unwind.diff b/tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-unwind.diff
index c532d74ced0..dd92b8d6d2c 100644
--- a/tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-unwind.diff
+++ b/tests/mir-opt/lower_intrinsics.unchecked.LowerIntrinsics.panic-unwind.diff
@@ -10,11 +10,41 @@
       let mut _5: i32;
       let mut _7: i32;
       let mut _8: i32;
+      let mut _10: i32;
+      let mut _11: i32;
+      let mut _13: i32;
+      let mut _14: i32;
+      let mut _16: i32;
+      let mut _17: i32;
+      let mut _19: i32;
+      let mut _20: i32;
+      let mut _22: i32;
+      let mut _23: i32;
       scope 1 {
-          debug _x => _3;
+          debug _a => _3;
           let _6: i32;
           scope 2 {
-              debug _y => _6;
+              debug _b => _6;
+              let _9: i32;
+              scope 3 {
+                  debug _c => _9;
+                  let _12: i32;
+                  scope 4 {
+                      debug _x => _12;
+                      let _15: i32;
+                      scope 5 {
+                          debug _y => _15;
+                          let _18: i32;
+                          scope 6 {
+                              debug _i => _18;
+                              let _21: i32;
+                              scope 7 {
+                                  debug _j => _21;
+                              }
+                          }
+                      }
+                  }
+              }
           }
       }
   
@@ -24,8 +54,8 @@
           _4 = _1;
           StorageLive(_5);
           _5 = _2;
--         _3 = unchecked_div::<i32>(move _4, move _5) -> [return: bb1, unwind unreachable];
-+         _3 = Div(move _4, move _5);
+-         _3 = unchecked_add::<i32>(move _4, move _5) -> [return: bb1, unwind unreachable];
++         _3 = AddUnchecked(move _4, move _5);
 +         goto -> bb1;
       }
   
@@ -37,15 +67,85 @@
           _7 = _1;
           StorageLive(_8);
           _8 = _2;
--         _6 = unchecked_rem::<i32>(move _7, move _8) -> [return: bb2, unwind unreachable];
-+         _6 = Rem(move _7, move _8);
+-         _6 = unchecked_sub::<i32>(move _7, move _8) -> [return: bb2, unwind unreachable];
++         _6 = SubUnchecked(move _7, move _8);
 +         goto -> bb2;
       }
   
       bb2: {
           StorageDead(_8);
           StorageDead(_7);
+          StorageLive(_9);
+          StorageLive(_10);
+          _10 = _1;
+          StorageLive(_11);
+          _11 = _2;
+-         _9 = unchecked_mul::<i32>(move _10, move _11) -> [return: bb3, unwind unreachable];
++         _9 = MulUnchecked(move _10, move _11);
++         goto -> bb3;
+      }
+  
+      bb3: {
+          StorageDead(_11);
+          StorageDead(_10);
+          StorageLive(_12);
+          StorageLive(_13);
+          _13 = _1;
+          StorageLive(_14);
+          _14 = _2;
+-         _12 = unchecked_div::<i32>(move _13, move _14) -> [return: bb4, unwind unreachable];
++         _12 = Div(move _13, move _14);
++         goto -> bb4;
+      }
+  
+      bb4: {
+          StorageDead(_14);
+          StorageDead(_13);
+          StorageLive(_15);
+          StorageLive(_16);
+          _16 = _1;
+          StorageLive(_17);
+          _17 = _2;
+-         _15 = unchecked_rem::<i32>(move _16, move _17) -> [return: bb5, unwind unreachable];
++         _15 = Rem(move _16, move _17);
++         goto -> bb5;
+      }
+  
+      bb5: {
+          StorageDead(_17);
+          StorageDead(_16);
+          StorageLive(_18);
+          StorageLive(_19);
+          _19 = _1;
+          StorageLive(_20);
+          _20 = _2;
+-         _18 = unchecked_shl::<i32>(move _19, move _20) -> [return: bb6, unwind unreachable];
++         _18 = ShlUnchecked(move _19, move _20);
++         goto -> bb6;
+      }
+  
+      bb6: {
+          StorageDead(_20);
+          StorageDead(_19);
+          StorageLive(_21);
+          StorageLive(_22);
+          _22 = _1;
+          StorageLive(_23);
+          _23 = _2;
+-         _21 = unchecked_shr::<i32>(move _22, move _23) -> [return: bb7, unwind unreachable];
++         _21 = ShrUnchecked(move _22, move _23);
++         goto -> bb7;
+      }
+  
+      bb7: {
+          StorageDead(_23);
+          StorageDead(_22);
           _0 = const ();
+          StorageDead(_21);
+          StorageDead(_18);
+          StorageDead(_15);
+          StorageDead(_12);
+          StorageDead(_9);
           StorageDead(_6);
           StorageDead(_3);
           return;
diff --git a/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir b/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir
index 1a7d5433e35..800308c2e0b 100644
--- a/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir
+++ b/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir
@@ -7,10 +7,9 @@ fn checked_shl(_1: u32, _2: u32) -> Option<u32> {
     scope 1 (inlined core::num::<impl u32>::checked_shl) {
         debug self => _1;
         debug rhs => _2;
-        let mut _7: u32;
-        let mut _8: bool;
+        let mut _7: bool;
         scope 2 {
-            debug a => _7;
+            debug a => _5;
             debug b => _6;
         }
         scope 3 (inlined core::num::<impl u32>::overflowing_shl) {
@@ -36,44 +35,38 @@ fn checked_shl(_1: u32, _2: u32) -> Option<u32> {
     }
 
     bb0: {
-        StorageLive(_6);
-        StorageLive(_7);
         StorageLive(_5);
+        StorageLive(_6);
         StorageLive(_4);
         StorageLive(_3);
         _3 = const 31_u32;
         _4 = BitAnd(_2, move _3);
         StorageDead(_3);
-        _5 = unchecked_shl::<u32>(_1, _4) -> [return: bb1, unwind unreachable];
+        _5 = ShlUnchecked(_1, _4);
+        StorageDead(_4);
+        _6 = Ge(_2, const _);
+        StorageLive(_7);
+        _7 = unlikely(_6) -> [return: bb1, unwind unreachable];
     }
 
     bb1: {
-        StorageDead(_4);
-        _6 = Ge(_2, const _);
-        _7 = move _5;
-        StorageDead(_5);
-        StorageLive(_8);
-        _8 = unlikely(_6) -> [return: bb2, unwind unreachable];
+        switchInt(move _7) -> [0: bb2, otherwise: bb3];
     }
 
     bb2: {
-        switchInt(move _8) -> [0: bb3, otherwise: bb4];
+        _0 = Option::<u32>::Some(_5);
+        goto -> bb4;
     }
 
     bb3: {
-        _0 = Option::<u32>::Some(_7);
-        goto -> bb5;
-    }
-
-    bb4: {
         _0 = Option::<u32>::None;
-        goto -> bb5;
+        goto -> bb4;
     }
 
-    bb5: {
-        StorageDead(_8);
+    bb4: {
         StorageDead(_7);
         StorageDead(_6);
+        StorageDead(_5);
         return;
     }
 }
diff --git a/tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-abort.mir b/tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-abort.mir
index 79282d88905..9d914e95344 100644
--- a/tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-abort.mir
+++ b/tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-abort.mir
@@ -10,18 +10,17 @@ fn slice_get_unchecked_mut_range(_1: &mut [u32], _2: std::ops::Range<usize>) ->
         debug self => _1;
         debug index => std::ops::Range<usize>{ .0 => _3, .1 => _4, };
         let mut _5: *mut [u32];
-        let mut _14: *mut [u32];
+        let mut _13: *mut [u32];
         scope 2 {
             scope 3 (inlined <std::ops::Range<usize> as SliceIndex<[u32]>>::get_unchecked_mut) {
                 debug self => std::ops::Range<usize>{ .0 => _3, .1 => _4, };
                 debug slice => _5;
                 let mut _7: *mut u32;
                 let mut _8: *mut u32;
-                let mut _9: usize;
+                let _15: usize;
                 let _16: usize;
-                let _17: usize;
                 scope 4 {
-                    debug this => std::ops::Range<usize>{ .0 => _16, .1 => _17, };
+                    debug this => std::ops::Range<usize>{ .0 => _15, .1 => _16, };
                     scope 5 {
                         let _6: usize;
                         scope 6 {
@@ -37,30 +36,30 @@ fn slice_get_unchecked_mut_range(_1: &mut [u32], _2: std::ops::Range<usize>) ->
                             }
                             scope 14 (inlined slice_from_raw_parts_mut::<u32>) {
                                 debug data => _8;
-                                debug len => _9;
-                                let mut _10: *mut ();
+                                debug len => _6;
+                                let mut _9: *mut ();
                                 scope 15 (inlined ptr::mut_ptr::<impl *mut u32>::cast::<()>) {
                                     debug self => _8;
                                 }
                                 scope 16 (inlined std::ptr::from_raw_parts_mut::<[u32]>) {
-                                    debug data_address => _10;
-                                    debug metadata => _9;
-                                    let mut _11: *const ();
-                                    let mut _12: std::ptr::metadata::PtrComponents<[u32]>;
-                                    let mut _13: std::ptr::metadata::PtrRepr<[u32]>;
+                                    debug data_address => _9;
+                                    debug metadata => _6;
+                                    let mut _10: *const ();
+                                    let mut _11: std::ptr::metadata::PtrComponents<[u32]>;
+                                    let mut _12: std::ptr::metadata::PtrRepr<[u32]>;
                                     scope 17 {
                                     }
                                 }
                             }
                         }
                         scope 7 (inlined <std::ops::Range<usize> as SliceIndex<[T]>>::get_unchecked_mut::runtime::<u32>) {
-                            debug this => std::ops::Range<usize>{ .0 => _16, .1 => _17, };
+                            debug this => std::ops::Range<usize>{ .0 => _15, .1 => _16, };
                             debug slice => _5;
                             scope 8 (inlined ptr::mut_ptr::<impl *mut [u32]>::len) {
                                 debug self => _5;
-                                let mut _15: *const [u32];
+                                let mut _14: *const [u32];
                                 scope 9 (inlined std::ptr::metadata::<[u32]>) {
-                                    debug ptr => _15;
+                                    debug ptr => _14;
                                     scope 10 {
                                     }
                                 }
@@ -75,46 +74,40 @@ fn slice_get_unchecked_mut_range(_1: &mut [u32], _2: std::ops::Range<usize>) ->
     bb0: {
         _3 = move (_2.0: usize);
         _4 = move (_2.1: usize);
-        StorageLive(_14);
+        StorageLive(_13);
         StorageLive(_5);
         _5 = &raw mut (*_1);
+        StorageLive(_6);
+        StorageLive(_14);
         StorageLive(_15);
         StorageLive(_16);
-        StorageLive(_17);
-        StorageLive(_6);
-        _6 = unchecked_sub::<usize>(_4, _3) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _6 = SubUnchecked(_4, _3);
         StorageLive(_8);
         StorageLive(_7);
         _7 = _5 as *mut u32 (PtrToPtr);
         _8 = Offset(_7, _3);
         StorageDead(_7);
         StorageLive(_9);
-        _9 = _6;
-        StorageLive(_10);
-        _10 = _8 as *mut () (PtrToPtr);
-        StorageLive(_13);
+        _9 = _8 as *mut () (PtrToPtr);
         StorageLive(_12);
         StorageLive(_11);
-        _11 = _10 as *const () (Pointer(MutToConstPointer));
-        _12 = ptr::metadata::PtrComponents::<[u32]> { data_address: move _11, metadata: _9 };
+        StorageLive(_10);
+        _10 = _9 as *const () (Pointer(MutToConstPointer));
+        _11 = ptr::metadata::PtrComponents::<[u32]> { data_address: move _10, metadata: _6 };
+        StorageDead(_10);
+        _12 = ptr::metadata::PtrRepr::<[u32]> { const_ptr: move _11 };
         StorageDead(_11);
-        _13 = ptr::metadata::PtrRepr::<[u32]> { const_ptr: move _12 };
+        _13 = (_12.1: *mut [u32]);
         StorageDead(_12);
-        _14 = (_13.1: *mut [u32]);
-        StorageDead(_13);
-        StorageDead(_10);
         StorageDead(_9);
         StorageDead(_8);
-        StorageDead(_6);
-        StorageDead(_17);
         StorageDead(_16);
         StorageDead(_15);
-        StorageDead(_5);
-        _0 = &mut (*_14);
         StorageDead(_14);
+        StorageDead(_6);
+        StorageDead(_5);
+        _0 = &mut (*_13);
+        StorageDead(_13);
         return;
     }
 }
diff --git a/tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-unwind.mir
index 79282d88905..9d914e95344 100644
--- a/tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-unwind.mir
+++ b/tests/mir-opt/pre-codegen/slice_index.slice_get_unchecked_mut_range.PreCodegen.after.panic-unwind.mir
@@ -10,18 +10,17 @@ fn slice_get_unchecked_mut_range(_1: &mut [u32], _2: std::ops::Range<usize>) ->
         debug self => _1;
         debug index => std::ops::Range<usize>{ .0 => _3, .1 => _4, };
         let mut _5: *mut [u32];
-        let mut _14: *mut [u32];
+        let mut _13: *mut [u32];
         scope 2 {
             scope 3 (inlined <std::ops::Range<usize> as SliceIndex<[u32]>>::get_unchecked_mut) {
                 debug self => std::ops::Range<usize>{ .0 => _3, .1 => _4, };
                 debug slice => _5;
                 let mut _7: *mut u32;
                 let mut _8: *mut u32;
-                let mut _9: usize;
+                let _15: usize;
                 let _16: usize;
-                let _17: usize;
                 scope 4 {
-                    debug this => std::ops::Range<usize>{ .0 => _16, .1 => _17, };
+                    debug this => std::ops::Range<usize>{ .0 => _15, .1 => _16, };
                     scope 5 {
                         let _6: usize;
                         scope 6 {
@@ -37,30 +36,30 @@ fn slice_get_unchecked_mut_range(_1: &mut [u32], _2: std::ops::Range<usize>) ->
                             }
                             scope 14 (inlined slice_from_raw_parts_mut::<u32>) {
                                 debug data => _8;
-                                debug len => _9;
-                                let mut _10: *mut ();
+                                debug len => _6;
+                                let mut _9: *mut ();
                                 scope 15 (inlined ptr::mut_ptr::<impl *mut u32>::cast::<()>) {
                                     debug self => _8;
                                 }
                                 scope 16 (inlined std::ptr::from_raw_parts_mut::<[u32]>) {
-                                    debug data_address => _10;
-                                    debug metadata => _9;
-                                    let mut _11: *const ();
-                                    let mut _12: std::ptr::metadata::PtrComponents<[u32]>;
-                                    let mut _13: std::ptr::metadata::PtrRepr<[u32]>;
+                                    debug data_address => _9;
+                                    debug metadata => _6;
+                                    let mut _10: *const ();
+                                    let mut _11: std::ptr::metadata::PtrComponents<[u32]>;
+                                    let mut _12: std::ptr::metadata::PtrRepr<[u32]>;
                                     scope 17 {
                                     }
                                 }
                             }
                         }
                         scope 7 (inlined <std::ops::Range<usize> as SliceIndex<[T]>>::get_unchecked_mut::runtime::<u32>) {
-                            debug this => std::ops::Range<usize>{ .0 => _16, .1 => _17, };
+                            debug this => std::ops::Range<usize>{ .0 => _15, .1 => _16, };
                             debug slice => _5;
                             scope 8 (inlined ptr::mut_ptr::<impl *mut [u32]>::len) {
                                 debug self => _5;
-                                let mut _15: *const [u32];
+                                let mut _14: *const [u32];
                                 scope 9 (inlined std::ptr::metadata::<[u32]>) {
-                                    debug ptr => _15;
+                                    debug ptr => _14;
                                     scope 10 {
                                     }
                                 }
@@ -75,46 +74,40 @@ fn slice_get_unchecked_mut_range(_1: &mut [u32], _2: std::ops::Range<usize>) ->
     bb0: {
         _3 = move (_2.0: usize);
         _4 = move (_2.1: usize);
-        StorageLive(_14);
+        StorageLive(_13);
         StorageLive(_5);
         _5 = &raw mut (*_1);
+        StorageLive(_6);
+        StorageLive(_14);
         StorageLive(_15);
         StorageLive(_16);
-        StorageLive(_17);
-        StorageLive(_6);
-        _6 = unchecked_sub::<usize>(_4, _3) -> [return: bb1, unwind unreachable];
-    }
-
-    bb1: {
+        _6 = SubUnchecked(_4, _3);
         StorageLive(_8);
         StorageLive(_7);
         _7 = _5 as *mut u32 (PtrToPtr);
         _8 = Offset(_7, _3);
         StorageDead(_7);
         StorageLive(_9);
-        _9 = _6;
-        StorageLive(_10);
-        _10 = _8 as *mut () (PtrToPtr);
-        StorageLive(_13);
+        _9 = _8 as *mut () (PtrToPtr);
         StorageLive(_12);
         StorageLive(_11);
-        _11 = _10 as *const () (Pointer(MutToConstPointer));
-        _12 = ptr::metadata::PtrComponents::<[u32]> { data_address: move _11, metadata: _9 };
+        StorageLive(_10);
+        _10 = _9 as *const () (Pointer(MutToConstPointer));
+        _11 = ptr::metadata::PtrComponents::<[u32]> { data_address: move _10, metadata: _6 };
+        StorageDead(_10);
+        _12 = ptr::metadata::PtrRepr::<[u32]> { const_ptr: move _11 };
         StorageDead(_11);
-        _13 = ptr::metadata::PtrRepr::<[u32]> { const_ptr: move _12 };
+        _13 = (_12.1: *mut [u32]);
         StorageDead(_12);
-        _14 = (_13.1: *mut [u32]);
-        StorageDead(_13);
-        StorageDead(_10);
         StorageDead(_9);
         StorageDead(_8);
-        StorageDead(_6);
-        StorageDead(_17);
         StorageDead(_16);
         StorageDead(_15);
-        StorageDead(_5);
-        _0 = &mut (*_14);
         StorageDead(_14);
+        StorageDead(_6);
+        StorageDead(_5);
+        _0 = &mut (*_13);
+        StorageDead(_13);
         return;
     }
 }