about summary refs log tree commit diff
path: root/compiler/rustc_codegen_cranelift
AgeCommit message (Collapse)AuthorLines
2023-09-15clarify PassMode::Indirect as wellRalf Jung-15/+15
2023-09-14don't point at const usage site for resolution-time errorsRalf Jung-16/+9
also share the code that emits the actual error
2023-09-14move required_consts check to general post-mono-check functionRalf Jung-37/+24
2023-09-14make it more clear which functions create fresh AllocIdRalf Jung-13/+11
2023-09-14cleanup op_to_const a bit; rename ConstValue::ByRef → IndirectRalf Jung-3/+3
2023-09-14use AllocId instead of Allocation in ConstValue::ByRefRalf Jung-6/+11
2023-09-13Rollup merge of #115798 - RalfJung:non_1zst_field, r=wesleywiserMatthias Krüger-13/+6
add helper method for finding the one non-1-ZST field
2023-09-13Rollup merge of #115736 - Zoxc:time-cleanup, r=wesleywiserMatthias Krüger-26/+15
Remove `verbose_generic_activity_with_arg` This removes `verbose_generic_activity_with_arg` and changes users to `generic_activity_with_arg`. This keeps the output of `-Z time` readable while these repeated events are still available with the self profiling mechanism.
2023-09-13make the eval() functions on our const types return the resulting valueRalf Jung-31/+6
2023-09-12add helper method for finding the one non-1-ZST fieldRalf Jung-13/+6
2023-09-10Remove `verbose_generic_activity_with_arg`John Kåre Alsaker-26/+15
2023-09-08Auto merge of #115418 - Zoxc:freeze-source, r=oli-obkbors-1/+1
Use `Freeze` for `SourceFile` This uses the `Freeze` type in `SourceFile` to let accessing `external_src` and `lines` be lock-free. Behavior of `add_external_src` is changed to set `ExternalSourceKind::AbsentErr` on a hash mismatch which matches the documentation. `ExternalSourceKind::Unneeded` was removed as it's unused. Based on https://github.com/rust-lang/rust/pull/115401.
2023-09-07Use `Freeze` for `SourceFile.lines`John Kåre Alsaker-1/+1
2023-09-07Auto merge of #115616 - bjorn3:sync_cg_clif-2023-09-06, r=bjorn3bors-8/+10
Sync rustc_codegen_cranelift Not much changed this time. Mostly doing this sync to make it easier to run the entire test suite on the in-tree version. r? `@ghost` `@rustbot` label +A-codegen +A-cranelift +T-compiler
2023-09-06Auto merge of #115580 - eduardosm:stdarch-intrinsics, r=davidtwco,bjorn3bors-248/+0
Update stdarch submodule and remove special handling in cranelift codegen for some AVX and SSE2 LLVM intrinsics https://github.com/rust-lang/stdarch/pull/1463 reimplemented some x86 intrinsics to avoid using some x86-specific LLVM intrinsics: * Store unaligned (`_mm*_storeu_*`) use `<*mut _>::write_unaligned` instead of `llvm.x86.*.storeu.*`. * Shift by immediate (`_mm*_s{ll,rl,ra}i_epi*`) use `if` (srl, sll) or `min` (sra) to simulate the behaviour when the RHS is out of range. RHS is constant, so the `if`/`min` will be optimized away. This PR updates the stdarch submodule to pull these changes and removes special handling for those LLVM intrinsics from cranelift codegen. I left gcc codegen untouched because there are some autogenerated lists.
2023-09-06Merge commit 'dda103b1e33c4902deca8bccf614991ada781fa6' into ↵bjorn3-8/+10
sync_cg_clif-2023-09-06
2023-09-05Remove special handling in codegen for some AVX and SSE2 shift by immediate ↵Eduardo Sánchez Muñoz-240/+0
intrinsics Those were removed from stdarch in https://github.com/rust-lang/stdarch/pull/1463 (`simd_shl` and `simd_shr` are used instead)
2023-09-05Remove special handling in codegen for some SSE2 "storeu" intrinsicsEduardo Sánchez Muñoz-8/+0
Those were removed from stdarch in https://github.com/rust-lang/stdarch/pull/1463 (`<*mut _>::write_unaligned` is used instead)
2023-09-03Use relative positions inside a SourceFile.Camille GILLOT-5/+2
2023-08-29Rollup merge of #111580 - atsuzaki:layout-ice, r=oli-obkMatthias Krüger-1/+1
Don't ICE on layout computation failure Fixes #111176 regression. r? `@oli-obk`
2023-08-29const_eval and codegen: audit uses of is_zstRalf Jung-3/+5
2023-08-28Don't ICE on layout computation failureKatherine Philip-1/+1
2023-08-26Use `preserve_mostcc` for `extern "rust-cold"`Scott McMurray-1/+1
As experimentation in 115242 has shown looks better than `coldcc`. And *don't* use a different convention for cold on Windows, because that actually ends up making things worse. cc tracking issue 97544
2023-08-24when terminating during unwinding, show the reason whyRalf Jung-5/+6
2023-08-20give some unwind-related terminators a more clear nameRalf Jung-4/+4
2023-08-10Rollup merge of #114622 - petrochenkov:noplugin, r=oli-obkMichael Goulet-1/+1
rustc: Move `crate_types` and `stable_crate_id` from `Session` to `GlobalCtxt` Removes two pieces of mutable state. Follow up to https://github.com/rust-lang/rust/pull/114578.
2023-08-09Auto merge of #114673 - matthiaskrgr:rollup-9kroqpp, r=matthiaskrgrbors-1/+3
Rollup of 6 pull requests Successful merges: - #110435 (rustdoc-json: Add test for field ordering.) - #111891 (feat: `riscv-interrupt-{m,s}` calling conventions) - #114377 (test_get_dbpath_for_term(): handle non-utf8 paths (fix FIXME)) - #114469 (Detect method not found on arbitrary self type with different mutability) - #114587 (Convert Const to Allocation in smir) - #114670 (Don't use `type_of` to determine if item has intrinsic shim) Failed merges: - #114599 (Add impl trait declarations to SMIR) r? `@ghost` `@rustbot` modify labels: rollup
2023-08-09Merge commit '8f9ac9c22d6594cf059d8e6c71d414cc5ccd7975' into ↵bjorn3-110/+194
sync_cg_clif-2023-08-09
2023-08-09rustc: Move `crate_types` from `Session` to `GlobalCtxt`Vadim Petrochenkov-1/+1
Removes a piece of mutable state. Follow up to #114578.
2023-08-08feat: `riscv-interrupt-{m,s}` calling conventionsSeth Pellegrino-1/+3
Similar to prior support added for the mips430, avr, and x86 targets this change implements the rough equivalent of clang's [`__attribute__((interrupt))`][clang-attr] for riscv targets, enabling e.g. ```rust static mut CNT: usize = 0; pub extern "riscv-interrupt-m" fn isr_m() { unsafe { CNT += 1; } } ``` to produce highly effective assembly like: ```asm pub extern "riscv-interrupt-m" fn isr_m() { 420003a0: 1141 addi sp,sp,-16 unsafe { CNT += 1; 420003a2: c62a sw a0,12(sp) 420003a4: c42e sw a1,8(sp) 420003a6: 3fc80537 lui a0,0x3fc80 420003aa: 63c52583 lw a1,1596(a0) # 3fc8063c <_ZN12esp_riscv_rt3CNT17hcec3e3a214887d53E.0> 420003ae: 0585 addi a1,a1,1 420003b0: 62b52e23 sw a1,1596(a0) } } 420003b4: 4532 lw a0,12(sp) 420003b6: 45a2 lw a1,8(sp) 420003b8: 0141 addi sp,sp,16 420003ba: 30200073 mret ``` (disassembly via `riscv64-unknown-elf-objdump -C -S --disassemble ./esp32c3-hal/target/riscv32imc-unknown-none-elf/release/examples/gpio_interrupt`) This outcome is superior to hand-coded interrupt routines which, lacking visibility into any non-assembly body of the interrupt handler, have to be very conservative and save the [entire CPU state to the stack frame][full-frame-save]. By instead asking LLVM to only save the registers that it uses, we defer the decision to the tool with the best context: it can more accurately account for the cost of spills if it knows that every additional register used is already at the cost of an implicit spill. At the LLVM level, this is apparently [implemented by] marking every register as "[callee-save]," matching the semantics of an interrupt handler nicely (it has to leave the CPU state just as it found it after its `{m|s}ret`). This approach is not suitable for every interrupt handler, as it makes no attempt to e.g. save the state in a user-accessible stack frame. For a full discussion of those challenges and tradeoffs, please refer to [the interrupt calling conventions RFC][rfc]. Inside rustc, this implementation differs from prior art because LLVM does not expose the "all-saved" function flavor as a calling convention directly, instead preferring to use an attribute that allows for differentiating between "machine-mode" and "superivsor-mode" interrupts. Finally, some effort has been made to guide those who may not yet be aware of the differences between machine-mode and supervisor-mode interrupts as to why no `riscv-interrupt` calling convention is exposed through rustc, and similarly for why `riscv-interrupt-u` makes no appearance (as it would complicate future LLVM upgrades). [clang-attr]: https://clang.llvm.org/docs/AttributeReference.html#interrupt-risc-v [full-frame-save]: https://github.com/esp-rs/esp-riscv-rt/blob/9281af2ecffe13e40992917316f36920c26acaf3/src/lib.rs#L440-L469 [implemented by]: https://github.com/llvm/llvm-project/blob/b7fb2a3fec7c187d58a6d338ab512d9173bca987/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp#L61-L67 [callee-save]: https://github.com/llvm/llvm-project/blob/973f1fe7a8591c7af148e573491ab68cc15b6ecf/llvm/lib/Target/RISCV/RISCVCallingConv.td#L30-L37 [rfc]: https://github.com/rust-lang/rfcs/pull/3246
2023-08-07Rollup merge of #114382 - scottmcm:compare-bytes-intrinsic, r=cjgillotMatthias Krüger-0/+14
Add a new `compare_bytes` intrinsic instead of calling `memcmp` directly As discussed in #113435, this lets the backends be the place that can have the "don't call the function if n == 0" logic, if it's needed for the target. (I didn't actually *add* those checks, though, since as I understood it we didn't actually need them on known targets?) Doing this also let me make it `const` (unstable), which I don't think `extern "C" fn memcmp` can be. cc `@RalfJung` `@Amanieu`
2023-08-06Apply suggestions from code reviewscottmcm-0/+1
Co-authored-by: Ralf Jung <post@ralfj.de>
2023-08-06Add a new `compare_bytes` intrinsic instead of calling `memcmp` directlyScott McMurray-0/+13
2023-08-06Generate better function argument names in global_allocator expansionDavid Tolnay-2/+2
2023-08-04Rollup merge of #114450 - chenyukang:yukang-fix-114435, r=compiler-errorsMatthias Krüger-1/+1
Fix ICE failed to get layout for ReferencesError Fixes #114435 r? `@compiler-errors`
2023-08-05Fix ICE failed to get layout for ReferencesErroryukang-1/+1
2023-08-03Forbid old-style `simd_shuffleN` intrinsicsOli Scherer-32/+22
2023-07-22Merge commit '1eded3619d0e55d57521a259bf27a03906fdfad0' into ↵bjorn3-170/+668
sync_cg_clif-2023-07-22
2023-07-18support for mips64r6 as a target_arch valuechenx97-1/+1
2023-07-17Introduce `MonoItemData`.Nicholas Nethercote-5/+5
It replaces `(Linkage, Visibility)`, making the code nicer. Plus the next commit will add another field.
2023-07-15Auto merge of #112157 - erikdesjardins:align, r=nikicbors-8/+1
Resurrect: rustc_target: Add alignment to indirectly-passed by-value types, correcting the alignment of byval on x86 in the process. Same as #111551, which I [accidentally closed](https://github.com/rust-lang/rust/pull/111551#issuecomment-1571222612) :/ --- This resurrects PR #103830, which has sat idle for a while. Beyond #103830, this also: - fixes byval alignment for types containing vectors on Darwin (see `tests/codegen/align-byval-vector.rs`) - fixes byval alignment for overaligned types on x86 Windows (see `tests/codegen/align-byval.rs`) - fixes ABI for types with 128bit requested alignment on ARM64 Linux (see `tests/codegen/aarch64-struct-align-128.rs`) r? `@nikic` --- `@pcwalton's` original PR description is reproduced below: Commit 88e4d2c from five years ago removed support for alignment on indirectly-passed arguments because of problems with the `i686-pc-windows-msvc` target. Unfortunately, the `memcpy` optimizations I recently added to LLVM 16 depend on this to forward `memcpy`s. This commit attempts to fix the problems with `byval` parameters on that target and now correctly adds the `align` attribute. The problem is summarized in [this comment] by `@eddyb.` Briefly, 32-bit x86 has special alignment rules for `byval` parameters: for the most part, their alignment is forced to 4. This is not well-documented anywhere but in the Clang source. I looked at the logic in Clang `TargetInfo.cpp` and tried to replicate it here. The relevant methods in that file are `X86_32ABIInfo::getIndirectResult()` and `X86_32ABIInfo::getTypeStackAlignInBytes()`. The `align` parameter attribute for `byval` parameters in LLVM must match the platform ABI, or miscompilations will occur. Note that this doesn't use the approach suggested by eddyb, because I felt it was overkill to store the alignment in `on_stack` when special handling is really only needed for 32-bit x86. As a side effect, this should fix #80127, because it will make the `align` parameter attribute for `byval` parameters match the platform ABI on LLVM x86-64. [this comment]: #80822 (comment)
2023-07-14refactor(rustc_middle): Substs -> GenericArgMahdi Dibaiee-51/+63
2023-07-10cg_clif: just ignore all the unused LayoutS fieldsErik Desjardins-9/+1
2023-07-10repr(align) <= 4 should still be byvalErik Desjardins-1/+1
2023-07-10cg_clif: add has_repr_alignErik Desjardins-0/+1
2023-07-07Rename `adjustment::PointerCast` and variants using it to `PointerCoercion`Nilstrieb-9/+13
It makes it sound like the `ExprKind` and `Rvalue` are supposed to represent all pointer related casts, when in reality their just used to share a some enum variants. Make it clear there these are only coercion to make it clear why only some pointer related "casts" are in the enum.
2023-07-05Move `TyCtxt::mk_x` to `Ty::new_x` where applicableBoxy-8/+9
2023-07-05Deal with falloutBoxy-1/+0
2023-06-30Auto merge of #113116 - nnethercote:codegen-opts, r=oli-obkbors-1/+1
A mish-mash of micro-optimizations These were aimed at speeding up LLVM codegen, but ended up affecting other places as well. r? `@bjorn3`
2023-06-29Avoid unnecessary line lookup.Nicholas Nethercote-1/+1
`lookup_debug_loc` calls `SourceMap::lookup_line`, which does a binary search over the files, and then a binary search over the lines within the found file. It then calls `SourceFile::line_begin_pos`, which redoes the binary search over the lines within the found file. This commit removes the second binary search over the lines, instead getting the line starting pos directly using the result of the first binary search over the lines. (And likewise for `get_span_loc`, in the cranelift backend.)
generated by cgit-pink 1.4.1-3-g733a5 (git 2.37.1) at 2026-03-01 21:06:06 +0000