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path: root/compiler/rustc_codegen_llvm/src/asm.rs
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2023-01-22abi: add `AddressSpace` field to `Primitive::Pointer`Erik Desjardins-4/+9
...and remove it from `PointeeInfo`, which isn't meant for this. There are still various places (marked with FIXMEs) that assume all pointers have the same size and alignment. Fixing this requires parsing non-default address spaces in the data layout string, which will be done in a followup.
2023-01-17Remove double spaces after dots in commentsMaybe Waffle-1/+1
2022-12-18use &str / String literals instead of format!()Matthias Krüger-1/+1
2022-11-05Rollup merge of #103977 - TimNN:memory-effects, r=nikicMatthias Krüger-3/+3
LLVM 16: Switch to using MemoryEffects This adapts the compiler to the changes required by https://github.com/llvm/llvm-project/commit/304f1d59ca41872c094def3aee0a8689df6aa398. AFAICT, `WriteOnly` isn't used by the compiler, all `ReadNone` uses were migrated and the remaining use of `ReadOnly` is only for function parameters. To simplify the FFI, this PR uses an enum to represent `MemoryEffects` across the FFI boundary, which then gets mapped to the matching static factory method when constructing the attribute. Fixes #103961. `@rustbot` label +llvm-main r? `@nikic`
2022-11-04LLVM 16: Switch to using MemoryEffectsTim Neumann-3/+3
2022-11-04Rollup merge of #103897 - Amanieu:llvm-58384, r=davidtwcoMatthias Krüger-3/+54
asm: Work around LLVM bug on AArch64 Upstream issue: https://github.com/llvm/llvm-project/issues/58384 LLVM gets confused if we assign a 32-bit value to a 64-bit register, so pass the 32-bit register name to LLVM in that case.
2022-11-04Auto merge of #103098 - Amanieu:asm-tied-fixed, r=bjorn3bors-2/+11
asm: Match clang behavior for inlateout fixed register operands We have 2 options for representing LLVM constraints for `inlateout` operands on a fixed register (e.g. `r0`): `={r0},0` or `={r0},{r0}`. This PR changes the behavior to the latter, which matches the behavior of Clang since https://reviews.llvm.org/D87279.
2022-11-02asm: Work around LLVM bug on AArch64Amanieu d'Antras-3/+54
Upstream issue: https://github.com/llvm/llvm-project/issues/58384 LLVM gets confused if we assign a 32-bit value to a 64-bit register, so pass the 32-bit register name to LLVM in that case.
2022-10-15asm: Match clang behavior for inlateout fixed register operandsAmanieu d'Antras-2/+11
We have 2 options for representing LLVM constraints for `inlateout` operands on a fixed register (e.g. `r0`): `={r0},0` or `={r0},{r0}`. This PR changes the behavior to the latter, which matches the behavior of Clang since https://reviews.llvm.org/D87279.
2022-10-13Add links to relevant pages to find constraint informationGuillaume Gomez-0/+4
2022-10-01Merge apply_attrs_callsite into call and invokebjorn3-2/+2
Some codegen backends are not able to apply callsite attrs after the fact.
2022-09-01Always import all tracing macros for the entire crate instead of piecemeal ↵Oli Scherer-1/+0
by module
2022-08-14Update the minimum external LLVM to 13Josh Stone-8/+0
2022-05-16Add tmm_reg clobbersConnor Horman-3/+6
2022-04-19Rollup merge of #95740 - Amanieu:kreg0, r=nagisaDylan DPC-3/+13
asm: Add a kreg0 register class on x86 which includes k0 Previously we only exposed a kreg register class which excludes the k0 register since it can't be used in many instructions. However k0 is a valid register and we need to have a way of marking it as clobbered for clobber_abi. Fixes #94977
2022-04-19asm: Add a kreg0 register class on x86 which includes k0Amanieu d'Antras-3/+13
Previously we only exposed a kreg register class which excludes the k0 register since it can't be used in many instructions. However k0 is a valid register and we need to have a way of marking it as clobbered for clobber_abi. Fixes #94977
2022-04-15Add codegen for global_asm! sym operandsAmanieu d'Antras-2/+25
2022-04-09Switch to the 'normal' basic block for writing asm outputs if needed.Luqman Aden-0/+5
We may sometimes emit an `invoke` instead of a `call` for inline assembly during the MIR -> LLVM IR lowering. But we failed to update the IR builder's current basic block before writing the results to the outputs. This would result in invalid IR because the basic block would end in a `store` instruction, which isn't a valid terminator.
2022-04-05Mark scalar layout unions so that backends that do not support partially ↵Oli Scherer-37/+43
initialized scalars can special case them.
2022-02-26Add LLVM attributes in batches instead of individuallyErik Desjardins-5/+8
This should improve performance.
2022-01-22Add preliminary support for inline assembly for msp430.William D. Jones-0/+6
2022-01-17Use Symbol for target features in asm handlingbjorn3-4/+3
This saves a couple of Symbol::intern calls
2022-01-12Remove deprecated LLVM-style inline assemblyTomasz Miąsko-102/+5
2021-12-16Remove `in_band_lifetimes` from `rustc_codegen_llvm`LegionMammal978-12/+12
See #91867 for more information.
2021-12-10Rollup merge of #91625 - est31:remove_indexes, r=oli-obkMatthias Krüger-1/+1
Remove redundant [..]s
2021-12-09Remove redundant [..]sest31-1/+1
2021-12-07Remove the reg_thumb register class for asm! on ARMAmanieu d'Antras-5/+2
Also restricts r8-r14 from being used on Thumb1 targets as per #90736.
2021-12-06Implement inline asm! for AVR platformAndrew Dona-Couch-0/+21
2021-12-03LLVM codgen support for unwinding inline assemblycynecx-2/+27
2021-12-03Adjust llvm wrapper for unwinding support for inlineasmcynecx-0/+2
2021-11-10Update more rustc/libtest things for wasm64Alex Crichton-1/+1
* Add wasm64 variants for inline assembly along the same lines as wasm32 * Update a few directives in libtest to check for `target_family` instead of `target_arch` * Update some rustc codegen and typechecks specialized for wasm32 to also work for wasm64.
2021-10-26Properly check `target_features` not to trigger an assertionYuki Okushi-2/+6
2021-10-01Fix clippy lintsGuillaume Gomez-2/+2
2021-09-09Make `abi::Abi` `Copy` and remove a *lot* of refsAndreas Liljeqvist-7/+7
fix fix Remove more refs and clones fix more fix
2021-09-01Rollup merge of #88350 - programmerjake:add-ppc-cr-xer-clobbers, r=AmanieuMara Bos-0/+8
add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC Fixes #88315
2021-08-25add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPCJacob Lifshay-0/+8
Fixes #88315
2021-08-22Feat: added s390x reg-definitions, constraint codes, and testslinux1-6/+6
2021-08-22Feat: added inline asm support for s390xlinux1-0/+6
2021-08-14Auto merge of #87581 - Amanieu:asm_clobber_abi, r=nagisabors-1/+8
Add support for clobber_abi to asm! This PR adds the `clobber_abi` feature that was proposed in #81092. Fixes #81092 cc `@rust-lang/wg-inline-asm` r? `@nagisa`
2021-08-12Implement `black_box` using intrinsicGary Guo-1/+1
The new implementation allows some `memcpy`s to be optimized away, so the uninit value in ui/sanitize/memory.rs is constructed directly onto the return place. Therefore the sanitizer now says that the value is allocated by `main` rather than `random`.
2021-08-12Mark RISC-V vector state as clobbered in inline assemblyAmanieu d'Antras-1/+8
2021-08-05Prepare call/invoke for opaque pointersJosh Stone-1/+1
Rather than relying on `getPointerElementType()` from LLVM function pointers, we now pass the function type explicitly when building `call` or `invoke` instructions.
2021-07-11Auto merge of #86416 - Amanieu:asm_clobber_only, r=nagisabors-1/+49
Add clobber-only register classes for asm! These are needed to properly express a function call ABI using a clobber list, even though we don't support passing actual values into/out of these registers.
2021-07-10Add clobber-only register classes for asm!Amanieu d'Antras-1/+49
These are needed to properly express a function call ABI using a clobber list, even though we don't support passing actual values into/out of these registers.
2021-05-23Add support for BPF inline assemblyAlessandro Decina-0/+6
2021-05-13Add asm!() support for PowerPC64Dr. Chat-1/+1
2021-05-13Add support for const operands and options to global_asm!Amanieu d'Antras-3/+42
On x86, the default syntax is also switched to Intel to match asm!
2021-05-11Add initial asm!() support for PowerPCDr. Chat-0/+8
This includes GPRs and FPRs only
2021-04-04Allow clobbering unsupported registers in asm!Amanieu d'Antras-1/+26
Previously registers could only be marked as clobbered if the target feature for that register was enabled. This restriction is now removed.
2021-03-13Always lower asm! to valid HIRAmanieu d'Antras-0/+3
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