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2024-10-01Rollup merge of #130630 - taiki-e:s390x-clobber-abi, r=AmanieuGuillaume Gomez-0/+6
Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly This supports `clobber_abi` which is one of the requirements of stabilization mentioned in #93335. This also supports vector registers (as `vreg`) and access registers (as `areg`) as clobber-only, which need to support clobbering of them to implement clobber_abi. Refs: - "1.2.1.1. Register Preservation Rules" section in ELF Application Binary Interface s390x Supplement, Version 1.6.1 (lzsabi_s390x.pdf in https://github.com/IBM/s390x-abi/releases/tag/v1.6.1) - Register definition in LLVM: - Vector registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L249 - Access registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L332 I have three questions: - ~~ELF Application Binary Interface s390x Supplement says that `cc` (condition code, bits 18-19 of PSW) is "Volatile". However, we do not have a register class for `cc` and instead mark `cc` as clobbered unless `preserves_flags` is specified (https://github.com/rust-lang/rust/pull/111331). Therefore, in the current implementation, if both `preserves_flags` and `clobber_abi` are specified, `cc` is not marked as clobbered. Is this okay? Or even if `preserves_flags` is used, should `cc` be marked as clobbered if `clobber_abi` is used?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121 - ~~ELF Application Binary Interface s390x Supplement says that `pm` (program mask, bits 20-23 of PSW) is "Cleared". There does not appear to be any registers associated with this in either [LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td) or [GCC](https://github.com/gcc-mirror/gcc/blob/33ccc1314dcdb0b988a9276ca6b6ce9b07bea21e/gcc/config/s390/s390.h#L407-L431), so at this point I don't see any way other than to just ignore it. Is this okay as-is?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121 - Is "areg" a good name for register class name for access registers? It may be a bit confusing between that and `reg_addr`, which uses the “a” constraint (https://github.com/rust-lang/rust/pull/119431)... Note: - GCC seems to [recognize only `a0` and `a1`](https://github.com/gcc-mirror/gcc/blob/33ccc1314dcdb0b988a9276ca6b6ce9b07bea21e/gcc/config/s390/s390.h#L428-L429), and using `a[2-15]` [causes errors](https://godbolt.org/z/a46vx8jjn). Given that cg_gcc has a similar problem with other architecture (https://github.com/rust-lang/rustc_codegen_gcc/issues/485), I don't feel this is a blocker for this PR, but it is worth mentioning here. - `vreg` should be able to accept `#[repr(simd)]` types as input if the `vector` target feature added in https://github.com/rust-lang/rust/pull/127506 is enabled, but core_arch has no s390x vector type and both `#[repr(simd)]` and `core::simd` are unstable, so I have not implemented it in this PR. EDIT: And supporting it is probably more complex than doing the equivalent on other architectures... https://github.com/rust-lang/rust/pull/88245#issuecomment-905559591 cc `@uweigand` r? `@Amanieu` `@rustbot` label +O-SystemZ
2024-09-24Auto merge of #130389 - Luv-Ray:LLVMMDNodeInContext2, r=nikicbors-3/+8
llvm: replace some deprecated functions `LLVMMDStringInContext` and `LLVMMDNodeInContext` are deprecated, replace them with `LLVMMDStringInContext2` and `LLVMMDNodeInContext2`. Also replace `Value` with `Metadata` in some function signatures for better consistency.
2024-09-22Reformat using the new identifier sorting from rustfmtMichael Goulet-2/+2
2024-09-21Support clobber_abi and vector/access registers (clobber-only) in s390x ↵Taiki Endo-0/+6
inline assembly
2024-09-19Streamline register methods.Nicholas Nethercote-292/+251
These can be made more concise, mostly through appropriate use of `use` declarations.
2024-09-19replace some deprecated functionsLuv-Ray-3/+8
2024-09-17Rename supertraits of `CodegenMethods`.Nicholas Nethercote-1/+1
Supertraits of `BuilderMethods` are all called `XyzBuilderMethods`. Supertraits of `CodegenMethods` are all called `XyzMethods`. This commit changes the latter to `XyzCodegenMethods`, for consistency.
2024-08-25Add `f16` and `f128` inline ASM support for `aarch64`beetrees-3/+11
2024-08-11Use assert_matches around the compilerMichael Goulet-1/+3
2024-07-29Reformat `use` declarations.Nicholas Nethercote-12/+11
The previous commit updated `rustfmt.toml` appropriately. This commit is the outcome of running `x fmt --all` with the new formatting options.
2024-06-22Rollup merge of #126555 - beetrees:f16-inline-asm-arm, r=AmanieuGuillaume Gomez-0/+39
Add `f16` inline ASM support for 32-bit ARM Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).` Relevant issue: #125398 Tracking issue: #116909 `@rustbot` label +F-f16_and_f128
2024-06-21Add `f16` inline ASM support for RISC-Vbeetrees-6/+49
2024-06-21Add `f16` inline ASM support for 32-bit ARMbeetrees-0/+39
2024-06-13Add `f16` and `f128` inline ASM support for `x86` and `x86-64`beetrees-0/+100
2024-05-23Remove `#[macro_use] extern crate tracing` from `rustc_codegen_llvm`.Nicholas Nethercote-0/+1
2024-05-06Refactor float `Primitive`s to a separate `Float` typebeetrees-11/+11
2024-04-10Add support for Arm64EC inline assemblyDaniel Paoliello-1/+1
2024-03-23CFI: Use Instance at callsitesMatthew Maurer-3/+3
We already use `Instance` at declaration sites when available to glean additional information about possible abstractions of the type in use. This does the same when possible at callsites as well. The primary purpose of this change is to allow CFI to alter how it generates type information for indirect calls through `Virtual` instances.
2024-02-24Add assertions and clarify asm-goto with noreturnGary Guo-0/+1
2024-02-24Implement asm goto for LLVM and GCC backendGary Guo-10/+19
2024-01-03Support reg_addr register class in s390x inline assemblyTaiki Endo-1/+4
2023-08-15Auto merge of #114467 - Amanieu:asm-unstable-features, r=davidtwcobors-3/+4
Use `unstable_target_features` when checking inline assembly This is necessary to properly validate register classes even when the relevant target feature name is still unstable.
2023-08-14add details for csky-unknown-linux-gnuabiv2 and add docsDirreke-1/+1
2023-08-14add a csky-unknown-linux-gnuabiv2 targetDirreke-0/+6
2023-08-04Use `unstable_target_features` when checking inline assemblyAmanieu d'Antras-3/+4
This is necessary to properly validate register classes even when the relevant target feature name is still unstable.
2023-05-08Rollup merge of #111332 - loongarch-rs:inline-asm, r=AmanieuYuki Okushi-1/+12
Improve inline asm for LoongArch This PR is a sub-part of https://github.com/rust-lang/rust/pull/111235, to improve inline asm for LoongArch. r? `@Amanieu`
2023-05-08Mark s390x condition code register as clobbered in inline assemblyTaiki Endo-1/+3
2023-05-08Mark LoongArch float-point condition flags as clobbered in inline assemblyWANG Rui-1/+12
2023-05-03Rollup merge of #105452 - rcvalle:rust-cfi-3, r=bjorn3Manish Goregaokar-2/+2
Add cross-language LLVM CFI support to the Rust compiler This PR adds cross-language LLVM Control Flow Integrity (CFI) support to the Rust compiler by adding the `-Zsanitizer-cfi-normalize-integers` option to be used with Clang `-fsanitize-cfi-icall-normalize-integers` for normalizing integer types (see https://reviews.llvm.org/D139395). It provides forward-edge control flow protection for C or C++ and Rust -compiled code "mixed binaries" (i.e., for when C or C++ and Rust -compiled code share the same virtual address space). For more information about LLVM CFI and cross-language LLVM CFI support for the Rust compiler, see design document in the tracking issue #89653. Cross-language LLVM CFI can be enabled with -Zsanitizer=cfi and -Zsanitizer-cfi-normalize-integers, and requires proper (i.e., non-rustc) LTO (i.e., -Clinker-plugin-lto). Thank you again, ``@bjorn3,`` ``@nikic,`` ``@samitolvanen,`` and the Rust community for all the help!
2023-05-03Add cross-language LLVM CFI support to the Rust compilerRamon de C Valle-2/+2
This commit adds cross-language LLVM Control Flow Integrity (CFI) support to the Rust compiler by adding the `-Zsanitizer-cfi-normalize-integers` option to be used with Clang `-fsanitize-cfi-icall-normalize-integers` for normalizing integer types (see https://reviews.llvm.org/D139395). It provides forward-edge control flow protection for C or C++ and Rust -compiled code "mixed binaries" (i.e., for when C or C++ and Rust -compiled code share the same virtual address space). For more information about LLVM CFI and cross-language LLVM CFI support for the Rust compiler, see design document in the tracking issue #89653. Cross-language LLVM CFI can be enabled with -Zsanitizer=cfi and -Zsanitizer-cfi-normalize-integers, and requires proper (i.e., non-rustc) LTO (i.e., -Clinker-plugin-lto).
2023-04-25Add loongarch64 asm! supportzhaixiaojuan-0/+6
2023-04-12Add inline assembly support for m68kIan Douglas Scott-0/+10
2023-04-04replace LLVMRustAppendModuleInlineAsm with LLVMAppendModuleInlineAsm, ↵klensy-1/+1
LLVMRustMetadataTypeInContext with LLVMMetadataTypeInContext
2023-01-22abi: add `AddressSpace` field to `Primitive::Pointer`Erik Desjardins-4/+9
...and remove it from `PointeeInfo`, which isn't meant for this. There are still various places (marked with FIXMEs) that assume all pointers have the same size and alignment. Fixing this requires parsing non-default address spaces in the data layout string, which will be done in a followup.
2023-01-17Remove double spaces after dots in commentsMaybe Waffle-1/+1
2022-12-18use &str / String literals instead of format!()Matthias Krüger-1/+1
2022-11-05Rollup merge of #103977 - TimNN:memory-effects, r=nikicMatthias Krüger-3/+3
LLVM 16: Switch to using MemoryEffects This adapts the compiler to the changes required by https://github.com/llvm/llvm-project/commit/304f1d59ca41872c094def3aee0a8689df6aa398. AFAICT, `WriteOnly` isn't used by the compiler, all `ReadNone` uses were migrated and the remaining use of `ReadOnly` is only for function parameters. To simplify the FFI, this PR uses an enum to represent `MemoryEffects` across the FFI boundary, which then gets mapped to the matching static factory method when constructing the attribute. Fixes #103961. `@rustbot` label +llvm-main r? `@nikic`
2022-11-04LLVM 16: Switch to using MemoryEffectsTim Neumann-3/+3
2022-11-04Rollup merge of #103897 - Amanieu:llvm-58384, r=davidtwcoMatthias Krüger-3/+54
asm: Work around LLVM bug on AArch64 Upstream issue: https://github.com/llvm/llvm-project/issues/58384 LLVM gets confused if we assign a 32-bit value to a 64-bit register, so pass the 32-bit register name to LLVM in that case.
2022-11-04Auto merge of #103098 - Amanieu:asm-tied-fixed, r=bjorn3bors-2/+11
asm: Match clang behavior for inlateout fixed register operands We have 2 options for representing LLVM constraints for `inlateout` operands on a fixed register (e.g. `r0`): `={r0},0` or `={r0},{r0}`. This PR changes the behavior to the latter, which matches the behavior of Clang since https://reviews.llvm.org/D87279.
2022-11-02asm: Work around LLVM bug on AArch64Amanieu d'Antras-3/+54
Upstream issue: https://github.com/llvm/llvm-project/issues/58384 LLVM gets confused if we assign a 32-bit value to a 64-bit register, so pass the 32-bit register name to LLVM in that case.
2022-10-15asm: Match clang behavior for inlateout fixed register operandsAmanieu d'Antras-2/+11
We have 2 options for representing LLVM constraints for `inlateout` operands on a fixed register (e.g. `r0`): `={r0},0` or `={r0},{r0}`. This PR changes the behavior to the latter, which matches the behavior of Clang since https://reviews.llvm.org/D87279.
2022-10-13Add links to relevant pages to find constraint informationGuillaume Gomez-0/+4
2022-10-01Merge apply_attrs_callsite into call and invokebjorn3-2/+2
Some codegen backends are not able to apply callsite attrs after the fact.
2022-09-01Always import all tracing macros for the entire crate instead of piecemeal ↵Oli Scherer-1/+0
by module
2022-08-14Update the minimum external LLVM to 13Josh Stone-8/+0
2022-05-16Add tmm_reg clobbersConnor Horman-3/+6
2022-04-19Rollup merge of #95740 - Amanieu:kreg0, r=nagisaDylan DPC-3/+13
asm: Add a kreg0 register class on x86 which includes k0 Previously we only exposed a kreg register class which excludes the k0 register since it can't be used in many instructions. However k0 is a valid register and we need to have a way of marking it as clobbered for clobber_abi. Fixes #94977
2022-04-19asm: Add a kreg0 register class on x86 which includes k0Amanieu d'Antras-3/+13
Previously we only exposed a kreg register class which excludes the k0 register since it can't be used in many instructions. However k0 is a valid register and we need to have a way of marking it as clobbered for clobber_abi. Fixes #94977
2022-04-15Add codegen for global_asm! sym operandsAmanieu d'Antras-2/+25
generated by cgit-pink 1.4.1-3-g733a5 (git 2.37.1) at 2025-11-03 16:05:18 +0000