about summary refs log tree commit diff
path: root/compiler/rustc_codegen_llvm/src/intrinsic.rs
AgeCommit message (Collapse)AuthorLines
2025-08-20make `prefetch` intrinsics safeFolkert de Vries-1/+7
2025-08-14Complete functionality and general cleanupMarcelo Domínguez-68/+144
2025-08-14Basic implementation of `autodiff` intrinsicMarcelo Domínguez-3/+73
2025-07-25Unify LLVM ctlz/cttz intrinsic generationTobias Decking-19/+9
2025-07-07compiler: Parse `p-` specs in datalayout string, allow definition of custom ↵Edoardo Marangoni-9/+11
default data address space
2025-07-03Always use the pure Rust fallback instead of `llvm.{maximum,minimum}`Urgau-12/+14
2025-07-03setup CI and tidy to use typos for spellchecking and fix few typosklensy-2/+2
2025-06-29Rollup merge of #142078 - sayantn:more-intrinsics, r=workingjubileeGuillaume Gomez-1/+16
Add SIMD funnel shift and round-to-even intrinsics This PR adds 3 new SIMD intrinsics - `simd_funnel_shl` - funnel shift left - `simd_funnel_shr` - funnel shift right - `simd_round_ties_even` (vector version of `round_ties_even_fN`) TODO (future PR): implement `simd_fsh{l,r}` in miri, cg_gcc and cg_clif (it is surprisingly hard to implement without branches, the common tricks that rotate uses doesn't work because we have 2 elements now. e.g, the `-n&31` trick used by cg_gcc to implement rotate doesn't work with this because then `fshl(a, b, 0)` will be `a | b`) [#t-compiler > More SIMD intrinsics](https://rust-lang.zulipchat.com/#narrow/channel/131828-t-compiler/topic/More.20SIMD.20intrinsics/with/522130286) `@rustbot` label T-compiler T-libs A-intrinsics F-core_intrinsics r? `@workingjubilee`
2025-06-15Correctly account for different address spaces in LLVM intrinsic invocationssayantn-17/+22
2025-06-15Use `LLVMIntrinsicGetDeclaration` to completely remove the hardcoded ↵sayantn-4/+4
intrinsics list
2025-06-15Add `simd_funnel_sh{l,r}` and `simd_round_ties_even`sayantn-1/+16
2025-06-12Simplify implementation of Rust intrinsics by using type parameters in the cachesayantn-359/+232
2025-06-03Remove type_test from IntrinsicCallBuilderMethodsbjorn3-7/+0
It is only used within cg_llvm.
2025-05-30Directly use from_immediate for handling boolbjorn3-3/+2
2025-05-30Avoid computing function type for intrinsic instancesbjorn3-6/+2
2025-05-30Use layout field of OperandRef in generic_simd_intrinsicbjorn3-32/+26
2025-05-30Use layout field of OperandRef and PlaceRef in codegen_intrinsic_callbjorn3-23/+17
This avoids having to get the function signature.
2025-05-26Remove usage of FnAbi in codegen_intrinsic_callbjorn3-20/+10
2025-05-26Pass PlaceRef rather than Bx::Value to codegen_intrinsic_callbjorn3-28/+22
2025-05-10Use the fallback body for `{minimum,maximum}f128` on LLVM as well.Urgau-4/+6
2025-05-09Use intrinsics for `{f16,f32,f64,f128}::{minimum,maximum}` operationsUrgau-0/+10
2025-05-05Rename Instance::new to Instance::new_raw and add a note that it is rawMichael Goulet-1/+1
2025-04-20Rollup merge of #137953 - RalfJung:simd-intrinsic-masks, r=WaffleLapkinChris Denton-44/+12
simd intrinsics with mask: accept unsigned integer masks, and fix some of the errors It's not clear at all why the mask would have to be signed, it is anyway interpreted bitwise. The backend should just make sure that works no matter the surface-level type; our LLVM backend already does this correctly. The note of "the mask may be widened, which only has the correct behavior for signed integers" explains... nothing? Why can't the code do the widening correctly? If necessary, just cast to the signed type first... Also while we are at it, fix the errors. For simd_masked_load/store, the errors talked about the "third argument" but they meant the first argument (the mask is the first argument there). They also used the wrong type for `expected_element`. I have extremely low confidence in the GCC part of this PR. See [discussion on Zulip](https://rust-lang.zulipchat.com/#narrow/channel/257879-project-portable-simd/topic/On.20the.20sign.20of.20masks)
2025-04-20simd intrinsics with mask: accept unsigned integer masksRalf Jung-44/+12
2025-04-11Rollup merge of #137447 - folkertdev:simd-extract-insert-dyn, r=scottmcmStuart Cook-30/+39
add `core::intrinsics::simd::{simd_extract_dyn, simd_insert_dyn}` fixes https://github.com/rust-lang/rust/issues/137372 adds `core::intrinsics::simd::{simd_extract_dyn, simd_insert_dyn}`, which contrary to their non-dyn counterparts allow a non-const index. Many platforms (but notably not x86_64 or aarch64) have dedicated instructions for this operation, which stdarch can emit with this change. Future work is to also make the `Index` operation on the `Simd` type emit this operation, but the intrinsic can't be used directly. We'll need some MIR shenanigans for that. r? `@ghost`
2025-04-10add `simd_insert_dyn` and `simd_extract_dyn`Folkert de Vries-30/+39
2025-03-17Remove implicit #[no_mangle] for #[rustc_std_internal_symbol]bjorn3-1/+5
2025-03-07Rollup merge of #137549 - oli-obk:llvm-ffi, r=davidtwcoMatthias Krüger-2/+2
Clean up various LLVM FFI things in codegen_llvm cc ```@ZuseZ4``` I touched some autodiff parts The major change of this PR is [bfd88ce](https://github.com/rust-lang/rust/pull/137549/commits/bfd88cead0dd79717f123ad7e9a26ecad88653cb) which makes `CodegenCx` generic just like `GenericBuilder` The other commits mostly took advantage of the new feature of making extern functions safe, but also just used some wrappers that were already there and shrunk unsafe blocks. best reviewed commit-by-commit
2025-02-28rename BackendRepr::Vector → SimdVectorRalf Jung-1/+1
2025-02-25Rollup merge of #137595 - folkertdev:remove-simd-pow-powi, r=RalfJungLeón Orell Valerian Liehr-4/+0
remove `simd_fpow` and `simd_fpowi` Discussed in https://github.com/rust-lang/rust/issues/137555 These functions are not exposed from `std::intrinsics::simd`, and not used anywhere outside of the compiler. They also don't lower to particularly good code at least on the major ISAs (I checked x86_64, aarch64, s390x, powerpc), where the vector is just spilled to the stack and scalar functions are used for the actual logic. r? `@RalfJung`
2025-02-25remove `simd_fpow` and `simd_fpowi`Folkert de Vries-4/+0
2025-02-24rename simd_shuffle_generic → simd_shuffle_const_genericRalf Jung-1/+1
2025-02-24Use a safe wrapper around an LLVM FFI functionOli Scherer-2/+2
2025-02-23Rollup merge of #136543 - RalfJung:round-ties-even, r=tgross35Trevor Gross-14/+8
intrinsics: unify rint, roundeven, nearbyint in a single round_ties_even intrinsic LLVM has three intrinsics here that all do the same thing (when used in the default FP environment). There's no reason Rust needs to copy that historically-grown mess -- let's just have one intrinsic and leave it up to the LLVM backend to decide how to lower that. Suggested by `@hanna-kruppe` in https://github.com/rust-lang/rust/issues/136459; Cc `@tgross35` try-job: test-various
2025-02-20Remove `BackendRepr::Uninhabited`, replaced with an `uninhabited: bool` ↵Zachary S-1/+1
field in `LayoutData`. Also update comments that refered to BackendRepr::Uninhabited.
2025-02-18compiler: Stop reexporting stuff in cg_llvm::abiJubilee Young-6/+6
The reexports confuse tooling like rustdoc into thinking cg_llvm is the source of key types that originate in rustc_target.
2025-02-11Document some safety constraints and use more safe wrappersOli Scherer-1/+1
2025-02-08Rustfmtbjorn3-231/+240
2025-02-04intrinsics: unify rint, roundeven, nearbyint in a single round_ties_even ↵Ralf Jung-14/+8
intrinsic
2025-01-30introduce `ty::Value`Lukas Markeffsky-1/+1
Co-authored-by: FedericoBruzzone <federico.bruzzone.i@gmail.com>
2025-01-26Consistently use the most significant bit of vector masksJörn Horstmann-93/+104
This improves the codegen for vector `select`, `gather`, `scatter` and boolean reduction intrinsics and fixes rust-lang/portable-simd#316. The current behavior of most mask operations during llvm codegen is to truncate the mask vector to <N x i1>, telling llvm to use the least significat bit. The exception is the `simd_bitmask` intrinsics, which already used the most signifiant bit. Since sse/avx instructions are defined to use the most significant bit, truncating means that llvm has to insert a left shift to move the bit into the most significant position, before the mask can actually be used. Similarly on aarch64, mask operations like blend work bit by bit, repeating the least significant bit across the whole lane involves shifting it into the sign position and then comparing against zero. By shifting before truncating to <N x i1>, we tell llvm that we only consider the most significant bit, removing the need for additional shift instructions in the assembly.
2025-01-24Make CodegenCx and Builder genericManuel Drehwald-6/+6
Co-authored-by: Oli Scherer <github35764891676564198441@oli-obk.de>
2024-12-27Override `carrying_mul_add` in cg_llvmScott McMurray-0/+31
2024-12-07Remove unnecessary `int_type_width_signed` functionScott McMurray-91/+75
2024-11-23Add simd_relaxed_fma intrinsicCaleb Zulawski-0/+2
2024-11-18use `TypingEnv` when no `infcx` is availablelcnr-7/+6
the behavior of the type system not only depends on the current assumptions, but also the currentnphase of the compiler. This is mostly necessary as we need to decide whether and how to reveal opaque types. We track this via the `TypingMode`.
2024-11-17Likely unlikely fixJiri Bobek-2/+0
2024-11-03compiler: Directly use rustc_abi in codegenJubilee Young-5/+5
2024-10-29compiler: `rustc_abi::Abi` => `BackendRepr`Jubilee Young-6/+7
The initial naming of "Abi" was an awful mistake, conveying wrong ideas about how psABIs worked and even more about what the enum meant. It was only meant to represent the way the value would be described to a codegen backend as it was lowered to that intermediate representation. It was never meant to mean anything about the actual psABI handling! The conflation is because LLVM typically will associate a certain form with a certain ABI, but even that does not hold when the special cases that actually exist arise, plus the IR annotations that modify the ABI. Reframe `rustc_abi::Abi` as the `BackendRepr` of the type, and rename `BackendRepr::Aggregate` as `BackendRepr::Memory`. Unfortunately, due to the persistent misunderstandings, this too is now incorrect: - Scattered ABI-relevant code is entangled with BackendRepr - We do not always pre-compute a correct BackendRepr that reflects how we "actually" want this value to be handled, so we leave the backend interface to also inject various special-cases here - In some cases `BackendRepr::Memory` is a "real" aggregate, but in others it is in fact using memory, and in some cases it is a scalar! Our rustc-to-backend lowering code handles this sort of thing right now. That will eventually be addressed by lifting duplicated lowering code to either rustc_codegen_ssa or rustc_target as appropriate.
2024-10-26Use safe wrappers `get_linkage` and `set_linkage`Zalathar-7/+6