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2025-08-26Rollup merge of #145076 - ZhongyaoChen:feature/add-tier3-riscv64a23-target, r...Guillaume Gomez-1/+1
2025-08-24Replace the `llvm::Bool` typedef with a proper newtypeZalathar-1/+1
2025-08-19Rollup merge of #145099 - heiher:loong-32s, r=folkertdev许杰友 Jieyou Xu (Joe)-0/+1
2025-08-19completely remove rva23s64Zhongyao Chen-5/+1
2025-08-11Add new Tier-3 target: riscv64a23-unknown-linux-gnuChen Zhongyao-1/+5
2025-08-09rustc_target: Add the `32s` target feature for LoongArchWANG Rui-0/+1
2025-08-08Rollup merge of #144987 - tgross35:llvm21-f16-f128, r=nikicTrevor Gross-11/+13
2025-08-07Enable f16 and f128 on targets that were fixed in LLVM21Trevor Gross-11/+13
2025-08-07Rollup merge of #138689 - jedbrown:jed/nvptx-target-feature, r=ZuseZ4Stuart Cook-6/+12
2025-07-26Rollup merge of #144383 - ZuseZ4:disable-f128-on-amdgcn, r=oli-obkJacob Pratt-0/+2
2025-07-26Disable has_reliable_f128_math on musl targetsJens Reidel-0/+3
2025-07-23disable cfg.has_reliable_f128 on amdgcnManuel Drehwald-0/+2
2025-06-30Disable f16 on Aarch64 without neon for llvm < 20.1.1Trevor Gross-0/+8
2025-06-21target-feature: enable rust target features implied by target-cpuJed Brown-6/+3
2025-06-21add nvptx_target_featureJed Brown-0/+9
2025-06-19various minor target feature cleanupsRalf Jung-11/+11
2025-06-19line-wrap and extend comments, typosRalf Jung-5/+5
2025-06-19cg_gcc: properly populate cfg(target_features) with -Ctarget-featuresRalf Jung-16/+16
2025-06-19move -Ctarget-feature handling into shared codeRalf Jung-120/+40
2025-06-19move cfg(target_feature) computation into shared placeRalf Jung-80/+7
2025-06-09-Zretpoline and -Zretpoline-external-thunk flags (target modifiers) to enable...Andrew Zhogin-15/+10
2025-05-19add s390x z17 target featuresFolkert de Vries-0/+8
2025-05-06Added `apxf` target feature support, under flag `apx_target_feature`Madhav Madhusoodanan-0/+12
2025-05-05feat: Added capability to add multiple dependencies for an LLVMFeatureMadhav Madhusoodanan-17/+20
2025-05-04Rollup merge of #139675 - sayantn:avx10, r=AmanieuStuart Cook-0/+3
2025-05-01Rollup merge of #140460 - heiher:issue-140455, r=UrgauGuillaume Gomez-0/+6
2025-04-29Filter out LoongArch features not supported by the current LLVM versionWANG Rui-0/+6
2025-04-29Enable `target_has_reliable_f16_math` on x86Trevor Gross-7/+3
2025-04-27Implement the internal feature `cfg_target_has_reliable_f16_f128`Trevor Gross-3/+86
2025-04-26Add the `avx10.1` and `avx10.2` target featuressayantn-0/+3
2025-04-05Update the minimum external LLVM to 19Josh Stone-15/+2
2025-04-02Rollup merge of #138003 - sayantn:new-amx, r=AmanieuStuart Cook-0/+7
2025-03-20rustc_target: Add more RISC-V vector-related featuresTaiki Endo-1/+3
2025-03-05Add the `movrs` target feature and `movrs_target_feature` feature gatesayantn-0/+1
2025-03-05Add the new `amx` target featuressayantn-0/+6
2025-03-05Remove out of date comment.Nicholas Nethercote-1/+0
2025-03-05Use `collect` to initialize `features`.Nicholas Nethercote-28/+25
2025-03-05Change signature of `target_features_cfg`.Nicholas Nethercote-24/+30
2025-03-05Simplify `implied_target_features`.Nicholas Nethercote-3/+3
2025-03-05Avoid double interning of feature names.Nicholas Nethercote-8/+7
2025-02-24codegen_llvm: avoid `Deref` impls w/ extern typeDavid Wood-3/+4
2025-02-22rustc_target: Add more RISC-V atomic-related featuresTaiki Endo-0/+2
2025-02-11Rollup merge of #136813 - mrkajetanp:aarch32-fp16-target-feature, r=davidtwcoJacob Pratt-0/+1
2025-02-10rustc_codegen_llvm: Mark items as pub(crate) outside of the llvm moduleDaniel Paoliello-1/+1
2025-02-07rustc_target: Add the fp16 target feature for AArch32Kajetan Puchalski-0/+1
2025-01-28ABI-required target features: warn when they are missing in base CPU (rather ...Ralf Jung-50/+6
2025-01-06Rollup merge of #131830 - hoodmane:emscripten-wasm-eh, r=workingjubileeJacob Pratt-1/+4
2025-01-06Add support for wasm exception handling to Emscripten targetHood Chatham-1/+4
2025-01-05add dedicated type for ABI target feature constraintsRalf Jung-7/+10
2024-12-31add ABI target features *before* -Ctarget-featuresRalf Jung-6/+6