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2024-03-09once byval abi is computed, the target abi isn't used furthererikdesjardins-1/+1
Co-authored-by: Ralf Jung <post@ralfj.de>
2024-03-09improve byval abi docsErik Desjardins-5/+34
2024-03-07fix now-incorrect parenthetical about byval attrErik Desjardins-2/+4
2024-03-06Add arm64ec-pc-windows-msvc targetDaniel Paoliello-1/+1
Introduces the `arm64ec-pc-windows-msvc` target for building Arm64EC ("Emulation Compatible") binaries for Windows. For more information about Arm64EC see <https://learn.microsoft.com/en-us/windows/arm/arm64ec>. Tier 3 policy: > A tier 3 target must have a designated developer or developers (the "target maintainers") on record to be CCed when issues arise regarding the target. (The mechanism to track and CC such developers may evolve over time.) I will be the maintainer for this target. > Targets must use naming consistent with any existing targets; for instance, a target for the same CPU or OS as an existing Rust target should use the same name for that CPU or OS. Targets should normally use the same names and naming conventions as used elsewhere in the broader ecosystem beyond Rust (such as in other toolchains), unless they have a very good reason to diverge. Changing the name of a target can be highly disruptive, especially once the target reaches a higher tier, so getting the name right is important even for a tier 3 target. Target uses the `arm64ec` architecture to match LLVM and MSVC, and the `-pc-windows-msvc` suffix to indicate that it targets Windows via the MSVC environment. > Target names should not introduce undue confusion or ambiguity unless absolutely necessary to maintain ecosystem compatibility. For example, if the name of the target makes people extremely likely to form incorrect beliefs about what it targets, the name should be changed or augmented to disambiguate it. Target name exactly specifies the type of code that will be produced. > If possible, use only letters, numbers, dashes and underscores for the name. Periods (.) are known to cause issues in Cargo. Done. > Tier 3 targets may have unusual requirements to build or use, but must not create legal issues or impose onerous legal terms for the Rust project or for Rust developers or users. > The target must not introduce license incompatibilities. Uses the same dependencies, requirements and licensing as the other `*-pc-windows-msvc` targets. > Anything added to the Rust repository must be under the standard Rust license (MIT OR Apache-2.0). Understood. > The target must not cause the Rust tools or libraries built for any other host (even when supporting cross-compilation to the target) to depend on any new dependency less permissive than the Rust licensing policy. This applies whether the dependency is a Rust crate that would require adding new license exceptions (as specified by the tidy tool in the rust-lang/rust repository), or whether the dependency is a native library or binary. In other words, the introduction of the target must not cause a user installing or running a version of Rust or the Rust tools to be subject to any new license requirements. > Compiling, linking, and emitting functional binaries, libraries, or other code for the target (whether hosted on the target itself or cross-compiling from another target) must not depend on proprietary (non-FOSS) libraries. Host tools built for the target itself may depend on the ordinary runtime libraries supplied by the platform and commonly used by other applications built for the target, but those libraries must not be required for code generation for the target; cross-compilation to the target must not require such libraries at all. For instance, rustc built for the target may depend on a common proprietary C runtime library or console output library, but must not depend on a proprietary code generation library or code optimization library. Rust's license permits such combinations, but the Rust project has no interest in maintaining such combinations within the scope of Rust itself, even at tier 3. > "onerous" here is an intentionally subjective term. At a minimum, "onerous" legal/licensing terms include but are not limited to: non-disclosure requirements, non-compete requirements, contributor license agreements (CLAs) or equivalent, "non-commercial"/"research-only"/etc terms, requirements conditional on the employer or employment of any particular Rust developers, revocable terms, any requirements that create liability for the Rust project or its developers or users, or any requirements that adversely affect the livelihood or prospects of the Rust project or its developers or users. Uses the same dependencies, requirements and licensing as the other `*-pc-windows-msvc` targets. > Neither this policy nor any decisions made regarding targets shall create any binding agreement or estoppel by any party. If any member of an approving Rust team serves as one of the maintainers of a target, or has any legal or employment requirement (explicit or implicit) that might affect their decisions regarding a target, they must recuse themselves from any approval decisions regarding the target's tier status, though they may otherwise participate in discussions. > This requirement does not prevent part or all of this policy from being cited in an explicit contract or work agreement (e.g. to implement or maintain support for a target). This requirement exists to ensure that a developer or team responsible for reviewing and approving a target does not face any legal threats or obligations that would prevent them from freely exercising their judgment in such approval, even if such judgment involves subjective matters or goes beyond the letter of these requirements. Understood, I am not a member of the Rust team. > Tier 3 targets should attempt to implement as much of the standard libraries as possible and appropriate (core for most targets, alloc for targets that can support dynamic memory allocation, std for targets with an operating system or equivalent layer of system-provided functionality), but may leave some code unimplemented (either unavailable or stubbed out as appropriate), whether because the target makes it impossible to implement or challenging to implement. The authors of pull requests are not obligated to avoid calling any portions of the standard library on the basis of a tier 3 target not implementing those portions. Both `core` and `alloc` are supported. Support for `std` dependends on making changes to the standard library, `stdarch` and `backtrace` which cannot be done yet as the bootstrapping compiler raises a warning ("unexpected `cfg` condition value") for `target_arch = "arm64ec"`. > The target must provide documentation for the Rust community explaining how to build for the target, using cross-compilation if possible. If the target supports running binaries, or running tests (even if they do not pass), the documentation must explain how to run such binaries or tests for the target, using emulation if possible or dedicated hardware if necessary. Documentation is provided in src/doc/rustc/src/platform-support/arm64ec-pc-windows-msvc.md > Tier 3 targets must not impose burden on the authors of pull requests, or other developers in the community, to maintain the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on a tier 3 target. Do not send automated messages or notifications (via any medium, including via @) to a PR author or others involved with a PR regarding a tier 3 target, unless they have opted into such messages. > Backlinks such as those generated by the issue/PR tracker when linking to an issue or PR are not considered a violation of this policy, within reason. However, such messages (even on a separate repository) must not generate notifications to anyone involved with a PR who has not requested such notifications. > Patches adding or updating tier 3 targets must not break any existing tier 2 or tier 1 target, and must not knowingly break another tier 3 target without approval of either the compiler team or the maintainers of the other tier 3 target. > In particular, this may come up when working on closely related targets, such as variations of the same architecture with different features. Avoid introducing unconditional uses of features that another variation of the target may not have; use conditional compilation or runtime detection, as appropriate, to let each target run code supported by that target. Understood.
2024-02-28Add `f16` and `f128` to `rustc_type_ir::FloatTy` and `rustc_abi::Primitive`Trevor Gross-4/+4
Make changes necessary to support these types in the compiler.
2024-01-30Remove the `abi_amdgpu_kernel` featureclubby789-2/+0
2024-01-13Rollup merge of #119587 - beepster4096:system_varargs, r=petrochenkovMatthias Krüger-2/+2
Varargs support for system ABI This PR allows functions with the `system` ABI to be variadic (under the `extended_varargs_abi_support` feature tracked in #100189). On x86 windows, the `system` ABI is equivalent to `C` for variadic functions. On other platforms, `system` is already equivalent to `C`. Fixes #110505
2024-01-12allow system abi to be variadicbeepster4096-2/+2
2024-01-07Unions are not PointerLikeMichael Goulet-2/+2
2023-12-30Update to bitflags 2 in the compilerNilstrieb-2/+4
This involves lots of breaking changes. There are two big changes that force changes. The first is that the bitflag types now don't automatically implement normal derive traits, so we need to derive them manually. Additionally, bitflags now have a hidden inner type by default, which breaks our custom derives. The bitflags docs recommend using the impl form in these cases, which I did.
2023-11-25Auto merge of #118127 - RalfJung:unadjusted-abi, r=compiler-errorsbors-0/+1
the unadjusted ABI needs to pass aggregates by-value Fixes https://github.com/rust-lang/rust/issues/118124, a regression introduced in https://github.com/rust-lang/rust/pull/117500
2023-11-22Replace `no_ord_impl` with `orderable`.Nicholas Nethercote-0/+2
Similar to the previous commit, this replaces `newtype_index`'s opt-out `no_ord_impl` attribute with the opt-in `orderable` attribute.
2023-11-22Replace `custom_encodable` with `encodable`.Nicholas Nethercote-0/+2
By default, `newtype_index!` types get a default `Encodable`/`Decodable` impl. You can opt out of this with `custom_encodable`. Opting out is the opposite to how Rust normally works with autogenerated (derived) impls. This commit inverts the behaviour, replacing `custom_encodable` with `encodable` which opts into the default `Encodable`/`Decodable` impl. Only 23 of the 59 `newtype_index!` occurrences need `encodable`. Even better, there were eight crates with a dependency on `rustc_serialize` just from unused default `Encodable`/`Decodable` impls. This commit removes that dependency from those eight crates.
2023-11-21the unadjusted ABI needs to pass aggregates by-valueRalf Jung-0/+1
2023-11-19Auto merge of #117500 - RalfJung:aggregate-abi, r=davidtwcobors-21/+128
Ensure sanity of all computed ABIs This moves the ABI sanity assertions from the codegen backend to the ABI computation logic. Sadly, due to past mistakes, we [have to](https://github.com/rust-lang/rust/pull/117351#issuecomment-1788495503) be able to compute a sane ABI for nonsensical function types like `extern "C" fn(str) -> str`. So to make the sanity check pass we first need to make all ABI adjustment deal with unsized types... and we have no shared infrastructure for those adjustments, so that's a bunch of copy-paste. At least we have assertions failing loudly when one accidentally sets a different mode for an unsized argument. To achieve this, this re-lands the parts of https://github.com/rust-lang/rust/pull/80594 that got reverted in https://github.com/rust-lang/rust/pull/81388. To avoid breaking wasm ABI again, that ABI now explicitly opts-in to the (wrong, broken) ABI that we currently keep for backwards compatibility. That's still better than having *every* ABI use the wrong broken default! Cc `@bjorn3` Fixes https://github.com/rust-lang/rust/issues/115845
2023-11-19make_direct_deprecated: dont overwrite already set attributesRalf Jung-4/+10
2023-11-17Rollup merge of #117338 - workingjubilee:asmjs-meets-thanatos, r=b-naberMatthias Krüger-1/+0
Remove asmjs Fulfills [MCP 668](https://github.com/rust-lang/compiler-team/issues/668). `asmjs-unknown-emscripten` does not work as-specified, and lacks essential upstream support for generating asm.js, so it should not exist at all.
2023-11-07test and fix some more targetsRalf Jung-0/+12
2023-11-03default Aggregate ABI to Indirect, and make sure it's never used for unsizedRalf Jung-18/+107
2023-10-31Enums in offset_of: update based on est31, scottmcm & llogiq reviewGeorge Bateman-17/+12
2023-10-31Support enum variants in offset_of!George Bateman-8/+16
2023-10-28Remove asmjs from compilerJubilee Young-1/+0
2023-10-25implement C ABI lowering for CSKYdirreke-8/+30
2023-10-13Format all the let chains in compilerMichael Goulet-1/+2
2023-10-02Implement Deref<LayoutS> for LayoutLukas Wirth-0/+7
2023-10-02Add VariantIdx backLukas Wirth-4/+21
2023-10-02Move FieldIdx and Layout to rustc_targetLukas Wirth-0/+82
2023-10-02Bring back generic FieldIdxLukas Wirth-2/+2
2023-09-20rustc_target/loongarch: Fix passing of transparent unions with only one ↵WANG Rui-0/+11
non-ZST member This ensures that `MaybeUninit<T>` has the same ABI as `T` when passed through an `extern "C"` function. Fixes https://github.com/rust-lang/rust/issues/115509
2023-09-19rustc_target/riscv: Fix passing of transparent unions with only one non-ZST ↵msizanoen-0/+19
member This ensures that `MaybeUninit<T>` has the same ABI as `T` when passed through an `extern "C"` function. Fixes https://github.com/rust-lang/rust/issues/115481.
2023-09-17Rollup merge of #115654 - RalfJung:pass-mode-cast, r=compiler-errorsDylan DPC-27/+37
improve PassMode docs
2023-09-15special case `TyAndLayout` debug implBoxy-3/+38
2023-09-15clarify PassMode::Indirect as wellRalf Jung-18/+19
2023-09-15explain PassMode::CastRalf Jung-9/+18
2023-09-12add helper method for finding the one non-1-ZST fieldRalf Jung-0/+21
2023-09-10fix homogeneous_aggregate not ignoring some 1-ZSTRalf Jung-4/+9
2023-09-08turns out Layout has some more things to worry about -- move ABI comparison ↵Ralf Jung-1/+10
into helper function like is_bool, and some special magic extra fields
2023-09-08the wasm ABI behavior is a bugRalf Jung-2/+9
2023-09-08accept some differences for rustc_abi(assert_eq), so that we can test more ↵Ralf Jung-0/+48
things to be compatible
2023-09-07extend comments around PassMode::DirectRalf Jung-1/+3
2023-08-26Use `preserve_mostcc` for `extern "rust-cold"`Scott McMurray-7/+4
As experimentation in 115242 has shown looks better than `coldcc`. And *don't* use a different convention for cold on Windows, because that actually ends up making things worse. cc tracking issue 97544
2023-08-14Update compiler/rustc_target/src/abi/call/csky.rsDirreck-1/+1
Co-authored-by: bjorn3 <17426603+bjorn3@users.noreply.github.com>
2023-08-14add a csky-unknown-linux-gnuabiv2 targetDirreke-0/+33
2023-08-10Auto merge of #114614 - RalfJung:offset-of-sanity, r=cjgillotbors-1/+6
offset_of: guard against invalid use (with unsized fields)
2023-08-08feat: `riscv-interrupt-{m,s}` calling conventionsSeth Pellegrino-0/+25
Similar to prior support added for the mips430, avr, and x86 targets this change implements the rough equivalent of clang's [`__attribute__((interrupt))`][clang-attr] for riscv targets, enabling e.g. ```rust static mut CNT: usize = 0; pub extern "riscv-interrupt-m" fn isr_m() { unsafe { CNT += 1; } } ``` to produce highly effective assembly like: ```asm pub extern "riscv-interrupt-m" fn isr_m() { 420003a0: 1141 addi sp,sp,-16 unsafe { CNT += 1; 420003a2: c62a sw a0,12(sp) 420003a4: c42e sw a1,8(sp) 420003a6: 3fc80537 lui a0,0x3fc80 420003aa: 63c52583 lw a1,1596(a0) # 3fc8063c <_ZN12esp_riscv_rt3CNT17hcec3e3a214887d53E.0> 420003ae: 0585 addi a1,a1,1 420003b0: 62b52e23 sw a1,1596(a0) } } 420003b4: 4532 lw a0,12(sp) 420003b6: 45a2 lw a1,8(sp) 420003b8: 0141 addi sp,sp,16 420003ba: 30200073 mret ``` (disassembly via `riscv64-unknown-elf-objdump -C -S --disassemble ./esp32c3-hal/target/riscv32imc-unknown-none-elf/release/examples/gpio_interrupt`) This outcome is superior to hand-coded interrupt routines which, lacking visibility into any non-assembly body of the interrupt handler, have to be very conservative and save the [entire CPU state to the stack frame][full-frame-save]. By instead asking LLVM to only save the registers that it uses, we defer the decision to the tool with the best context: it can more accurately account for the cost of spills if it knows that every additional register used is already at the cost of an implicit spill. At the LLVM level, this is apparently [implemented by] marking every register as "[callee-save]," matching the semantics of an interrupt handler nicely (it has to leave the CPU state just as it found it after its `{m|s}ret`). This approach is not suitable for every interrupt handler, as it makes no attempt to e.g. save the state in a user-accessible stack frame. For a full discussion of those challenges and tradeoffs, please refer to [the interrupt calling conventions RFC][rfc]. Inside rustc, this implementation differs from prior art because LLVM does not expose the "all-saved" function flavor as a calling convention directly, instead preferring to use an attribute that allows for differentiating between "machine-mode" and "superivsor-mode" interrupts. Finally, some effort has been made to guide those who may not yet be aware of the differences between machine-mode and supervisor-mode interrupts as to why no `riscv-interrupt` calling convention is exposed through rustc, and similarly for why `riscv-interrupt-u` makes no appearance (as it would complicate future LLVM upgrades). [clang-attr]: https://clang.llvm.org/docs/AttributeReference.html#interrupt-risc-v [full-frame-save]: https://github.com/esp-rs/esp-riscv-rt/blob/9281af2ecffe13e40992917316f36920c26acaf3/src/lib.rs#L440-L469 [implemented by]: https://github.com/llvm/llvm-project/blob/b7fb2a3fec7c187d58a6d338ab512d9173bca987/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp#L61-L67 [callee-save]: https://github.com/llvm/llvm-project/blob/973f1fe7a8591c7af148e573491ab68cc15b6ecf/llvm/lib/Target/RISCV/RISCVCallingConv.td#L30-L37 [rfc]: https://github.com/rust-lang/rfcs/pull/3246
2023-08-08offset_of: guard against invalid use (with unsized fields)Ralf Jung-1/+6
2023-07-21Revert "Auto merge of #113166 - moulins:ref-niches-initial, r=oli-obk"David Tolnay-5/+1
This reverts commit 557359f92512ca88b62a602ebda291f17a953002, reversing changes made to 1e6c09a803fd543a98bfbe1624d697a55300a786.
2023-07-21Auto merge of #113922 - matthiaskrgr:rollup-90cj2vv, r=matthiaskrgrbors-21/+0
Rollup of 4 pull requests Successful merges: - #113887 (new solver: add a separate cache for coherence) - #113910 (Add FnPtr ty to SMIR) - #113913 (error/E0691: include alignment in error message) - #113914 (rustc_target: drop duplicate code) r? `@ghost` `@rustbot` modify labels: rollup
2023-07-21rustc_target: drop duplicate codeDavid Rheinsberg-21/+0
Drop duplicate helper methods on `Layout`, which are already implemented on `LayoutS`. Note that `Layout` has a `Deref` implementation to `LayoutS`, so all accessors are automatically redirected. The methods are identical and have been copied to `rustc_abi` in: commit 390a637e296ccfaac4c6abd1291b0523e8a8e00b Author: hamidreza kalbasi <hamidrezakalbasi@protonmail.com> Date: Mon Nov 7 00:36:11 2022 +0330 move things from rustc_target::abi to rustc_abi This commit left behind the original implementation. Drop it now. Signed-off-by: David Rheinsberg <david@readahead.eu>
2023-07-21Don't treat ref. fields with non-null niches as `dereferenceable_or_null`Moulins-1/+5