| Age | Commit message (Collapse) | Author | Lines | |
|---|---|---|---|---|
| 2024-08-25 | Add `f16` and `f128` inline ASM support for `aarch64` | beetrees | -3/+3 | |
| 2024-08-24 | Enable f16 in assembly on aarch64 platforms that support it | rongfu.leng | -3/+3 | |
| Signed-off-by: rongfu.leng <lenronfu@gmail.com> | ||||
| 2024-07-29 | Reformat `use` declarations. | Nicholas Nethercote | -39/+72 | |
| The previous commit updated `rustfmt.toml` appropriately. This commit is the outcome of running `x fmt --all` with the new formatting options. | ||||
| 2024-06-22 | compiler: Fix arm32 asm issues by hierarchically sorting reg classes | Jubilee Young | -40/+40 | |
| 2024-06-22 | Rollup merge of #126555 - beetrees:f16-inline-asm-arm, r=Amanieu | Guillaume Gomez | -5/+7 | |
| Add `f16` inline ASM support for 32-bit ARM Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).` Relevant issue: #125398 Tracking issue: #116909 `@rustbot` label +F-f16_and_f128 | ||||
| 2024-06-21 | Add `f16` inline ASM support for RISC-V | beetrees | -3/+4 | |
| 2024-06-21 | Add `f16` inline ASM support for 32-bit ARM | beetrees | -5/+7 | |
| 2024-06-13 | Add `f16` and `f128` inline ASM support for `x86` and `x86-64` | beetrees | -11/+23 | |
| 2024-04-29 | Remove `extern crate rustc_macros` from numerous crates. | Nicholas Nethercote | -20/+3 | |
| 2024-04-11 | Rollup merge of #123740 - veera-sivarajan:reduce-size-of-modifierinfo, ↵ | Matthias Krüger | -3/+3 | |
| r=petrochenkov Reduce Size of `ModifierInfo` I added `ModifierInfo` in #121940 and had used a `u64` for the `size` field even though the largest value it holds is `512`. This PR changes the type of the `size` field to `u16`. | ||||
| 2024-04-10 | Reduce size of `ModifierInfo` | Veera | -3/+3 | |
| 2024-04-10 | Add support for Arm64EC inline assembly | Daniel Paoliello | -24/+48 | |
| 2024-03-13 | Improve style | Veera | -2/+2 | |
| 2024-03-03 | Mention Register Size in `#[warn(asm_sub_register)]` | Veera | -85/+85 | |
| Fixes #121593 | ||||
| 2024-01-03 | Support reg_addr register class in s390x inline assembly | Taiki Endo | -14/+15 | |
| 2023-10-21 | update the registers of csky | dirreke | -3/+3 | |
| 2023-08-14 | add details for csky-unknown-linux-gnuabiv2 and add docs | Dirreke | -31/+17 | |
| 2023-08-14 | add a csky-unknown-linux-gnuabiv2 target | Dirreke | -0/+166 | |
| 2023-07-18 | support for mips32r6 as a target_arch value | chenx97 | -1/+1 | |
| 2023-07-18 | merge patterns | chenx97 | -2/+1 | |
| 2023-07-18 | support for mips64r6 as a target_arch value | chenx97 | -0/+1 | |
| 2023-05-12 | asm: loongarch64: Drop efiapi | WANG Rui | -2/+2 | |
| 2023-05-08 | Simplify match statement since variable arch that is predictable | WANG Rui | -5/+4 | |
| 2023-05-05 | asm: loongarch64: Implementation of clobber_abi | WANG Rui | -0/+20 | |
| 2023-04-25 | Add loongarch64 asm! support | zhaixiaojuan | -0/+157 | |
| 2023-04-12 | Add inline assembly support for m68k | Ian Douglas Scott | -0/+105 | |
| 2023-03-01 | Use FxIndexSet instead of FxHashSet for asm_target_features query. | Michael Woerister | -25/+26 | |
| 2023-01-14 | Fix some missed double spaces. | André Vennberg | -1/+1 | |
| 2023-01-05 | Fix `uninlined_format_args` for some compiler crates | nils | -24/+24 | |
| Convert all the crates that have had their diagnostic migration completed (except save_analysis because that will be deleted soon and apfloat because of the licensing problem). | ||||
| 2022-07-20 | Remove unused StableMap and StableSet types from rustc_data_structures | Michael Woerister | -4/+4 | |
| 2022-07-08 | Collapse some weirdly-wrapping derives | Michael Goulet | -48/+8 | |
| 2022-06-18 | rustc_target: Remove some redundant target properties | Vadim Petrochenkov | -1/+1 | |
| 2022-05-17 | Add ABI clobbers | Connor Horman | -0/+2 | |
| 2022-05-16 | Add tmm_reg clobbers | Connor Horman | -0/+13 | |
| 2022-04-25 | Remove references to git.io | Eric Huss | -1/+2 | |
| 2022-04-19 | asm: Add a kreg0 register class on x86 which includes k0 | Amanieu d'Antras | -8/+9 | |
| Previously we only exposed a kreg register class which excludes the k0 register since it can't be used in many instructions. However k0 is a valid register and we need to have a way of marking it as clobbered for clobber_abi. Fixes #94977 | ||||
| 2022-03-22 | Fold aarch64 feature +fp into +neon | Jubilee Young | -1/+1 | |
| Arm's FEAT_FP and Feat_AdvSIMD describe the same thing on AArch64: The Neon unit, which handles both floating point and SIMD instructions. Moreover, a configuration for AArch64 must include both or neither. Arm says "entirely proprietary" toolchains may omit floating point: https://developer.arm.com/documentation/102374/0101/Data-processing---floating-point In the Programmer's Guide for Armv8-A, Arm says AArch64 can have both FP and Neon or neither in custom implementations: https://developer.arm.com/documentation/den0024/a/AArch64-Floating-point-and-NEON In "Bare metal boot code for Armv8-A", enabling Neon and FP is just disabling the same trap flag: https://developer.arm.com/documentation/dai0527/a In an unlikely future where "Neon and FP" become unrelated, we can add "[+-]fp" as its own feature flag. Until then, we can simplify programming with Rust on AArch64 by folding both into "[+-]neon", which is valid as it supersets both. "[+-]neon" is retained for niche uses such as firmware, kernels, "I just hate floats", and so on. | ||||
| 2022-02-24 | ARM: Only allow using d16-d31 with asm! when supported by the target | Amanieu d'Antras | -1/+4 | |
| Support can be determined by checking for the "d32" LLVM feature. | ||||
| 2022-02-21 | Add tests | Amanieu d'Antras | -2/+2 | |
| 2022-02-21 | Take CodegenFnAttrs into account when validating asm! register operands | Amanieu d'Antras | -120/+94 | |
| Checking of asm! register operands now properly takes function attributes such as #[target_feature] and #[instruction_set] into account. | ||||
| 2022-02-21 | On ARM, use relocation_model to detect whether r9 should be reserved | Amanieu d'Antras | -44/+58 | |
| The previous approach of checking for the reserve-r9 target feature didn't actually work because LLVM only sets this feature very late when initializing the per-function subtarget. | ||||
| 2022-02-21 | Simplify gating of BPF w registers behind the alu32 target feature | Amanieu d'Antras | -26/+12 | |
| This is already handled by supported_types(). | ||||
| 2022-02-18 | asm: Allow the use of r8-r14 as clobbers on Thumb1 | Amanieu d'Antras | -41/+91 | |
| Previously these were entirely disallowed, except for r11 which was allowed by accident. | ||||
| 2022-01-31 | Rollup merge of #90277 - pierwill:fix-70258-inference-terms, r=jackh726 | Matthias Krüger | -1/+1 | |
| Improve terminology around "after typeck" Closes #70258. | ||||
| 2022-01-22 | Add preliminary support for inline assembly for msp430. | William D. Jones | -0/+106 | |
| 2022-01-17 | Pass target_features set instead of has_feature closure | bjorn3 | -54/+59 | |
| This avoids unnecessary monomorphizations in codegen backends | ||||
| 2022-01-17 | Use Symbol for target features in asm handling | bjorn3 | -49/+62 | |
| This saves a couple of Symbol::intern calls | ||||
| 2021-12-15 | Remove unnecessary sigils around `Symbol::as_str()` calls. | Nicholas Nethercote | -14/+14 | |
| 2021-12-10 | asm: Allow using r9 (ARM) and x18 (AArch64) if they are not reserved by | Amanieu d'Antras | -8/+65 | |
| the current target. | ||||
| 2021-12-07 | Remove the reg_thumb register class for asm! on ARM | Amanieu d'Antras | -13/+24 | |
| Also restricts r8-r14 from being used on Thumb1 targets as per #90736. | ||||
