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2023-03-01Use FxIndexSet instead of FxHashSet for asm_target_features query.Michael Woerister-25/+26
2023-01-14Fix some missed double spaces.André Vennberg-1/+1
2023-01-05Fix `uninlined_format_args` for some compiler cratesnils-24/+24
Convert all the crates that have had their diagnostic migration completed (except save_analysis because that will be deleted soon and apfloat because of the licensing problem).
2022-07-20Remove unused StableMap and StableSet types from rustc_data_structuresMichael Woerister-4/+4
2022-07-08Collapse some weirdly-wrapping derivesMichael Goulet-48/+8
2022-06-18rustc_target: Remove some redundant target propertiesVadim Petrochenkov-1/+1
2022-05-17Add ABI clobbersConnor Horman-0/+2
2022-05-16Add tmm_reg clobbersConnor Horman-0/+13
2022-04-25Remove references to git.ioEric Huss-1/+2
2022-04-19asm: Add a kreg0 register class on x86 which includes k0Amanieu d'Antras-8/+9
Previously we only exposed a kreg register class which excludes the k0 register since it can't be used in many instructions. However k0 is a valid register and we need to have a way of marking it as clobbered for clobber_abi. Fixes #94977
2022-03-22Fold aarch64 feature +fp into +neonJubilee Young-1/+1
Arm's FEAT_FP and Feat_AdvSIMD describe the same thing on AArch64: The Neon unit, which handles both floating point and SIMD instructions. Moreover, a configuration for AArch64 must include both or neither. Arm says "entirely proprietary" toolchains may omit floating point: https://developer.arm.com/documentation/102374/0101/Data-processing---floating-point In the Programmer's Guide for Armv8-A, Arm says AArch64 can have both FP and Neon or neither in custom implementations: https://developer.arm.com/documentation/den0024/a/AArch64-Floating-point-and-NEON In "Bare metal boot code for Armv8-A", enabling Neon and FP is just disabling the same trap flag: https://developer.arm.com/documentation/dai0527/a In an unlikely future where "Neon and FP" become unrelated, we can add "[+-]fp" as its own feature flag. Until then, we can simplify programming with Rust on AArch64 by folding both into "[+-]neon", which is valid as it supersets both. "[+-]neon" is retained for niche uses such as firmware, kernels, "I just hate floats", and so on.
2022-02-24ARM: Only allow using d16-d31 with asm! when supported by the targetAmanieu d'Antras-1/+4
Support can be determined by checking for the "d32" LLVM feature.
2022-02-21Add testsAmanieu d'Antras-2/+2
2022-02-21Take CodegenFnAttrs into account when validating asm! register operandsAmanieu d'Antras-120/+94
Checking of asm! register operands now properly takes function attributes such as #[target_feature] and #[instruction_set] into account.
2022-02-21On ARM, use relocation_model to detect whether r9 should be reservedAmanieu d'Antras-44/+58
The previous approach of checking for the reserve-r9 target feature didn't actually work because LLVM only sets this feature very late when initializing the per-function subtarget.
2022-02-21Simplify gating of BPF w registers behind the alu32 target featureAmanieu d'Antras-26/+12
This is already handled by supported_types().
2022-02-18asm: Allow the use of r8-r14 as clobbers on Thumb1Amanieu d'Antras-41/+91
Previously these were entirely disallowed, except for r11 which was allowed by accident.
2022-01-31Rollup merge of #90277 - pierwill:fix-70258-inference-terms, r=jackh726Matthias Krüger-1/+1
Improve terminology around "after typeck" Closes #70258.
2022-01-22Add preliminary support for inline assembly for msp430.William D. Jones-0/+106
2022-01-17Pass target_features set instead of has_feature closurebjorn3-54/+59
This avoids unnecessary monomorphizations in codegen backends
2022-01-17Use Symbol for target features in asm handlingbjorn3-49/+62
This saves a couple of Symbol::intern calls
2021-12-15Remove unnecessary sigils around `Symbol::as_str()` calls.Nicholas Nethercote-14/+14
2021-12-10asm: Allow using r9 (ARM) and x18 (AArch64) if they are not reserved byAmanieu d'Antras-8/+65
the current target.
2021-12-07Remove the reg_thumb register class for asm! on ARMAmanieu d'Antras-13/+24
Also restricts r8-r14 from being used on Thumb1 targets as per #90736.
2021-12-06Implement inline asm! for AVR platformAndrew Dona-Couch-0/+221
2021-11-10Update more rustc/libtest things for wasm64Alex Crichton-3/+7
* Add wasm64 variants for inline assembly along the same lines as wasm32 * Update a few directives in libtest to check for `target_family` instead of `target_arch` * Update some rustc codegen and typechecks specialized for wasm32 to also work for wasm64.
2021-11-06Improve terminology around "after typeck"pierwill-1/+1
2021-09-01Rollup merge of #88350 - programmerjake:add-ppc-cr-xer-clobbers, r=AmanieuMara Bos-10/+61
add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC Fixes #88315
2021-08-28Auto merge of #88245 - Sl1mb0:s390-asm, r=Amanieubors-0/+131
S390x inline asm This adds register definitions and constraint codes for the s390x general and floating point registers necessary for fixing #85931; as well as a few tests. Further testing is needed, but I am a little unsure of what specific tests should be added to `src/test/assembly/asm/s390x.rs` to address this.
2021-08-25add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPCJacob Lifshay-10/+61
Fixes #88315
2021-08-23Fix: made suggested changelinux1-1/+1
2021-08-23Refactor: disabled frame pointer; consolidated unsupported register errors; ↵linux1-68/+18
added register prefix
2021-08-22Fix: appeased x.py test tidy --blesslinux1-6/+6
2021-08-22Feat: further testing & support for i64 general register uselinux1-1/+1
2021-08-22Feat: added s390x reg-definitions, constraint codes, and testslinux1-26/+26
2021-08-22Feat: added inline asm support for s390xlinux1-0/+181
2021-08-22Fix typos “a”→“an”Frank Steffahn-1/+1
2021-08-12Add support for clobber_abi to asm!Amanieu d'Antras-0/+182
2021-07-11Auto merge of #86416 - Amanieu:asm_clobber_only, r=nagisabors-36/+116
Add clobber-only register classes for asm! These are needed to properly express a function call ABI using a clobber list, even though we don't support passing actual values into/out of these registers.
2021-07-10Add AArch64 z* registers as aliases for v* registersAmanieu d'Antras-32/+32
2021-07-10Add clobber-only register classes for asm!Amanieu d'Antras-4/+84
These are needed to properly express a function call ABI using a clobber list, even though we don't support passing actual values into/out of these registers.
2021-05-23Add support for BPF inline assemblyAlessandro Decina-0/+154
2021-05-16Auto merge of #85312 - ehuss:macro_use-unused-attr, r=petrochenkovbors-3/+0
Fix unused attributes on macro_rules. The `unused_attributes` lint wasn't firing on attributes of `macro_rules` definitions. The consequence is that many attributes are silently ignored on `macro_rules`. The reason is that `unused_attributes` is a late-lint pass, and only has access to the HIR, which does not have macro_rules definitions. My solution here is to change `non_exported_macro_attrs` to be `macro_attrs` (a list of all attributes used for `macro_rules`, instead of just those for `macro_export`), and then to check this list in the `unused_attributes` lint. There are a number of alternate approaches, but this seemed the most reliable and least invasive. I am open to completely different approaches, though. One concern is that I don't fully understand the implications of extending `non_exported_macro_attrs` to include non-exported macros. That list was originally added in #62042 to handle stability attributes, so I suspect it was just an optimization since that was all that was needed. It was later extended to be included in SVH in #83901. #80641 also added a use to check for `invalid` attributes, which seems a little odd to me (it didn't validate non-exported macros, and seems highly specific). Overall, there doesn't seem to be a clear story of when `unused_attributes` should be used versus an error like E0518. I considered alternatively using an "allow list" of built-in attributes that can be used on macro_rules (allow, warn, deny, forbid, cfg, cfg_attr, macro_export, deprecated, doc), but I feel like that could be a pain to maintain. Some built-in attributes already present hard-errors when used with macro_rules. These are each hard-coded in various places: - `derive` - `test` and `bench` - `proc_macro` and `proc_macro_derive` - `inline` - `global_allocator` The primary motivation is that I sometimes see people use `#[macro_use]` in front of `macro_rules`, which indicates there is some confusion out there (evident that there was even a case of it in rustc).
2021-05-15Fix unused attributes on macro_rules.Eric Huss-3/+0
2021-05-13Add asm!() support for PowerPC64Dr. Chat-5/+15
2021-05-11Add initial asm!() support for PowerPCDr. Chat-0/+171
This includes GPRs and FPRs only
2021-05-01Reserve x18 on AArch64 and un-reserve x16Amanieu d'Antras-3/+3
2021-04-28Be stricter about rejecting LLVM reserved registers in asm!Amanieu d'Antras-9/+42
2021-04-05Disallow the use of high byte registes as operands on x86_64Amanieu d'Antras-11/+3
They are still allowed on x86 though. Fixes #83495
2021-03-14Address review commentsAmanieu d'Antras-7/+7