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2025-07-18exclude generated rust programs from the workspaceFolkert de Vries-1/+2
2025-01-16PR feedback & pipelineJames Barford-Evans-8/+1
2025-01-16Remove old ARM intrinsic generatorJames Barford-Evans-1/+0
2025-01-16Generator supports creating neon instructions from YAMLJames Barford-Evans-1/+0
2025-01-16Generator for SVE intrinsics.Luca Vizzarro-0/+12
Co-authored-by: Jamie Cunliffe <Jamie.Cunliffe@arm.com> Co-authored-by: Jacob Bramley <jacob.bramley@arm.com> Co-authored-by: Luca Vizzarro <Luca.Vizzarro@arm.com> Co-authored-by: Adam Gemmell <adam.gemmell@arm.com>
2024-09-30Add all crates to workspaceYuri Astrakhan-10/+2
I am not certain why some crates are missing - it might be by accident or on purpose, so feel free to reject. This makes sure no crate is missed by accident, and also removed the non-existent `wasm-assert-instr-tests` crate. P.S. Also, added some crate-level lints, but perhaps these should be added to all crates in the workspace?
2024-02-28Add intrinsic code generator for LoongArchZHAI Xiang-0/+1
Co-authored-by: WANG Rui <wangrui@loongson.cn>
2024-02-28stdarch-gen: Move to stdarch-gen-armWANG Rui-1/+1
2023-05-31Explicitly set the cargo resolverEric Huss-0/+1
2021-09-09Intrinsic test tool to compare neon intrinsics with C (#1170)Jamie Cunliffe-0/+1
2020-04-07Implement additional ARM NEON intriniscs (#792)Heinz N. Gies-0/+1
2019-07-09Update repo namegnzlbg-1/+1
2019-01-22Refactor stdsimdgnzlbg-1/+3
This commit: * renames `coresimd` to `core_arch` and `stdsimd` to `std_detect` * `std_detect` does no longer depend on `core_arch` - it is a freestanding `no_std` library that only depends on `core` - it is renamed to `std_detect` * moves the top-level coresimd and stdsimd directories into the appropriate crates/... directories - this simplifies creating crate.io releases of these crates * moves the top-level `coresimd` and `stdsimd` sub-directories into their corresponding crates in `crates/{core_arch, std_detect}`.
2018-12-14Start adding some avx512 intrinsics (#618)Alex Crichton-0/+2
First one is the quite simple `_mm512_abs_epi32` intrinsic!
2018-08-15Add wasm32 simd128 intrinsics (#549)gnzlbg-0/+3
* Add wasm32 simd128 intrinsics * test wasm32 simd128 instructions * Run wasm tests like all other tests * use modules instead of types to access wasm simd128 interpretations * generate docs for wasm32-unknown-unknown * fix typo * Enable #[assert_instr] on wasm32 * Shell out to Node's `execSync` to execute `wasm2wat` over our wasm file * Parse the wasm file line-by-line, looking for various function markers and such * Use the `elem` section to build a function pointer table, allowing us to map exactly from function pointer to a function * Avoid losing debug info (the names section) in release mode by stripping `--strip-debug` from `rust-lld`. * remove exclude list from Cargo.toml * fix assert_instr for non-wasm targets * re-format assert-instr changes * add crate that uses assert_instr * Fix instructions having extra quotes * Add assert_instr for wasm memory intrinsics * Remove hacks for git wasm-bindgen * add wasm_simd128 feature * make wasm32 build correctly * run simd128 tests on ci * remove wasm-assert-instr-tests
2018-02-18Reorganize and refactor source tree (#324)Alex Crichton-36/+4
With RFC 2325 looking close to being accepted, I took a crack at reorganizing this repository to being more amenable for inclusion in libstd/libcore. My current plan is to add stdsimd as a submodule in rust-lang/rust and then use `#[path]` to include the modules directly into libstd/libcore. Before this commit, however, the source code of coresimd/stdsimd themselves were not quite ready for this. Imports wouldn't compile for one reason or another, and the organization was also different than the RFC itself! In addition to moving a lot of files around, this commit has the following major changes: * The `cfg_feature_enabled!` macro is now renamed to `is_target_feature_detected!` * The `vendor` module is now called `arch`. * Under the `arch` module is a suite of modules like `x86`, `x86_64`, etc. One per `cfg!(target_arch)`. * The `is_target_feature_detected!` macro was removed from coresimd. Unfortunately libcore has no ability to export unstable macros, so for now all feature detection is canonicalized in stdsimd. The `coresimd` and `stdsimd` crates have been updated to the planned organization in RFC 2325 as well. The runtime bits saw the largest amount of refactoring, seeing a good deal of simplification without the core/std split.
2018-01-19Add an example of SIMD-powered hex encoding (#291)Alex Crichton-0/+2
This is lifted from an example elsewhere I found and shows off runtime dispatching along with a lot of intrinsics being used in a bunch.
2018-01-18Update links in Cargo.toml to rust-lang-nursery/stdsimd (#288)messense-6/+6
2018-01-09More run-time detection improvements (#242)gnzlbg-0/+3
* [core/runtime] use getauxval on non-x86 platforms * test coresimd::auxv against auxv crate * add test files from auxv crate * [arm] use simd_test macro * formatting * missing docs * improve docs * reading /proc/self/auxv succeeds only if reading all fields succeeds * remove cc-crate build dependency * getauxval succeeds only if hwcap/hwcap2 are non-zero * fix formatting * move getauxval to stdsimd * delete getauxval-wrapper.c * remove auxv crate dev-dependency from coresimd
2018-01-03Turn down debug level on release modeAlex Crichton-1/+1
Apparently helps fix errors about codeview registers on MSVC!
2017-12-29Verify Intel intrinsics against upstream definitions (#251)Alex Crichton-0/+1
This commit adds a new crate for testing that the intrinsics listed in this crate do indeed match the upstream definition of each intrinsic. A pre-downloaded XML description of all Intel intrinsics is checked in which is then parsed in the `stdsimd-verify` crate to verify that everything we write down is matched against the upstream definitions. Currently the checks are pretty loose to get this compiling but a few intrinsics were fixed as a result of this. For example: * `_mm256_extract_epi8` - AVX2 intrinsic erroneously listed under AVX * `_mm256_extract_epi16` - AVX2 intrinsic erroneously listed under AVX * `_mm256_extract_epi32` - AVX2 intrinsic erroneously listed under AVX * `_mm256_extract_epi64` - AVX2 intrinsic erroneously listed under AVX * `_mm_tzcnt_32` - erroneously had `u32` in the name * `_mm_tzcnt_64` - erroneously had `u64` in the name * `_mm_cvtsi64_si128` - erroneously available on 32-bit platforms * `_mm_cvtsi64x_si128` - erroneously available on 32-bit platforms * `_mm_cvtsi128_si64` - erroneously available on 32-bit platforms * `_mm_cvtsi128_si64x` - erroneously available on 32-bit platforms * `_mm_extract_epi64` - erroneously available on 32-bit platforms * `_mm_insert_epi64` - erroneously available on 32-bit platforms * `_mm256_extract_epi16` - erroneously returned i32 instead of i16 * `_mm256_extract_epi8` - erroneously returned i32 instead of i8 * `_mm_shuffle_ps` - the mask argument was erroneously i32 instead of u32 * `_popcnt32` - the signededness of the argument and return were flipped * `_popcnt64` - the signededness of the argument was flipped and the argument was too large bit-wise * `_mm_tzcnt_32` - the return value's sign was flipped * `_mm_tzcnt_64` - the return value's sign was flipped * A good number of intrinsics used `imm8: i8` or `imm8: u8` instead of `imm8: i32` which Intel was using. (we were also internally inconsistent) * A number of intrinsics working with `__m64` were instead working with i64/u64, so they're now corrected to operate with the vector types instead. Currently the verifications performed are: * Each name in Rust is defined in the XML document * The arguments/return values all agree. * The CPUID features listed in the XML document are all enabled in Rust as well. The type matching right now is pretty loose and has a lot of questionable changes. Future commits will touch these up to be more strict and require closer adherence with Intel's own types. Otherwise types like `i32x8` (or any integers with 256 bits) all match up to `__m256i` right now, althoguh this may want to change in the future. Finally we're also not testing the instruction listed in the XML right now. There's a huge number of discrepancies between the instruction listed in the XML and the instruction listed in `assert_instr`, and those'll need to be taken care of in a future commit. Closes #240
2017-11-22Use workspaces and fix testsAlex Crichton-1/+3
* Enable a Cargo workspace for the repo * Disable tests for proc-macro crates * Move back to mounting source directory read-only * Refactor test invocation to only test one crate with `--all`
2017-11-22Only coresimd depends on stdsimd-test.gnzlbg-4/+0
2017-11-22refactor no_std components into the coresimd crategnzlbg-8/+9
2017-11-21Upgrade to cupid 0.0.5 and cleanup duplicated code in x86 run-time (#203)gnzlbg-1/+1
* [ci] upgrade to cupid 0.0.5 * [runtime x86] cleanup duplicated code
2017-11-19refactor the x86 module (#195)gnzlbg-1/+5
* refactor the x86 module * document the i686 check * document strict and intel_sde feature * document nvptx module
2017-11-17[ci] add intel_sde featuregnzlbg-1/+2
2017-11-17[x86] cleanup run-time; add SSE4a, AVX-512, and xsavegnzlbg-1/+1
2017-11-17add support for no_stdgnzlbg-0/+1
2017-10-30Bump to 0.0.3Alex Crichton-2/+2
2017-10-23update readme and crates.io badges, categories, etc. (#141)gnzlbg-3/+11
* [readme] badges * [crates.io] add badges, categories, etc.
2017-10-22Deny all warnings and fix errors (#135)gnzlbg-0/+3
* [travis-ci] deny warnings * fix all warnings
2017-09-26Add a test for x86 runtime supportAlex Crichton-0/+1
Make sure we agree with the `cupid` crate
2017-09-26Always test intrinsics unconditionallyAlex Crichton-1/+1
This commit alters the test suite to unconditionally compile and run all tests, regardless of the ambient target features enabled. This then uses a new convenience macro, `#[simd_test]`, to guard all tests with the appropriate `cfg_feature_enabled!` and also enable the `#[target_feature]` appropriately.
2017-09-25Add license filesAlex Crichton-2/+2
Closes #12
2017-09-25Merge pull request #31 from gnzlbg/runtime_detectionAlex Crichton-1/+1
[runtime] initial run-time feature detection support
2017-09-21Help debug missing assemblyAlex Crichton-1/+1
2017-09-21Merge branch 'master' into runtime_detectiongnzlbg-1/+8
2017-09-20[runtime] initial run-time feature detection supportgnzlbg-1/+1
2017-09-20Add assertions correct instructions are generatedAlex Crichton-0/+7
This commit adds a procedural macro which can be used to test instruction generation in a lightweight way. The intention is that all functions are annotated with: #[cfg_attr(test, assert_instr(maxps))] fn foo(...) { // ... } and then during `cargo test --release` it'll assert the function `foo` does indeed generate the instruction `maxps`. This only activates tests in optimized mode to avoid debug mode inefficiencies, and it uses a literal invocation of `objdump` and some parsing to figure out what instructions are inside each function. Finally it also uses the `backtrace` crate to figure out the symbol name of the relevant function and hook that up to the output of `objdump`. I added a few assertions in the `sse` module to get some feedback, but curious what y'all think of this!
2017-09-170.0.2Andrew Gallant-1/+1
2017-09-17add doc linkAndrew Gallant-0/+1
2017-09-17prepare for publishAndrew Gallant-1/+0
2016-11-27progressAndrew Gallant-0/+1
2016-11-24scratchAndrew Gallant-0/+3
2016-11-24initial commitAndrew Gallant-0/+11