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2025-07-16Bump versions in CIsayantn-9/+11
- `clang-19` -> `clang-20` in ARM - `gcc-14.2` -> `gcc-14.3` in AArch64-BE - `gcc-14` ->`gcc-15` in LA64 - `riscv-gnu-v2025.01.20` -> `riscv-gnu-v2025.07.03` in Risc-V 32 - `wasmtime-v18.0.2` -> `wasmtime-v34.0.1`
2025-07-16Update Docker OS to Ubuntu-25.10sayantn-19/+19
2025-07-16Update SDE to v9.58.0sayantn-23/+15
2025-05-06Add `riscv32` CI runsayantn-0/+15
2025-05-03pr feedback - take the instruction count bump out of DockerfileJames Barford-Evans-3/+0
2025-05-03fix - aarch64_be testsJames Barford-Evans-1/+4
2025-04-20Remove `x86_64-unknown-linux-gnu` runsayantn-19/+12
+ Rename `x86_64-unknown-linux-gnu-emulated` run to `x86_64-unknown-linux-gnu`
2025-04-20Add `test-everything` annotations to more archs to ensure test coverage, and ↵sayantn-3/+8
some small changes to make CI pass - Disable `vsx` tests for `ppc` and `ppc64` - Disable `tme` tests for `aarch64` and `aarch64_be` - Disable `frecipe` tests for `loongarch64` - Add `altivec` run for PPC32 (with `-C target-feature=+vsx` `qemu` gives a nasty error)
2025-04-20Upgrade qemu CPU to `max`sayantn-13/+10
- `ppc32` doesn't have `max` cpu model, so set it to `mpc8610`
2025-04-20Replace `cfg(stdarch_intel_sde)` with `STDARCH_TEST_SKIP_FUNCTION`sayantn-0/+2
2025-04-20Change test skipping logic a little, separate feature-based and ↵sayantn-1/+3
function-based skipping
2025-04-20Upgrade CI OS versionssayantn-19/+19
+ Bump ubuntu to 25.04, windows to `windows-2025`, macos-arm to `macos-15` and macos-x86 to `macos-15-large`
2025-04-07Update SDE to 9.53.0sayantn-14/+24
2025-03-16Update SDE mirror to ci-mirrors.rust-lang.orgSayantan Chakraborty-3/+4
This is to combat the spurious CI failures in emulated run. Also helps with updatability and compatibility - it will work even if Intel changes the link
2025-02-24tidy up proposed Dockerfile & run.shJames Barford-Evans-13/+29
2025-02-24update clang to clang-19James Barford-Evans-4/+4
2025-02-24Update CI to facilitate big endian at some pointJames Barford-Evans-0/+13
2025-01-20add `clang` to the `s390x` DockerFileFolkert de Vries-1/+2
2024-12-21Upgrade Intel SDEsayantn-6/+6
2024-12-21Re-enable the disabled PPC tests, Upgrade CPUsayantn-4/+4
2024-11-03ci: Use distro toolchain for loongarch64-unknown-linux-gnuWANG Rui-15/+10
2024-09-22Upgrade Intel SDE to v9.44Sayantan Chakraborty-5/+5
Re-enabled `assert_instr`
2024-08-19Add loongarch64-unknown-linux-gnu to CIEduardo Sánchez Muñoz-0/+16
2024-06-30Added support for AMD verificationsayantn-1/+64
Added a custom cpuid file for sde, which enables SSE4a, XOP, TBM and VP2INTERSECT. Fixed `xsave` tests
2024-06-30Updates SDEsayantn-6/+5
Updated SDE to v9.33.0 Disabled `assert-instr` in emulated run
2024-06-29Fixing CIsayantn-16/+16
Fixed x86_64-apple-darwin freezing. Bump all docker to Ubuntu-24.04 (except for emulated and armv7)
2024-03-05Update to `wasm32-wasip1`-based testingAlex Crichton-16/+13
This commit is a replacement for #1417 now that rust-lang/rust#12046 has landed. While I was here I went ahead and updated the Wasmtime used in CI and adapted its command line as well.
2023-09-22Fix: #1464 for rv64 zkGijs Burghoorn-3/+7
2023-09-01Fix: Testing for RISC-V Zb intrinsicsGijs Burghoorn-1/+1
2023-08-31Fix: Add proper flags for RISCV64 ciGijs Burghoorn-4/+3
2023-05-15Remove ACLE submoduleAdam Gemmell-2/+2
This involves moving from the ACLE intrinsic definitions (which aren't available for SVE at this point) to a JSON file. This was derived from ARM's documentation[^1], and then relicensed under `MIT OR Apache-2.0` for use in this repository. [^1]: https://developer.arm.com/architectures/instruction-sets/intrinsics
2023-04-21Fix PATH reference to Wasmtime versionAlex Crichton-1/+1
2023-04-21Use Wasmtime 8.0.0 on CIAlex Crichton-1/+1
This moves from the "dev" release of Wasmtime, used for its relaxed-simd support, to an official release of Wasmtime just made which is the first with relaxed-simd support.
2023-03-19Don't try to be clever with archAlex Crichton-2/+2
2023-03-19wasm32: Add relaxed simd instructionsAlex Crichton-4/+3
This commit adds intrinsics to the `wasm32` to support the [relaxed SIMD proposal][proposal]. These are added with the same naming conventions of existing simd-related intrinsics for wasm which is similar to the instruction name but matches sign in a few places. This additionally updates Wasmtime to execute tests with support for the relaxed simd proposal. No release has been made yet so this uses the `dev` release, and I can make a PR in April when the support in Wasmtime has been released to an official release. The `wasmprinter` crate is also updated to understand these instruction opcodes as well. Documentation has been added for all intrinsics, but tests have only been added for some of them so far. I hope to follow-up later with more tests. [proposal]: https://github.com/WebAssembly/relaxed-simd
2022-10-25Remove Android CI (#1346)Amanieu d'Antras-121/+0
2022-10-04Update the Android Docker files to Ubuntu 22.04 (#1338)Chris Wailes-14/+12
2022-08-12Update ubuntu 21.10 docker containers to 22.04Amanieu d'Antras-3/+3
Ubuntu 22.10 is EOL.
2021-12-14Fix a bunch of typosFrank Steffahn-1/+1
2021-12-09Import the asm! macro from core::arch (#1265)Amanieu d'Antras-0/+10
2021-12-04Update the intrinsic checker tool (#1258)Amanieu d'Antras-4/+8
2021-09-09Intrinsic test tool to compare neon intrinsics with C (#1170)Jamie Cunliffe-1/+5
2021-08-03Add tests for remaining wasm simd intrinsicsAlex Crichton-3/+2
Wasmtime now supports all of the simd proposal, so this commit uncomments instruction assertions and tests, while also adding more tests, for all wasm simd instructions. This means that all wasm simd instructions should be tested and have running instruction assertions, except for `i64x2.abs`, which will require an LLVM upgrade to LLVM 13.
2021-04-07Updates for wasm simd support (#1110)Alex Crichton-12/+4
* Uncomment some i64-related instruction assertions now that LLVM supports the opcodes. * Fix the codegen for `{i,u}32x4_trunc_sat_f32x4`. This was originally introduced using `simd_cast` but that inherits LLVM's UB related to float-to-integer casts out of bounds. Since the original inception of these intrinsics in LLVM dedicated intrinsics for the wasm instructions have been added, so this swithces the implementation to using those. * Uncomment `f64x2_convert_low_i32x4` instruction assertion and add a test now that this is implemented in Wasmtime.
2021-03-21Unconditionally expose wasm atomic intrinsicsAlex Crichton-0/+2
While they're not very useful in single-threaded mode this makes them more useful for building libraries because you don't have to always recompile the standard library to get the desired effect. Additionally it helps us enable tests on CI for these functions, since the instructions will now validate without shared memory (thankfully!).
2021-03-21More wasm SIMD updatesAlex Crichton-4/+12
* Sync with the latest LLVM which has a few new intrinsic names * Move explicit tests back to `assert_instr` since `assert_instr` now supports specifying const-generic arguments inline. * Enable tests where wasmtime implements the instruction as well as LLVM. * Ensure there are tests for all functions that can be tested at this time (those that aren't unimplemented in wasmtime). There's still a number of `assert_instr` tests that are commented out. These are either because they're unimplemented in wasmtime at the moment or LLVM doesn't have an implementation for the instruction yet.
2021-03-11Update WebAssembly SIMD/Atomics (#1073)Alex Crichton-2/+2
2021-02-14Enable WASM CI (#1006)Daniel Liu-2/+2
2021-02-10Implement avx512bf16 intrinsics (#998)kangshan1157-4/+5
2020-07-18Update and revamp wasm32 SIMD intrinsics (#874)Alex Crichton-40/+16
Lots of time and lots of things have happened since the simd128 support was first added to this crate. Things are starting to settle down now so this commit syncs the Rust intrinsic definitions with the current specification (https://github.com/WebAssembly/simd). Unfortuantely not everything can be enabled just yet but everything is in the pipeline for getting enabled soon. This commit also applies a major revamp to how intrinsics are tested. The intention is that the setup should be much more lightweight and/or easy to work with after this commit. At a high-level, the changes here are: * Testing with node.js and `#[wasm_bindgen]` has been removed. Instead intrinsics are tested with Wasmtime which has a nearly complete implementation of the SIMD spec (and soon fully complete!) * Testing is switched to `wasm32-wasi` to make idiomatic Rust bits a bit easier to work with (e.g. `panic!)` * Testing of this crate's simd128 feature for wasm is re-enabled. This will run on CI and both compile and execute intrinsics. This should bring wasm intrinsics to the same level of parity as x86 intrinsics, for example. * New wasm intrinsics have been added: * `iNNxMM_loadAxA_{s,u}` * `vNNxMM_load_splat` * `v8x16_swizzle` * `v128_andnot` * `iNNxMM_abs` * `iNNxMM_narrow_*_{u,s}` * `iNNxMM_bitmask` - commented out until LLVM is updated to LLVM 11 * `iNNxMM_widen_*_{u,s}` - commented out until bytecodealliance/wasmtime#1994 lands * `iNNxMM_{max,min}_{u,s}` * `iNNxMM_avgr_u` * Some wasm intrinsics have been removed: * `i64x2_trunc_*` * `f64x2_convert_*` * `i8x16_mul` * The `v8x16.shuffle` instruction is exposed. This is done through a `macro` (not `macro_rules!`, but `macro`). This is intended to be somewhat experimental and unstable until we decide otherwise. This instruction has 16 immediate-mode expressions and is as a result unsuited to the existing `constify_*` logic of this crate. I'm hoping that we can game out over time what a macro might look like and/or look for better solutions. For now, though, what's implemented is the first of its kind in this crate (an architecture-specific macro), so some extra scrutiny looking at it would be appreciated. * Lots of `assert_instr` annotations have been fixed for wasm. * All wasm simd128 tests are uncommented and passing now. This is still missing tests for new intrinsics and it's also missing tests for various corner cases. I hope to get to those later as the upstream spec itself gets closer to stabilization. In the meantime, however, I went ahead and updated the `hex.rs` example with a wasm implementation using intrinsics. With it I got some very impressive speedups using Wasmtime: test benches::large_default ... bench: 213,961 ns/iter (+/- 5,108) = 4900 MB/s test benches::large_fallback ... bench: 3,108,434 ns/iter (+/- 75,730) = 337 MB/s test benches::small_default ... bench: 52 ns/iter (+/- 0) = 2250 MB/s test benches::small_fallback ... bench: 358 ns/iter (+/- 0) = 326 MB/s or otherwise using Wasmtime hex encoding using SIMD is 15x faster on 1MB chunks or 7x faster on small <128byte chunks. All of these intrinsics are still unstable and will continue to be so presumably until the simd proposal in wasm itself progresses to a later stage. Additionaly we'll still want to sync with clang on intrinsic names (or decide not to) at some point in the future. * wasm: Unconditionally expose SIMD functions This commit unconditionally exposes SIMD functions from the `wasm32` module. This is done in such a way that the standard library does not need to be recompiled to access SIMD intrinsics and use them. This, hopefully, is the long-term story for SIMD in WebAssembly in Rust. It's unlikely that all WebAssembly runtimes will end up implementing SIMD so the standard library is unlikely to use SIMD any time soon, but we want to make sure it's easily available to folks! This commit enables all this by ensuring that SIMD is available to the standard library, regardless of compilation flags. This'll come with the same caveats as x86 support, where it doesn't make sense to call these functions unless you're enabling simd support one way or another locally. Additionally, as with x86, if you don't call these functions then the instructions won't show up in your binary. While I was here I went ahead and expanded the WebAssembly-specific documentation for the wasm32 module as well, ensuring that the current state of SIMD/Atomics are documented.