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2018-04-26fix errors/warnings from the stabilization of cfg_target_feature and ↵gnzlbg-4/+3
target_feature (#432) * fix build after stabilization of cfg_target_feature and target_feature * fix doc tests * fix spurious unused_attributes warning * fix more unused attribute warnings * More unnecessary target features * Remove no longer needed trait imports * Remove fixed upstream workarounds * Fix parsing the #[assert_instr] macro Following upstream proc_macro changes * Fix form and parsing of #[simd_test] * Don't use Cargo features for testing modes Instead use RUSTFLAGS with `--cfg`. This'll help us be compatible with the latest Cargo where a tweak to workspaces and features made the previous invocations we had invalid. * Don't thread RUSTFLAGS through docker * Re-gate on x86 verification Closes #411
2018-03-27rustfmtJason Davies-3/+3
2018-03-22add tests for endian-dependent behavior (#394)gnzlbg-5/+17
* add tests for endian-dependent behavior * format
2018-03-20add arm neon vector types (#384)gnzlbg-5/+5
2018-03-09Add initial wasm memory grow/current intrinsics (#361)Alex Crichton-0/+47
This exposes access to the `grow_memory` and `current_memory` instructions provided by wasm in what will hopefully be a stable interface (the stable part being x86 first in theory).
2018-03-07Rename `is_target_feature_detected!` (#346)Alex Crichton-10/+10
This commit renames the `is_target_feature_detected!` macro to have different names depending on the platform. For example: * `is_x86_feature_detected!` * `is_arm_feature_detected!` * `is_aarch64_feature_detected!` * `is_powerpc64_feature_detected!` Each macro already has a platform-specific albeit similar interface. Currently, though, each macro takes a different set of strings so the hope is that like with the name of the architecture in the module we can signal the dangers of using the macro in a platform-agnostic context. One liberty taken with the macro currently though is to on both the x86 and x86_64 architectures name the macro `is_x86_feature_detected` rather than also having an `is_x86_64_feature_detected`. This mirrors, however, how all the intrinsics are named the same on x86/x86_64.
2018-03-05Prepare portable packed vector types for RFCs (#338)gnzlbg-9/+15
* Prepare portable packed SIMD vector types for RFCs This commit cleans up the implementation of the Portable Packed Vector Types (PPTV), adds some new features, and makes some breaking changes. The implementation is moved to `coresimd/src/ppvt` (they are still exposed via `coresimd::simd`). As before, the vector types of a certain width are implemented in the `v{width}` submodules. The `macros.rs` file has been rewritten as an `api` module that exposes the macros to implement each API. It should now hopefully be really clear where each API is implemented, and which types implement these APIs. It should also now be really clear which APIs are tested and how. - boolean vectors of the form `b{element_size}x{number_of_lanes}`. - reductions: arithmetic, bitwise, min/max, and boolean - only the facade, and a naive working implementation. These need to be implemented as `llvm.experimental.vector.reduction.{...}` but this needs rustc support first. - FromBits trait analogous to `{f32,f64}::from_bits` that perform "safe" transmutes. Instead of writing `From::from`/`x.into()` (see below for breaking changes) now you write `FromBits::from_bits`/`x.into_bits()`. - portable vector types implement `Default` and `Hash` - tests for all portable vector types and all portable operations (~2000 new tests). - (hopefully) comprehensive implementation of bitwise transmutes and lane-wise casts (before `From` and the `.as_...` methods where implemented "when they were needed". - documentation for PPTV (not great yet, but better than nothing) - conversions/transmutes from/to x86 architecture specific vector types - `store/load` API has been replaced with `{store,load}_{aligned,unaligned}` - `eq,ne,lt,le,gt,ge` APIs now return boolean vectors - The `.as_{...}` methods have been removed. Lane-wise casts are now performed by `From`. - `From` now perform casts (see above). It used to perform bitwise transmutes. - `simd` vectors' `replace` method's result is now `#[must_use]`. * enable backtrace and nocapture * unalign load/store fail test by 1 byte * update arm and aarch64 neon modules * fix arm example * fmt * clippy and read example that rustfmt swallowed * reductions should take self * rename add/mul -> sum/product; delete other arith reductions * clean up fmt::LowerHex impl * revert incorret doc change * make Hash equivalent to [T; lanes()] * use travis_wait to increase timeout limit to 20 minutes * remove travis_wait; did not help * implement reductions on top of the llvm.experimental.vector.reduction intrinsics * implement cmp for boolean vectors * add missing eq impl file * implement default * rename llvm intrinsics * fix aarch64 example error * replace #[inline(always)] with #[inline] * remove cargo clean from run.sh * workaround broken product in aarch64 * make boolean vector constructors const fn * fix more reductions on aarch64 * fix min/max reductions on aarch64 * remove whitespace * remove all boolean vector types except for b8xN * use a sum reduction fallback on aarch64 * disable llvm add reduction for aarch64 * rename the llvm intrinsics to use llvm names * remove old macros.rs file
2018-02-25Compile examples on CI (#329)Alex Crichton-13/+19
Make sure the top-level `examples` folder is registered with the `stdsimd` crate!
2018-02-18Reorganize and refactor source tree (#324)Alex Crichton-10/+10
With RFC 2325 looking close to being accepted, I took a crack at reorganizing this repository to being more amenable for inclusion in libstd/libcore. My current plan is to add stdsimd as a submodule in rust-lang/rust and then use `#[path]` to include the modules directly into libstd/libcore. Before this commit, however, the source code of coresimd/stdsimd themselves were not quite ready for this. Imports wouldn't compile for one reason or another, and the organization was also different than the RFC itself! In addition to moving a lot of files around, this commit has the following major changes: * The `cfg_feature_enabled!` macro is now renamed to `is_target_feature_detected!` * The `vendor` module is now called `arch`. * Under the `arch` module is a suite of modules like `x86`, `x86_64`, etc. One per `cfg!(target_arch)`. * The `is_target_feature_detected!` macro was removed from coresimd. Unfortunately libcore has no ability to export unstable macros, so for now all feature detection is canonicalized in stdsimd. The `coresimd` and `stdsimd` crates have been updated to the planned organization in RFC 2325 as well. The runtime bits saw the largest amount of refactoring, seeing a good deal of simplification without the core/std split.
2018-02-02Run-time feature detection for AES-NI and TSC (#312)gnzlbg-45/+76
* add runtime detection for aes-ni * fmtting and fixing some clippy issues * add runtime-feature detection for tsc * fix remaining clippy issues * manually fix some formatting issues * increase feature cache size * use 2x AtomicU32 on 32-bit targets as the feature cache * use the new cache in stdsimd
2018-01-19Remove Into/From between x86 and portable types (#292)Alex Crichton-68/+0
This is primarily doing to avoid falling into a portability trap by accident, and in general makes the vendor types (on x86) going towards as minimal as they can be. Along the way some tests were cleaned up which were still using the portable types.
2018-01-19Add an example of SIMD-powered hex encoding (#291)Alex Crichton-0/+334
This is lifted from an example elsewhere I found and shows off runtime dispatching along with a lot of intrinsics being used in a bunch.
2018-01-17Update `target_feature` syntax (#283)Alex Crichton-86/+12
This commit updates to the latest nightly's syntax where `#[target_feature = "+foo"]` is now deprecated in favor of `#[target_feature(enable = "foo")]`. Additionally `#[target_feature]` can only be applied to `unsafe` functions for now. Along the way this removes a few exampels that were just left around and also disables the `fxsr` modules as that target feature will need to land in upstream rust-lang/rust first as it's currently unknown to the compiler.
2018-01-09Migrate the `i686::sse` module to vendor types (#269)Alex Crichton-4/+4
This migrates the entire `i686::sse` module (and touches a few others) to the vendor types.
2017-12-14Fix rustfmt (#239)gnzlbg-4/+6
* [fmt] manually fix some formatting * [fmt] reformat with rustfmt-nightly * [clippy] fix clippy issues
2017-12-13move __m128i to the v128 modulegnzlbg-2/+2
2017-11-02[ci] enable clippy (#62)gnzlbg-11/+29
* [ci] enable clippy * [clippy] fix clippy issues
2017-10-27[ci] check formatting (#64)gnzlbg-56/+73
* [ci] check formatting * [rustfmt] reformat the whole library
2017-10-22Deny all warnings and fix errors (#135)gnzlbg-29/+34
* [travis-ci] deny warnings * fix all warnings
2017-10-18[example] nbody (#117)gnzlbg-0/+206
2017-09-27x86: add unsafe to all x86 vendor intrinsicsAndrew Gallant-3/+5
Also, add missing assert_instr tests to each intrinsic, where possible.
2017-09-21Add CI for more platformsAlex Crichton-76/+101
This commit adds CI for a few more targets: * i686-unknown-linux-gnu * arm-unknown-linux-gnueabihf * armv7-unknown-linux-gnueabihf * aarch64-unknown-linux-gnu The CI here is structured around using a Docker container to set up a test environment and then QEMU is used to actually execute code from these platforms. QEMU's emulation actually makes it so we can continue to just use `cargo test`, as processes can be spawned from QEMU like `objdump` and files can be read (for libbacktrace). Ends up being a relatively seamless experience! Note that a number of intrinsics were disabled on i686 because they were failing tests, and otherwise a few ARM touch-ups were made to get tests passing.
2017-09-17add scratchAndrew Gallant-0/+25
2017-06-19fixAndrew Gallant-1/+1
2017-06-19add strange example that failsAndrew Gallant-0/+25
2017-06-19refactorAndrew Gallant-5/+6
2017-03-13progressAndrew Gallant-10/+31
2016-12-28progressAndrew Gallant-2/+2
2016-12-11progressAndrew Gallant-1/+7
2016-12-11progressAndrew Gallant-3/+13
2016-12-02progressAndrew Gallant-20/+3
2016-11-30progressAndrew Gallant-0/+3
2016-11-29progressAndrew Gallant-1/+1
2016-11-28progressAndrew Gallant-6/+6
2016-11-27progressAndrew Gallant-18/+14
2016-11-24scratchAndrew Gallant-0/+28