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2025-05-27renamed `a64_only` data member in `Intrinsic` to `arch_tags`Madhav Madhusoodanan-4/+4
2025-05-27Added a macro to simplify <Arch>IntrinsicType definitionsMadhav Madhusoodanan-42/+59
2025-05-27introduced generic types and code refactorMadhav Madhusoodanan-640/+808
2025-05-27Updated `Argument::from_c` to remove `ArgPrep` specific argumentMadhav Madhusoodanan-7/+31
2025-05-27added target field within `IntrinsicType` to perform target level checking cl...Madhav Madhusoodanan-12/+26
2025-05-27test commit to check if `load_Values_c` can be dissociated from target logicMadhav Madhusoodanan-24/+32
2025-05-27rename struct for naming consistencyMadhav Madhusoodanan-4/+6
2025-05-27maintaining special list of targets which need different execution commandMadhav Madhusoodanan-5/+11
2025-05-27fixed `too many files open` issueMadhav Madhusoodanan-24/+36
2025-05-27chore: added match block in `src/main.rs`Madhav Madhusoodanan-2/+13
2025-05-27chore: code consolidationMadhav Madhusoodanan-162/+145
2025-05-27chore: separated common logic within file creations, compile_c, compile_rust ...Madhav Madhusoodanan-397/+501
2025-05-27chore: Added `ProcessedCli` to extract the logic to pre-process CLI struct argsMadhav Madhusoodanan-608/+685
2025-05-27Chore: Added `SupportedArchitectureTest` trait which must be implemented for ...Madhav Madhusoodanan-44/+60
2025-05-27Feat: Moved majority of the code to `arm` module.Madhav Madhusoodanan-767/+687
2025-05-26std_detect: RISC-V platform guide documentation (non-table part)Tsukasa OI-0/+15
2025-05-21allow aarch64_softfloat_neon for backwards compatibilityRalf Jung-0/+13
2025-05-20use a tuple to return the condition codeFolkert de Vries-101/+48
2025-05-20in `intrinsic-test`, format f16 like CFolkert de Vries-1/+102
2025-05-20use the right load instructionFolkert de Vries-3/+3
2025-05-20`avx512_target_feature` is now stable on nightlyFolkert de Vries-3/+0
2025-05-17Correct rustc version for the stabilization of runtime detection of VEX varia...sayantn-5/+5
2025-05-17Stabilize runtime detection of VEX variants of avx512sayantn-5/+5
2025-05-12Partially stabilize LoongArch target featuresWANG Rui-11/+10
2025-05-06Run `aarch64-pc-windows-msvc` runs on the new `windows-11-arm` runnerssayantn-14/+20
2025-05-06Edit `macro_trailing_commas` to enable tests in all architecturessayantn-18/+47
2025-05-06Fix segfault in cirrus CIsayantn-0/+4
2025-05-06Add `riscv32` CI runsayantn-4/+25
2025-05-03change how the test is runJames Barford-Evans-21/+8
2025-05-03add printouts for debuggingJames Barford-Evans-3/+10
2025-05-03retry adding aarch64_be to the pipelineJames Barford-Evans-4/+2
2025-05-03pr feedback - take the instruction count bump out of DockerfileJames Barford-Evans-4/+9
2025-05-03Pr feedback for instruction & hookup CI for aarch64_beJames Barford-Evans-0/+117
2025-05-03fix - aarch64_be testsJames Barford-Evans-10/+19
2025-05-03Fix errors in incorrect SAE and ROUNDING parameterssayantn-78/+123
2025-05-01Require `fma` and `f16c` for `avx512f` in `std_detect`sayantn-4/+10
2025-05-01Implement `sha512`, `sm3` and `sm4` intrinsicssayantn-32/+521
2025-05-01Fix `stdarch-verify`sayantn-17/+13
2025-05-01Revert "std_detect: RISC-V platform guide documentation"Tsukasa OI-126/+78
2025-04-29Add `avx512vl` requirement to testsuite for avx512fp16 128 and 256 bitsayantn-26/+26
2025-04-29Fix errors in decoupling avx512vl and avx512dq from avx512fp16sayantn-92/+106
2025-04-29Fix CI errors due to alignment issues in msvcsayantn-35/+142
2025-04-23std_detect: RISC-V platform guide documentationTsukasa OI-78/+126
2025-04-23Remove workarounds for llvm/llvm-project#98306sayantn-6/+14
2025-04-23Re-enable `armv7-unknown-linux-gnueabihf`sayantn-3/+1
2025-04-23Add power9 and power8 target-featuresLuca Barbato-1/+36
2025-04-23reset the host linkerFolkert de Vries-0/+6
2025-04-23run `cargo generate-lockfile` before running dockerFolkert de Vries-0/+3
2025-04-23run `powerpc64le` `assert_instr` on CIFolkert de Vries-3/+2
2025-04-21use 'unadjusted' ABI for wasm LLVM intrinsicsRalf Jung-4/+4
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